xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-s1.mir (revision 1ee315ae7964c8433b772e0b5d667834994ba753)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple aarch64 -O0 -run-pass=aarch64-prelegalizer-combiner -global-isel -verify-machineinstrs %s -o - | FileCheck %s
3
4# Check we don't try to combine a load of < s8 as that will end up creating a illegal non-extending load.
5--- |
6  define i8 @test(ptr %ptr) {
7    ret i8 undef
8  }
9
10...
11---
12name:            test
13alignment:       4
14tracksRegLiveness: true
15registers:
16  - { id: 0, class: _ }
17  - { id: 1, class: _ }
18  - { id: 2, class: _ }
19  - { id: 3, class: _ }
20body:             |
21  bb.1 (%ir-block.0):
22    liveins: $x0
23
24    ; CHECK-LABEL: name: test
25    ; CHECK: liveins: $x0
26    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
27    ; CHECK: [[LOAD:%[0-9]+]]:_(s1) = G_LOAD [[COPY]](p0) :: (load (s1) from %ir.ptr)
28    ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[LOAD]](s1)
29    ; CHECK: $w0 = COPY [[ZEXT]](s32)
30    ; CHECK: RET_ReallyLR implicit $w0
31    %0:_(p0) = COPY $x0
32    %1:_(s1) = G_LOAD %0(p0) :: (load (s1) from %ir.ptr)
33    %2:_(s8) = G_ZEXT %1(s1)
34    %3:_(s32) = G_ANYEXT %2(s8)
35    $w0 = COPY %3(s32)
36    RET_ReallyLR implicit $w0
37
38...
39