xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/localizer.mir (revision 1ee315ae7964c8433b772e0b5d667834994ba753)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=aarch64-apple-ios -run-pass=localizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK
3
4# Test the localizer.
5
6--- |
7  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
8
9  define void @local_use() { ret void }
10  define void @non_local_1use() { ret void }
11  define void @non_local_2uses() { ret void }
12  define void @non_local_phi_use() { ret void }
13  define void @non_local_phi_use_followed_by_use() { ret void }
14  define void @non_local_phi_use_followed_by_use_fi() { ret void }
15  define void @float_non_local_phi_use_followed_by_use_fi() { ret void }
16  define void @non_local_phi() { ret void }
17  define void @non_local_label() { ret void }
18
19  @var1 = common global i32 0, align 4
20  @var2 = common global i32 0, align 4
21  @var3 = common global i32 0, align 4
22  @var4 = common global i32 0, align 4
23
24  define i32 @intrablock_with_globalvalue() {
25  entry:
26    %0 = load i32, ptr @var1, align 4
27    %cmp = icmp eq i32 %0, 1
28    br i1 %cmp, label %if.then, label %if.end
29
30  if.then:
31    store i32 2, ptr @var2, align 4
32    store i32 3, ptr @var1, align 4
33    store i32 2, ptr @var3, align 4
34    store i32 3, ptr @var1, align 4
35    br label %if.end
36
37  if.end:
38    ret i32 0
39  }
40  define i32 @adrp_add() {
41  entry:
42    %0 = load i32, ptr @var1, align 4
43    %cmp = icmp eq i32 %0, 1
44    br i1 %cmp, label %if.then, label %if.end
45
46  if.then:
47    store i32 2, ptr @var2, align 4
48    store i32 3, ptr @var1, align 4
49    store i32 2, ptr @var3, align 4
50    store i32 3, ptr @var1, align 4
51    br label %if.end
52
53  if.end:
54    ret i32 0
55  }
56
57  define void @test_inttoptr() { ret void }
58  define void @many_local_use_intra_block() { ret void }
59  define void @non_local_phi_single_use() { ret void }
60  define void @non_local_phi_three_uses() { ret void }
61
62...
63
64---
65name:            local_use
66legalized:       true
67regBankSelected: true
68body:             |
69  bb.0:
70    ; CHECK-LABEL: name: local_use
71    ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
72    ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
73    %0:gpr(s32) = G_CONSTANT i32 1
74    %1:gpr(s32) = G_ADD %0, %0
75...
76
77---
78name:            non_local_1use
79legalized:       true
80regBankSelected: true
81body:             |
82  ; CHECK-LABEL: name: non_local_1use
83  ; CHECK: bb.0:
84  ; CHECK:   successors: %bb.1(0x80000000)
85  ; CHECK:   [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
86  ; CHECK:   [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
87  ; CHECK: bb.1:
88  ; CHECK:   [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
89  ; CHECK:   [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[C1]], [[ADD]]
90
91  ; Existing registers should be left untouched
92  ; The newly created reg should be on the same regbank/regclass as its origin.
93
94  bb.0:
95    successors: %bb.1
96
97    %0:gpr(s32) = G_CONSTANT i32 1
98    %1:gpr(s32) = G_ADD %0, %0
99
100  bb.1:
101    %2:gpr(s32) = G_ADD %0, %1
102...
103
104---
105name:            non_local_2uses
106legalized:       true
107regBankSelected: true
108body:             |
109  ; CHECK-LABEL: name: non_local_2uses
110  ; CHECK: bb.0:
111  ; CHECK:   successors: %bb.1(0x80000000)
112  ; CHECK:   [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
113  ; CHECK:   [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
114  ; CHECK: bb.1:
115  ; CHECK:   [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
116  ; CHECK:   [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[C1]], [[C1]]
117
118  ; Existing registers should be left untouched
119  ; The newly created reg should be on the same regbank/regclass as its origin.
120
121  bb.0:
122    successors: %bb.1
123
124    %0:gpr(s32) = G_CONSTANT i32 1
125    %1:gpr(s32) = G_ADD %0, %0
126
127  bb.1:
128    %2:gpr(s32) = G_ADD %0, %0
129...
130
131---
132name:            non_local_phi_use
133legalized:       true
134regBankSelected: true
135tracksRegLiveness: true
136body:             |
137  ; CHECK-LABEL: name: non_local_phi_use
138  ; CHECK: bb.0:
139  ; CHECK:   successors: %bb.1(0x80000000)
140  ; CHECK:   [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
141  ; CHECK:   [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
142  ; CHECK: bb.1:
143  ; CHECK:   successors: %bb.2(0x80000000)
144  ; CHECK:   [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
145  ; CHECK: bb.2:
146  ; CHECK:   [[PHI:%[0-9]+]]:gpr(s32) = PHI [[C1]](s32), %bb.1
147  ; CHECK:   [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[PHI]], [[PHI]]
148
149  ; Existing registers should be left untouched
150  ; The newly created reg should be on the same regbank/regclass as its origin.
151
152  bb.0:
153    successors: %bb.1
154
155    %0:gpr(s32) = G_CONSTANT i32 1
156    %1:gpr(s32) = G_ADD %0, %0
157
158  bb.1:
159    successors: %bb.2
160
161  bb.2:
162    %3:gpr(s32) = PHI %0(s32), %bb.1
163    %2:gpr(s32) = G_ADD %3, %3
164...
165
166---
167name:            non_local_phi_use_followed_by_use
168legalized:       true
169regBankSelected: true
170tracksRegLiveness: true
171body:             |
172  ; CHECK-LABEL: name: non_local_phi_use_followed_by_use
173  ; CHECK: bb.0:
174  ; CHECK:   successors: %bb.1(0x80000000)
175  ; CHECK:   [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
176  ; CHECK:   [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
177  ; CHECK: bb.1:
178  ; CHECK:   successors: %bb.2(0x80000000)
179  ; CHECK:   [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
180  ; CHECK: bb.2:
181  ; CHECK:   [[PHI:%[0-9]+]]:gpr(s32) = PHI [[C1]](s32), %bb.1
182  ; CHECK:   [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
183  ; CHECK:   [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[PHI]], [[C2]]
184
185  ; Existing registers should be left untouched
186  ; The newly created reg should be on the same regbank/regclass as its origin.
187
188  bb.0:
189    successors: %bb.1
190
191    %0:gpr(s32) = G_CONSTANT i32 1
192    %1:gpr(s32) = G_ADD %0, %0
193
194  bb.1:
195    successors: %bb.2
196
197  bb.2:
198    %3:gpr(s32) = PHI %0(s32), %bb.1
199    %2:gpr(s32) = G_ADD %3, %0
200...
201
202---
203name:            non_local_phi_use_followed_by_use_fi
204legalized:       true
205regBankSelected: true
206tracksRegLiveness: true
207body:             |
208  ; CHECK-LABEL: name: non_local_phi_use_followed_by_use_fi
209  ; CHECK: bb.0:
210  ; CHECK:   successors: %bb.1(0x80000000)
211  ; CHECK:   [[FRAME_INDEX:%[0-9]+]]:gpr(s32) = G_FRAME_INDEX 1
212  ; CHECK:   [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[FRAME_INDEX]], [[FRAME_INDEX]]
213  ; CHECK: bb.1:
214  ; CHECK:   successors: %bb.2(0x80000000)
215  ; CHECK:   [[FRAME_INDEX1:%[0-9]+]]:gpr(s32) = G_FRAME_INDEX 1
216  ; CHECK: bb.2:
217  ; CHECK:   [[PHI:%[0-9]+]]:gpr(s32) = PHI [[FRAME_INDEX1]](s32), %bb.1
218  ; CHECK:   [[FRAME_INDEX2:%[0-9]+]]:gpr(s32) = G_FRAME_INDEX 1
219  ; CHECK:   [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[PHI]], [[FRAME_INDEX2]]
220
221  ; Existing registers should be left untouched
222  ; The newly created reg should be on the same regbank/regclass as its origin.
223
224  bb.0:
225    successors: %bb.1
226
227    %0:gpr(s32) = G_FRAME_INDEX 1
228    %1:gpr(s32) = G_ADD %0, %0
229
230  bb.1:
231    successors: %bb.2
232
233  bb.2:
234    %3:gpr(s32) = PHI %0(s32), %bb.1
235    %2:gpr(s32) = G_ADD %3, %0
236...
237
238---
239name:            float_non_local_phi_use_followed_by_use_fi
240legalized:       true
241regBankSelected: true
242tracksRegLiveness: true
243body:             |
244  ; CHECK-LABEL: name: float_non_local_phi_use_followed_by_use_fi
245  ; CHECK: bb.0:
246  ; CHECK:   successors: %bb.1(0x80000000)
247  ; CHECK:   [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00
248  ; CHECK:   [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[C]], [[C]]
249  ; CHECK: bb.1:
250  ; CHECK:   successors: %bb.2(0x80000000)
251  ; CHECK:   [[C1:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00
252  ; CHECK: bb.2:
253  ; CHECK:   [[PHI:%[0-9]+]]:fpr(s32) = PHI [[C1]](s32), %bb.1
254  ; CHECK:   [[C2:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00
255  ; CHECK:   [[FADD1:%[0-9]+]]:fpr(s32) = G_FADD [[PHI]], [[C2]]
256
257  ; Existing registers should be left untouched
258  ; The newly created reg should be on the same regbank/regclass as its origin.
259
260  bb.0:
261    successors: %bb.1
262
263    %0:fpr(s32) = G_FCONSTANT float 1.0
264    %1:fpr(s32) = G_FADD %0, %0
265
266  bb.1:
267    successors: %bb.2
268
269  bb.2:
270    %3:fpr(s32) = PHI %0(s32), %bb.1
271    %2:fpr(s32) = G_FADD %3, %0
272...
273
274---
275# Make sure we don't insert a constant before PHIs.
276# This used to happen for loops of one basic block.
277name:            non_local_phi
278legalized:       true
279regBankSelected: true
280tracksRegLiveness: true
281body:             |
282  ; CHECK-LABEL: name: non_local_phi
283  ; CHECK: bb.0:
284  ; CHECK:   successors: %bb.1(0x80000000)
285  ; CHECK:   [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00
286  ; CHECK:   [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[C]], [[C]]
287  ; CHECK: bb.1:
288  ; CHECK:   successors: %bb.1(0x80000000)
289  ; CHECK:   [[PHI:%[0-9]+]]:fpr(s32) = PHI [[FADD]](s32), %bb.0, %4(s32), %bb.1
290  ; CHECK:   [[FADD1:%[0-9]+]]:fpr(s32) = G_FADD [[PHI]], [[FADD]]
291  ; CHECK:   [[C1:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00
292  ; CHECK:   G_BR %bb.1
293
294  ; Existing registers should be left untouched
295  ; The newly created reg should be on the same regbank/regclass as its origin.
296
297  bb.0:
298    successors: %bb.1
299
300    %0:fpr(s32) = G_FCONSTANT float 1.0
301    %1:fpr(s32) = G_FADD %0, %0
302
303  bb.1:
304    successors: %bb.1
305
306    %3:fpr(s32) = PHI %1(s32), %bb.0, %0(s32), %bb.1
307    %2:fpr(s32) = G_FADD %3, %1
308    G_BR %bb.1
309...
310
311---
312# Make sure we don't insert a constant before EH_LABELs.
313name:            non_local_label
314legalized:       true
315regBankSelected: true
316tracksRegLiveness: true
317body:             |
318  ; CHECK-LABEL: name: non_local_label
319  ; CHECK: bb.0:
320  ; CHECK:   successors: %bb.1(0x80000000)
321  ; CHECK:   liveins: $s0
322  ; CHECK:   [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0
323  ; CHECK:   [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00
324  ; CHECK: bb.1:
325  ; CHECK:   successors: %bb.1(0x80000000)
326  ; CHECK:   EH_LABEL 1
327  ; CHECK:   [[C1:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00
328  ; CHECK:   [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[COPY]], [[C1]]
329  ; CHECK:   G_BR %bb.1
330
331  ; Existing registers should be left untouched
332  ; The newly created reg should be on the same regbank/regclass as its origin.
333
334  bb.0:
335    liveins: $s0
336    successors: %bb.1
337
338    %0:fpr(s32) = COPY $s0
339    %1:fpr(s32) = G_FCONSTANT float 1.0
340
341  bb.1:
342    successors: %bb.1
343
344    EH_LABEL 1
345    %2:fpr(s32) = G_FADD %0, %1
346    G_BR %bb.1
347...
348---
349name:            intrablock_with_globalvalue
350legalized:       true
351regBankSelected: true
352tracksRegLiveness: true
353body:             |
354  ; CHECK-LABEL: name: intrablock_with_globalvalue
355  ; CHECK: bb.0.entry:
356  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
357  ; CHECK:   [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 2
358  ; CHECK:   [[GV:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var2
359  ; CHECK:   [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 3
360  ; CHECK:   [[GV1:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var3
361  ; CHECK:   [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0
362  ; CHECK:   [[GV2:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var1
363  ; CHECK:   [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[GV2]](p0) :: (load (s32) from @var1)
364  ; CHECK:   [[C3:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
365  ; CHECK:   [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(eq), [[LOAD]](s32), [[C3]]
366  ; CHECK:   [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32)
367  ; CHECK:   G_BRCOND [[TRUNC]](s1), %bb.1
368  ; CHECK:   G_BR %bb.2
369  ; CHECK: bb.1.if.then:
370  ; CHECK:   successors: %bb.2(0x80000000)
371  ; CHECK:   [[GV3:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var2
372  ; CHECK:   [[C4:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 2
373  ; CHECK:   G_STORE [[C4]](s32), [[GV3]](p0) :: (store (s32) into @var2)
374  ; CHECK:   [[C5:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 3
375  ; CHECK:   [[GV4:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var1
376  ; CHECK:   G_STORE [[C5]](s32), [[GV4]](p0) :: (store (s32) into @var1)
377  ; CHECK:   [[GV5:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var3
378  ; CHECK:   G_STORE [[C4]](s32), [[GV5]](p0) :: (store (s32) into @var3)
379  ; CHECK:   G_STORE [[C5]](s32), [[GV4]](p0) :: (store (s32) into @var1)
380  ; CHECK: bb.2.if.end:
381  ; CHECK:   [[C6:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0
382  ; CHECK:   $w0 = COPY [[C6]](s32)
383  ; CHECK:   RET_ReallyLR implicit $w0
384
385  ; Some of these instructions are dead. We're checking that the other instructions are
386  ; sunk immediately before their first user in the if.then block or as close as possible.
387  bb.1.entry:
388    %1:gpr(p0) = G_GLOBAL_VALUE @var1
389    %2:gpr(s32) = G_CONSTANT i32 1
390    %4:gpr(s32) = G_CONSTANT i32 2
391    %5:gpr(p0) = G_GLOBAL_VALUE @var2
392    %6:gpr(s32) = G_CONSTANT i32 3
393    %7:gpr(p0) = G_GLOBAL_VALUE @var3
394    %8:gpr(s32) = G_CONSTANT i32 0
395    %0:gpr(s32) = G_LOAD %1(p0) :: (load (s32) from @var1)
396    %9:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2
397    %3:gpr(s1) = G_TRUNC %9(s32)
398    G_BRCOND %3(s1), %bb.2
399    G_BR %bb.3
400
401  bb.2.if.then:
402    G_STORE %4(s32), %5(p0) :: (store (s32) into @var2)
403    G_STORE %6(s32), %1(p0) :: (store (s32) into @var1)
404    G_STORE %4(s32), %7(p0) :: (store (s32) into @var3)
405    G_STORE %6(s32), %1(p0) :: (store (s32) into @var1)
406
407  bb.3.if.end:
408    $w0 = COPY %8(s32)
409    RET_ReallyLR implicit $w0
410
411...
412---
413name:            adrp_add
414legalized:       true
415regBankSelected: true
416tracksRegLiveness: true
417body:             |
418  ; CHECK-LABEL: name: adrp_add
419  ; CHECK: bb.0.entry:
420  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
421  ; CHECK:   [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var1
422  ; CHECK:   %addlow1:gpr(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var1
423  ; CHECK:   [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 2
424  ; CHECK:   [[ADRP1:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var2
425  ; CHECK:   %addlow2:gpr(p0) = G_ADD_LOW [[ADRP1]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var2
426  ; CHECK:   [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 3
427  ; CHECK:   [[ADRP2:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var3
428  ; CHECK:   %addlow3:gpr(p0) = G_ADD_LOW [[ADRP2]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var3
429  ; CHECK:   [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0
430  ; CHECK:   [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[ADRP]](p0) :: (load (s32) from @var1)
431  ; CHECK:   [[C3:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
432  ; CHECK:   [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(eq), [[LOAD]](s32), [[C3]]
433  ; CHECK:   [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32)
434  ; CHECK:   G_BRCOND [[TRUNC]](s1), %bb.1
435  ; CHECK:   G_BR %bb.2
436  ; CHECK: bb.1.if.then:
437  ; CHECK:   successors: %bb.2(0x80000000)
438  ; CHECK:   [[ADRP3:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var2
439  ; CHECK:   [[ADD_LOW:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP3]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var2
440  ; CHECK:   [[C4:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 2
441  ; CHECK:   G_STORE [[C4]](s32), [[ADD_LOW]](p0) :: (store (s32) into @var2)
442  ; CHECK:   [[C5:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 3
443  ; CHECK:   [[ADRP4:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var1
444  ; CHECK:   [[ADD_LOW1:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP4]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var1
445  ; CHECK:   G_STORE [[C5]](s32), [[ADD_LOW1]](p0) :: (store (s32) into @var1)
446  ; CHECK:   [[ADRP5:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var3
447  ; CHECK:   [[ADD_LOW2:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP5]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var3
448  ; CHECK:   G_STORE [[C4]](s32), [[ADD_LOW2]](p0) :: (store (s32) into @var3)
449  ; CHECK:   G_STORE [[C5]](s32), [[ADD_LOW1]](p0) :: (store (s32) into @var1)
450  ; CHECK: bb.2.if.end:
451  ; CHECK:   [[C6:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0
452  ; CHECK:   $w0 = COPY [[C6]](s32)
453  ; CHECK:   RET_ReallyLR implicit $w0
454
455  ; Some of these instructions are dead.
456  bb.1.entry:
457    %1:gpr64(p0) = ADRP target-flags(aarch64-page) @var1
458    %addlow1:gpr(p0) = G_ADD_LOW %1(p0), target-flags(aarch64-pageoff, aarch64-nc) @var1
459    %2:gpr(s32) = G_CONSTANT i32 1
460    %4:gpr(s32) = G_CONSTANT i32 2
461    %5:gpr64(p0) = ADRP target-flags(aarch64-page) @var2
462    %addlow2:gpr(p0) = G_ADD_LOW %5(p0), target-flags(aarch64-pageoff, aarch64-nc) @var2
463    %6:gpr(s32) = G_CONSTANT i32 3
464    %7:gpr64(p0) = ADRP target-flags(aarch64-page) @var3
465    %addlow3:gpr(p0) = G_ADD_LOW %7(p0), target-flags(aarch64-pageoff, aarch64-nc) @var3
466    %8:gpr(s32) = G_CONSTANT i32 0
467    %0:gpr(s32) = G_LOAD %1(p0) :: (load (s32) from @var1)
468    %9:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2
469    %3:gpr(s1) = G_TRUNC %9(s32)
470    G_BRCOND %3(s1), %bb.2
471    G_BR %bb.3
472
473  bb.2.if.then:
474    G_STORE %4(s32), %addlow2(p0) :: (store (s32) into @var2)
475    G_STORE %6(s32), %addlow1(p0) :: (store (s32) into @var1)
476    G_STORE %4(s32), %addlow3(p0) :: (store (s32) into @var3)
477    G_STORE %6(s32), %addlow1(p0) :: (store (s32) into @var1)
478
479  bb.3.if.end:
480    $w0 = COPY %8(s32)
481    RET_ReallyLR implicit $w0
482
483...
484---
485name:            test_inttoptr
486alignment:       4
487legalized:       true
488regBankSelected: true
489tracksRegLiveness: true
490body:             |
491  ; CHECK-LABEL: name: test_inttoptr
492  ; CHECK: bb.0:
493  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
494  ; CHECK:   liveins: $w0, $x1
495  ; CHECK:   [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
496  ; CHECK:   [[COPY1:%[0-9]+]]:gpr(p0) = COPY $x1
497  ; CHECK:   [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 0
498  ; CHECK:   [[INTTOPTR:%[0-9]+]]:gpr(p0) = G_INTTOPTR [[C]](s64)
499  ; CHECK:   [[C1:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 128
500  ; CHECK:   [[INTTOPTR1:%[0-9]+]]:gpr(p0) = G_INTTOPTR [[C1]](s64)
501  ; CHECK:   [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0
502  ; CHECK:   [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[C2]]
503  ; CHECK:   [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32)
504  ; CHECK:   G_BRCOND [[TRUNC]](s1), %bb.1
505  ; CHECK:   G_BR %bb.2
506  ; CHECK: bb.1:
507  ; CHECK:   [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[COPY]], [[COPY]]
508  ; CHECK:   G_STORE [[ADD]](s32), [[COPY1]](p0) :: (store (s32)
509  ; CHECK:   [[C3:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 128
510  ; CHECK:   [[INTTOPTR2:%[0-9]+]]:gpr(p0) = G_INTTOPTR [[C3]](s64)
511  ; CHECK:   $x0 = COPY [[INTTOPTR2]](p0)
512  ; CHECK:   RET_ReallyLR implicit $x0
513  ; CHECK: bb.2:
514  ; CHECK:   [[C4:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 0
515  ; CHECK:   [[INTTOPTR3:%[0-9]+]]:gpr(p0) = G_INTTOPTR [[C4]](s64)
516  ; CHECK:   $x0 = COPY [[INTTOPTR3]](p0)
517  ; CHECK:   RET_ReallyLR implicit $x0
518  bb.1:
519    liveins: $w0, $x1
520
521    %0:gpr(s32) = COPY $w0
522    %1:gpr(p0) = COPY $x1
523    %2:gpr(s64) = G_CONSTANT i64 128
524    %4:gpr(s32) = G_CONSTANT i32 0
525    %7:gpr(s64) = G_CONSTANT i64 0
526    %6:gpr(p0) = G_INTTOPTR %7(s64)
527    %3:gpr(p0) = G_INTTOPTR %2(s64)
528    %9:gpr(s32) = G_ICMP intpred(eq), %0(s32), %4
529    %5:gpr(s1) = G_TRUNC %9(s32)
530    G_BRCOND %5(s1), %bb.2
531    G_BR %bb.3
532
533  bb.2:
534    %8:gpr(s32) = G_ADD %0, %0
535    G_STORE %8(s32), %1(p0) :: (store (s32))
536    $x0 = COPY %3(p0)
537    RET_ReallyLR implicit $x0
538
539  bb.3:
540    $x0 = COPY %6(p0)
541    RET_ReallyLR implicit $x0
542
543...
544
545---
546name:            many_local_use_intra_block
547legalized:       true
548regBankSelected: true
549body:             |
550  bb.0:
551    ; CHECK-LABEL: name: many_local_use_intra_block
552    ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
553    ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
554    ; CHECK: [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
555    ; CHECK: [[ADD2:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
556    ; CHECK: [[ADD3:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
557    ; CHECK: [[ADD4:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
558    ; CHECK: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 2
559    ; CHECK: [[ADD5:%[0-9]+]]:gpr(s32) = G_ADD [[C1]], [[C1]]
560    %0:gpr(s32) = G_CONSTANT i32 1
561    %1:gpr(s32) = G_CONSTANT i32 2
562    %2:gpr(s32) = G_ADD %0, %0
563    %3:gpr(s32) = G_ADD %0, %0
564    %4:gpr(s32) = G_ADD %0, %0
565    %5:gpr(s32) = G_ADD %0, %0
566    %6:gpr(s32) = G_ADD %0, %0
567    %7:gpr(s32) = G_ADD %1, %1
568...
569
570---
571name:            non_local_phi_single_use
572legalized:       true
573regBankSelected: true
574tracksRegLiveness: true
575body:             |
576  ; CHECK-LABEL: name: non_local_phi_single_use
577  ; CHECK: bb.0:
578  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
579  ; CHECK:   [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
580  ; CHECK:   [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
581  ; CHECK:   %cmp:gpr(s32) = G_ICMP intpred(eq), [[ADD]](s32), [[C]]
582  ; CHECK:   %cond:gpr(s1) = G_TRUNC %cmp(s32)
583  ; CHECK:   G_BRCOND %cond(s1), %bb.1
584  ; CHECK:   G_BR %bb.2
585  ; CHECK: bb.1:
586  ; CHECK:   successors: %bb.2(0x80000000)
587  ; CHECK:   [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
588  ; CHECK: bb.2:
589  ; CHECK:   [[PHI:%[0-9]+]]:gpr(s32) = G_PHI [[C2]](s32), %bb.1
590  ; CHECK:   [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[PHI]], [[PHI]]
591
592  ; Localize the 1 into bb.1, since the number of uses is under the threshold.
593
594  bb.0:
595    successors: %bb.1, %bb.2
596
597    %0:gpr(s32) = G_CONSTANT i32 1
598    %1:gpr(s32) = G_ADD %0, %0
599    %cmp:gpr(s32) = G_ICMP intpred(eq), %1(s32), %0
600    %cond:gpr(s1) = G_TRUNC %cmp(s32)
601    G_BRCOND %cond(s1), %bb.1
602    G_BR %bb.2
603
604  bb.1:
605    successors: %bb.2
606
607  bb.2:
608    %3:gpr(s32) = G_PHI %0(s32), %bb.1, %0(s32), %bb.0
609    %2:gpr(s32) = G_ADD %3, %3
610...
611---
612name:            non_local_phi_three_uses
613legalized:       true
614regBankSelected: true
615tracksRegLiveness: true
616body:             |
617  ; CHECK-LABEL: name: non_local_phi_three_uses
618  ; CHECK: bb.0:
619  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
620  ; CHECK:   [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
621  ; CHECK:   [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]]
622  ; CHECK:   %cmp:gpr(s32) = G_ICMP intpred(eq), [[ADD]](s32), [[C]]
623  ; CHECK:   %cond:gpr(s1) = G_TRUNC %cmp(s32)
624  ; CHECK:   G_BRCOND %cond(s1), %bb.1
625  ; CHECK:   G_BR %bb.2
626  ; CHECK: bb.1:
627  ; CHECK:   successors: %bb.2(0x80000000)
628  ; CHECK: bb.2:
629  ; CHECK:   [[PHI:%[0-9]+]]:gpr(s32) = G_PHI [[C]](s32), %bb.1
630  ; CHECK:   [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[PHI]], [[PHI]]
631
632  ; Don't localize the 1 into bb.1, above the thresold of uses in the phi.
633
634  bb.0:
635    successors: %bb.1, %bb.2
636
637    %0:gpr(s32) = G_CONSTANT i32 1
638    %1:gpr(s32) = G_ADD %0, %0
639    %cmp:gpr(s32) = G_ICMP intpred(eq), %1(s32), %0
640    %cond:gpr(s1) = G_TRUNC %cmp(s32)
641    G_BRCOND %cond(s1), %bb.1
642    G_BR %bb.2
643
644  bb.1:
645    successors: %bb.2
646
647  bb.2:
648    %3:gpr(s32) = G_PHI %0(s32), %bb.1, %0(s32), %bb.0, %0(s32), %bb.0, %0(s32), %bb.0
649    %2:gpr(s32) = G_ADD %3, %3
650...
651