xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir (revision 873d2aff426b484a7934c6b43a533a718d8bfbb1) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
3---
4name:            lshr_v4s32
5body:             |
6  bb.1:
7    liveins: $q0, $q1
8
9    ; CHECK-LABEL: name: lshr_v4s32
10    ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
11    ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
12    ; CHECK: [[LSHR:%[0-9]+]]:_(<4 x s32>) = G_LSHR [[COPY]], [[COPY1]](<4 x s32>)
13    ; CHECK: $q0 = COPY [[LSHR]](<4 x s32>)
14    ; CHECK: RET_ReallyLR implicit $q0
15    %0:_(<4 x s32>) = COPY $q0
16    %1:_(<4 x s32>) = COPY $q1
17    %2:_(<4 x s32>) = G_LSHR %0, %1(<4 x s32>)
18    $q0 = COPY %2(<4 x s32>)
19    RET_ReallyLR implicit $q0
20
21...
22---
23name:            lshr_v2s64
24body:             |
25  bb.1:
26    liveins: $q0, $q1
27
28    ; CHECK-LABEL: name: lshr_v2s64
29    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
30    ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1
31    ; CHECK: [[LSHR:%[0-9]+]]:_(<2 x s64>) = G_LSHR [[COPY]], [[COPY1]](<2 x s64>)
32    ; CHECK: $q0 = COPY [[LSHR]](<2 x s64>)
33    ; CHECK: RET_ReallyLR implicit $q0
34    %0:_(<2 x s64>) = COPY $q0
35    %1:_(<2 x s64>) = COPY $q1
36    %2:_(<2 x s64>) = G_LSHR %0, %1(<2 x s64>)
37    $q0 = COPY %2(<2 x s64>)
38    RET_ReallyLR implicit $q0
39
40...
41---
42name:            ashr_v4s32
43body:             |
44  bb.1:
45    liveins: $q0, $q1
46
47    ; CHECK-LABEL: name: ashr_v4s32
48    ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
49    ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
50    ; CHECK: [[ASHR:%[0-9]+]]:_(<4 x s32>) = G_ASHR [[COPY]], [[COPY1]](<4 x s32>)
51    ; CHECK: $q0 = COPY [[ASHR]](<4 x s32>)
52    ; CHECK: RET_ReallyLR implicit $q0
53    %0:_(<4 x s32>) = COPY $q0
54    %1:_(<4 x s32>) = COPY $q1
55    %2:_(<4 x s32>) = G_ASHR %0, %1(<4 x s32>)
56    $q0 = COPY %2(<4 x s32>)
57    RET_ReallyLR implicit $q0
58
59...
60---
61name:            ashr_v2s64
62body:             |
63  bb.1:
64    liveins: $q0, $q1
65
66    ; CHECK-LABEL: name: ashr_v2s64
67    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
68    ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1
69    ; CHECK: [[ASHR:%[0-9]+]]:_(<2 x s64>) = G_ASHR [[COPY]], [[COPY1]](<2 x s64>)
70    ; CHECK: $q0 = COPY [[ASHR]](<2 x s64>)
71    ; CHECK: RET_ReallyLR implicit $q0
72    %0:_(<2 x s64>) = COPY $q0
73    %1:_(<2 x s64>) = COPY $q1
74    %2:_(<2 x s64>) = G_ASHR %0, %1(<2 x s64>)
75    $q0 = COPY %2(<2 x s64>)
76    RET_ReallyLR implicit $q0
77
78...
79