1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s 3--- 4name: test_fadd_v2s64 5body: | 6 bb.0.entry: 7 ; CHECK-LABEL: name: test_fadd_v2s64 8 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 9 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1 10 ; CHECK: [[FADD:%[0-9]+]]:_(<2 x s64>) = G_FADD [[COPY]], [[COPY1]] 11 ; CHECK: $q0 = COPY [[FADD]](<2 x s64>) 12 %0:_(<2 x s64>) = COPY $q0 13 %1:_(<2 x s64>) = COPY $q1 14 %2:_(<2 x s64>) = G_FADD %0, %1 15 $q0 = COPY %2(<2 x s64>) 16 17... 18--- 19name: test_fdiv_v2s32 20body: | 21 bb.0.entry: 22 ; CHECK-LABEL: name: test_fdiv_v2s32 23 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 24 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1 25 ; CHECK: [[FDIV:%[0-9]+]]:_(<2 x s32>) = G_FDIV [[COPY]], [[COPY1]] 26 ; CHECK: $d0 = COPY [[FDIV]](<2 x s32>) 27 %0:_(<2 x s32>) = COPY $d0 28 %1:_(<2 x s32>) = COPY $d1 29 %2:_(<2 x s32>) = G_FDIV %0, %1 30 $d0 = COPY %2(<2 x s32>) 31 32... 33--- 34name: test_fsub_v2s32 35body: | 36 bb.0.entry: 37 ; CHECK-LABEL: name: test_fsub_v2s32 38 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 39 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1 40 ; CHECK: [[FSUB:%[0-9]+]]:_(<2 x s32>) = G_FSUB [[COPY]], [[COPY1]] 41 ; CHECK: $d0 = COPY [[FSUB]](<2 x s32>) 42 %0:_(<2 x s32>) = COPY $d0 43 %1:_(<2 x s32>) = COPY $d1 44 %2:_(<2 x s32>) = G_FSUB %0, %1 45 $d0 = COPY %2(<2 x s32>) 46 47... 48--- 49name: test_fneg_v2s32 50body: | 51 bb.0.entry: 52 ; CHECK-LABEL: name: test_fneg_v2s32 53 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 54 ; CHECK: [[FNEG:%[0-9]+]]:_(<2 x s32>) = G_FNEG [[COPY]] 55 ; CHECK: $d0 = COPY [[FNEG]](<2 x s32>) 56 %0:_(<2 x s32>) = COPY $d0 57 %1:_(<2 x s32>) = G_FNEG %0 58 $d0 = COPY %1(<2 x s32>) 59 60... 61--- 62name: test_fmul_v4s32 63body: | 64 bb.0.entry: 65 ; CHECK-LABEL: name: test_fmul_v4s32 66 ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0 67 ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1 68 ; CHECK: [[FMUL:%[0-9]+]]:_(<4 x s32>) = G_FMUL [[COPY]], [[COPY1]] 69 ; CHECK: $q0 = COPY [[FMUL]](<4 x s32>) 70 %0:_(<4 x s32>) = COPY $q0 71 %1:_(<4 x s32>) = COPY $q1 72 %2:_(<4 x s32>) = G_FMUL %0, %1 73 $q0 = COPY %2(<4 x s32>) 74 75... 76--- 77name: test_fmul_v4s64 78body: | 79 bb.0.entry: 80 ; CHECK-LABEL: name: test_fmul_v4s64 81 ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF 82 ; CHECK: [[FMUL:%[0-9]+]]:_(<2 x s64>) = G_FMUL [[DEF]], [[DEF]] 83 ; CHECK: [[FMUL1:%[0-9]+]]:_(<2 x s64>) = G_FMUL [[DEF]], [[DEF]] 84 ; CHECK: $q0 = COPY [[FMUL]](<2 x s64>) 85 ; CHECK: $q1 = COPY [[FMUL1]](<2 x s64>) 86 %0:_(<4 x s64>) = G_IMPLICIT_DEF 87 %1:_(<4 x s64>) = G_IMPLICIT_DEF 88 %2:_(<4 x s64>) = G_FMUL %0, %1 89 %uv1:_(<2 x s64>), %uv2:_(<2 x s64>) = G_UNMERGE_VALUES %2 90 $q0 = COPY %uv1(<2 x s64>) 91 $q1 = COPY %uv2(<2 x s64>) 92 93... 94--- 95name: test_fmul_v8s32 96body: | 97 bb.0.entry: 98 ; CHECK-LABEL: name: test_fmul_v8s32 99 ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF 100 ; CHECK: [[FMUL:%[0-9]+]]:_(<4 x s32>) = G_FMUL [[DEF]], [[DEF]] 101 ; CHECK: [[FMUL1:%[0-9]+]]:_(<4 x s32>) = G_FMUL [[DEF]], [[DEF]] 102 ; CHECK: $q0 = COPY [[FMUL]](<4 x s32>) 103 ; CHECK: $q1 = COPY [[FMUL1]](<4 x s32>) 104 %0:_(<8 x s32>) = G_IMPLICIT_DEF 105 %1:_(<8 x s32>) = G_IMPLICIT_DEF 106 %2:_(<8 x s32>) = G_FMUL %0, %1 107 %uv1:_(<4 x s32>), %uv2:_(<4 x s32>) = G_UNMERGE_VALUES %2 108 $q0 = COPY %uv1(<4 x s32>) 109 $q1 = COPY %uv2(<4 x s32>) 110... 111