xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir (revision 665d79f2e967a5eee6fff93685e45f50cf24cab2) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=aarch64 -run-pass=legalizer -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s
3---
4name:            test_icmp
5body:             |
6  bb.0.entry:
7    ; CHECK-LABEL: name: test_icmp
8    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
9    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x0
10    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[COPY]](s64), [[COPY1]]
11    ; CHECK-NEXT: $w0 = COPY [[ICMP]](s32)
12    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
13    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
14    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
15    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
16    ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]]
17    ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND]](s32), [[AND1]]
18    ; CHECK-NEXT: $w0 = COPY [[ICMP1]](s32)
19    ; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s64)
20    ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[INTTOPTR]](p0), [[INTTOPTR]]
21    ; CHECK-NEXT: $w0 = COPY [[ICMP2]](s32)
22    %0:_(s64) = COPY $x0
23    %1:_(s64) = COPY $x0
24    %2:_(s8) = G_TRUNC %0(s64)
25    %3:_(s8) = G_TRUNC %1(s64)
26    %4:_(s1) = G_ICMP intpred(sge), %0(s64), %1
27    %11:_(s32) = G_ANYEXT %4(s1)
28    $w0 = COPY %11(s32)
29    %8:_(s1) = G_ICMP intpred(ult), %2(s8), %3
30    %12:_(s32) = G_ANYEXT %8(s1)
31    $w0 = COPY %12(s32)
32    %9:_(p0) = G_INTTOPTR %0(s64)
33    %10:_(s1) = G_ICMP intpred(eq), %9(p0), %9
34    %14:_(s32) = G_ANYEXT %10(s1)
35    $w0 = COPY %14(s32)
36
37...
38---
39name:            test_s128
40alignment:       4
41tracksRegLiveness: true
42body:             |
43  ; CHECK-LABEL: name: test_s128
44  ; CHECK: bb.0:
45  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
46  ; CHECK-NEXT: {{  $}}
47  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
48  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
49  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967296
50  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[DEF]](s64), [[C]]
51  ; CHECK-NEXT:   [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[DEF]](s64), [[C1]]
52  ; CHECK-NEXT:   [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[DEF]](s64), [[C1]]
53  ; CHECK-NEXT:   [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP2]](s32), [[ICMP]], [[ICMP1]]
54  ; CHECK-NEXT:   G_BRCOND [[SELECT]](s32), %bb.1
55  ; CHECK-NEXT:   G_BR %bb.2
56  ; CHECK-NEXT: {{  $}}
57  ; CHECK-NEXT: bb.1:
58  ; CHECK-NEXT:   successors:
59  ; CHECK-NEXT: {{  $}}
60  ; CHECK-NEXT: bb.2:
61  ; CHECK-NEXT:   RET_ReallyLR
62  bb.1:
63    %0:_(s128) = G_IMPLICIT_DEF
64    %1:_(s128) = G_CONSTANT i128 79228162514264337593543950336
65    %3:_(s1) = G_CONSTANT i1 true
66    %2:_(s1) = G_ICMP intpred(ult), %0(s128), %1
67    G_BRCOND %2(s1), %bb.2
68    G_BR %bb.3
69
70  bb.2:
71    successors:
72
73
74  bb.3:
75    RET_ReallyLR
76
77...
78---
79name:            test_s128_eq
80tracksRegLiveness: true
81body:             |
82  ; CHECK-LABEL: name: test_s128_eq
83  ; CHECK: bb.0:
84  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
85  ; CHECK-NEXT: {{  $}}
86  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
87  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
88  ; CHECK-NEXT:   [[XOR:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
89  ; CHECK-NEXT:   [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
90  ; CHECK-NEXT:   [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
91  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s64), [[C]]
92  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s32), %bb.1
93  ; CHECK-NEXT:   G_BR %bb.2
94  ; CHECK-NEXT: {{  $}}
95  ; CHECK-NEXT: bb.1:
96  ; CHECK-NEXT:   successors:
97  ; CHECK-NEXT: {{  $}}
98  ; CHECK-NEXT: bb.2:
99  ; CHECK-NEXT:   RET_ReallyLR
100  bb.1:
101    %lhs:_(s128) = G_IMPLICIT_DEF
102    %rhs:_(s128) = G_IMPLICIT_DEF
103    %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s128), %rhs
104    G_BRCOND %cmp(s1), %bb.2
105    G_BR %bb.3
106  bb.2:
107    successors:
108  bb.3:
109    RET_ReallyLR
110
111...
112---
113name:            test_s88_eq
114tracksRegLiveness: true
115body:             |
116  ; CHECK-LABEL: name: test_s88_eq
117  ; CHECK: bb.0:
118  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
119  ; CHECK-NEXT: {{  $}}
120  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
121  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
122  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16777215
123  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
124  ; CHECK-NEXT:   [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
125  ; CHECK-NEXT:   [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
126  ; CHECK-NEXT:   [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
127  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
128  ; CHECK-NEXT:   [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND2]]
129  ; CHECK-NEXT:   [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND3]]
130  ; CHECK-NEXT:   [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
131  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s64), [[C2]]
132  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s32), %bb.1
133  ; CHECK-NEXT:   G_BR %bb.2
134  ; CHECK-NEXT: {{  $}}
135  ; CHECK-NEXT: bb.1:
136  ; CHECK-NEXT:   successors:
137  ; CHECK-NEXT: {{  $}}
138  ; CHECK-NEXT: bb.2:
139  ; CHECK-NEXT:   RET_ReallyLR
140  bb.1:
141    %lhs:_(s88) = G_IMPLICIT_DEF
142    %rhs:_(s88) = G_IMPLICIT_DEF
143    %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s88), %rhs
144    G_BRCOND %cmp(s1), %bb.2
145    G_BR %bb.3
146  bb.2:
147    successors:
148  bb.3:
149    RET_ReallyLR
150
151...
152---
153name:            test_s88_ne
154tracksRegLiveness: true
155body:             |
156  ; CHECK-LABEL: name: test_s88_ne
157  ; CHECK: bb.0:
158  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
159  ; CHECK-NEXT: {{  $}}
160  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
161  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
162  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16777215
163  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
164  ; CHECK-NEXT:   [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
165  ; CHECK-NEXT:   [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
166  ; CHECK-NEXT:   [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
167  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
168  ; CHECK-NEXT:   [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND2]]
169  ; CHECK-NEXT:   [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND3]]
170  ; CHECK-NEXT:   [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
171  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[OR]](s64), [[C2]]
172  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s32), %bb.1
173  ; CHECK-NEXT:   G_BR %bb.2
174  ; CHECK-NEXT: {{  $}}
175  ; CHECK-NEXT: bb.1:
176  ; CHECK-NEXT:   successors:
177  ; CHECK-NEXT: {{  $}}
178  ; CHECK-NEXT: bb.2:
179  ; CHECK-NEXT:   RET_ReallyLR
180  bb.1:
181    %lhs:_(s88) = G_IMPLICIT_DEF
182    %rhs:_(s88) = G_IMPLICIT_DEF
183    %cmp:_(s1) = G_ICMP intpred(ne), %lhs(s88), %rhs
184    G_BRCOND %cmp(s1), %bb.2
185    G_BR %bb.3
186  bb.2:
187    successors:
188  bb.3:
189    RET_ReallyLR
190
191...
192---
193name:            test_s96_eq
194tracksRegLiveness: true
195body:             |
196  ; CHECK-LABEL: name: test_s96_eq
197  ; CHECK: bb.0:
198  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
199  ; CHECK-NEXT: {{  $}}
200  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
201  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
202  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295
203  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
204  ; CHECK-NEXT:   [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
205  ; CHECK-NEXT:   [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
206  ; CHECK-NEXT:   [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
207  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
208  ; CHECK-NEXT:   [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND2]]
209  ; CHECK-NEXT:   [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND3]]
210  ; CHECK-NEXT:   [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
211  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s64), [[C2]]
212  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s32), %bb.1
213  ; CHECK-NEXT:   G_BR %bb.2
214  ; CHECK-NEXT: {{  $}}
215  ; CHECK-NEXT: bb.1:
216  ; CHECK-NEXT:   successors:
217  ; CHECK-NEXT: {{  $}}
218  ; CHECK-NEXT: bb.2:
219  ; CHECK-NEXT:   RET_ReallyLR
220  bb.1:
221    %lhs:_(s96) = G_IMPLICIT_DEF
222    %rhs:_(s96) = G_IMPLICIT_DEF
223    %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s96), %rhs
224    G_BRCOND %cmp(s1), %bb.2
225    G_BR %bb.3
226  bb.2:
227    successors:
228  bb.3:
229    RET_ReallyLR
230...
231---
232name:            test_s318_eq
233tracksRegLiveness: true
234body:             |
235  ; CHECK-LABEL: name: test_s318_eq
236  ; CHECK: bb.0:
237  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
238  ; CHECK-NEXT: {{  $}}
239  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
240  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
241  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4611686018427387903
242  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
243  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
244  ; CHECK-NEXT:   [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
245  ; CHECK-NEXT:   [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
246  ; CHECK-NEXT:   [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
247  ; CHECK-NEXT:   [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
248  ; CHECK-NEXT:   [[AND5:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
249  ; CHECK-NEXT:   [[AND6:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
250  ; CHECK-NEXT:   [[AND7:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
251  ; CHECK-NEXT:   [[AND8:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
252  ; CHECK-NEXT:   [[AND9:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
253  ; CHECK-NEXT:   [[AND10:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
254  ; CHECK-NEXT:   [[AND11:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
255  ; CHECK-NEXT:   [[AND12:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
256  ; CHECK-NEXT:   [[AND13:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
257  ; CHECK-NEXT:   [[AND14:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
258  ; CHECK-NEXT:   [[AND15:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
259  ; CHECK-NEXT:   [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND8]]
260  ; CHECK-NEXT:   [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND9]]
261  ; CHECK-NEXT:   [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[AND2]], [[AND10]]
262  ; CHECK-NEXT:   [[XOR3:%[0-9]+]]:_(s64) = G_XOR [[AND3]], [[AND11]]
263  ; CHECK-NEXT:   [[XOR4:%[0-9]+]]:_(s64) = G_XOR [[AND4]], [[AND12]]
264  ; CHECK-NEXT:   [[XOR5:%[0-9]+]]:_(s64) = G_XOR [[AND5]], [[AND13]]
265  ; CHECK-NEXT:   [[XOR6:%[0-9]+]]:_(s64) = G_XOR [[AND6]], [[AND14]]
266  ; CHECK-NEXT:   [[XOR7:%[0-9]+]]:_(s64) = G_XOR [[AND7]], [[AND15]]
267  ; CHECK-NEXT:   [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
268  ; CHECK-NEXT:   [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[XOR2]]
269  ; CHECK-NEXT:   [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[XOR3]]
270  ; CHECK-NEXT:   [[OR3:%[0-9]+]]:_(s64) = G_OR [[OR2]], [[XOR4]]
271  ; CHECK-NEXT:   [[OR4:%[0-9]+]]:_(s64) = G_OR [[OR3]], [[XOR5]]
272  ; CHECK-NEXT:   [[OR5:%[0-9]+]]:_(s64) = G_OR [[OR4]], [[XOR6]]
273  ; CHECK-NEXT:   [[OR6:%[0-9]+]]:_(s64) = G_OR [[OR5]], [[XOR7]]
274  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR6]](s64), [[C2]]
275  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s32), %bb.1
276  ; CHECK-NEXT:   G_BR %bb.2
277  ; CHECK-NEXT: {{  $}}
278  ; CHECK-NEXT: bb.1:
279  ; CHECK-NEXT:   successors:
280  ; CHECK-NEXT: {{  $}}
281  ; CHECK-NEXT: bb.2:
282  ; CHECK-NEXT:   RET_ReallyLR
283  bb.1:
284    %lhs:_(s318) = G_IMPLICIT_DEF
285    %rhs:_(s318) = G_IMPLICIT_DEF
286    %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s318), %rhs
287    G_BRCOND %cmp(s1), %bb.2
288    G_BR %bb.3
289  bb.2:
290    successors:
291  bb.3:
292    RET_ReallyLR
293...
294---
295name:            test_s158_eq
296tracksRegLiveness: true
297body:             |
298  ; CHECK-LABEL: name: test_s158_eq
299  ; CHECK: bb.0:
300  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
301  ; CHECK-NEXT: {{  $}}
302  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
303  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
304  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
305  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
306  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
307  ; CHECK-NEXT:   [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
308  ; CHECK-NEXT:   [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
309  ; CHECK-NEXT:   [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
310  ; CHECK-NEXT:   [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
311  ; CHECK-NEXT:   [[AND5:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
312  ; CHECK-NEXT:   [[AND6:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
313  ; CHECK-NEXT:   [[AND7:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
314  ; CHECK-NEXT:   [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND4]]
315  ; CHECK-NEXT:   [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND5]]
316  ; CHECK-NEXT:   [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[AND2]], [[AND6]]
317  ; CHECK-NEXT:   [[XOR3:%[0-9]+]]:_(s64) = G_XOR [[AND3]], [[AND7]]
318  ; CHECK-NEXT:   [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
319  ; CHECK-NEXT:   [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[XOR2]]
320  ; CHECK-NEXT:   [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[XOR3]]
321  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR2]](s64), [[C2]]
322  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s32), %bb.1
323  ; CHECK-NEXT:   G_BR %bb.2
324  ; CHECK-NEXT: {{  $}}
325  ; CHECK-NEXT: bb.1:
326  ; CHECK-NEXT:   successors:
327  ; CHECK-NEXT: {{  $}}
328  ; CHECK-NEXT: bb.2:
329  ; CHECK-NEXT:   RET_ReallyLR
330  bb.1:
331    %lhs:_(s158) = G_IMPLICIT_DEF
332    %rhs:_(s158) = G_IMPLICIT_DEF
333    %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s158), %rhs
334    G_BRCOND %cmp(s1), %bb.2
335    G_BR %bb.3
336  bb.2:
337    successors:
338  bb.3:
339    RET_ReallyLR
340...
341---
342name:            test_3xs32_eq_pr_78181
343tracksRegLiveness: true
344body:             |
345  bb.1:
346    liveins: $x0
347    ; CHECK-LABEL: name: test_3xs32_eq_pr_78181
348    ; CHECK: liveins: $x0
349    ; CHECK-NEXT: {{  $}}
350    ; CHECK-NEXT: %const:_(s32) = G_IMPLICIT_DEF
351    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32)
352    ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32)
353    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s32>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<4 x s32>), [[BUILD_VECTOR1]]
354    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
355    ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[ICMP]](<4 x s32>), [[C]](s64)
356    ; CHECK-NEXT: $w0 = COPY [[EVEC]](s32)
357    ; CHECK-NEXT: RET_ReallyLR
358    %const:_(s32) = G_IMPLICIT_DEF
359    %rhs:_(<3 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32)
360    %lhs:_(<3 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32)
361    %cmp:_(<3 x s32>) = G_ICMP intpred(eq), %lhs(<3 x s32>), %rhs
362    %1:_(s64) = G_CONSTANT i64 1
363    %2:_(s32) = G_EXTRACT_VECTOR_ELT %cmp(<3 x s32>), %1(s64)
364    $w0 = COPY %2(s32)
365    RET_ReallyLR
366...
367---
368name:            test_3xs16_eq_pr_78181
369tracksRegLiveness: true
370body:             |
371  bb.1:
372    liveins: $x0
373    ; CHECK-LABEL: name: test_3xs16_eq_pr_78181
374    ; CHECK: liveins: $x0
375    ; CHECK-NEXT: {{  $}}
376    ; CHECK-NEXT: %const:_(s16) = G_IMPLICIT_DEF
377    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16)
378    ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16)
379    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s16>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<4 x s16>), [[BUILD_VECTOR1]]
380    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[ICMP]](<4 x s16>)
381    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
382    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
383    ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
384    ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)
385    ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
386    ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32), [[DEF]](s32)
387    ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR2]](<4 x s32>), [[C]](s64)
388    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
389    ; CHECK-NEXT: %zext:_(s32) = G_AND [[EVEC]], [[C1]]
390    ; CHECK-NEXT: $w0 = COPY %zext(s32)
391    ; CHECK-NEXT: RET_ReallyLR
392    %const:_(s16) = G_IMPLICIT_DEF
393    %rhs:_(<3 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16)
394    %lhs:_(<3 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16)
395    %cmp:_(<3 x s16>) = G_ICMP intpred(eq), %lhs(<3 x s16>), %rhs
396    %1:_(s64) = G_CONSTANT i64 1
397    %2:_(s16) = G_EXTRACT_VECTOR_ELT %cmp(<3 x s16>), %1(s64)
398    %zext:_(s32) = G_ZEXT %2(s16)
399    $w0 = COPY %zext(s32)
400    RET_ReallyLR
401...
402---
403name:            test_3xs8_eq_pr_78181
404tracksRegLiveness: true
405body:             |
406  bb.1:
407    liveins: $x0
408    ; CHECK-LABEL: name: test_3xs8_eq_pr_78181
409    ; CHECK: liveins: $x0
410    ; CHECK-NEXT: {{  $}}
411    ; CHECK-NEXT: %const:_(s8) = G_IMPLICIT_DEF
412    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)
413    ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)
414    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<8 x s8>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<8 x s8>), [[BUILD_VECTOR1]]
415    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[ICMP]](<8 x s8>)
416    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
417    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s8)
418    ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s8)
419    ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s8)
420    ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
421    ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32), [[DEF]](s32)
422    ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR2]](<4 x s32>), [[C]](s64)
423    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
424    ; CHECK-NEXT: %zext:_(s32) = G_AND [[EVEC]], [[C1]]
425    ; CHECK-NEXT: $w0 = COPY %zext(s32)
426    ; CHECK-NEXT: RET_ReallyLR
427    %const:_(s8) = G_IMPLICIT_DEF
428    %rhs:_(<3 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8)
429    %lhs:_(<3 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8)
430    %cmp:_(<3 x s8>) = G_ICMP intpred(eq), %lhs(<3 x s8>), %rhs
431    %1:_(s64) = G_CONSTANT i64 1
432    %2:_(s8) = G_EXTRACT_VECTOR_ELT %cmp(<3 x s8>), %1(s64)
433    %zext:_(s32) = G_ZEXT %2(s8)
434    $w0 = COPY %zext(s32)
435    RET_ReallyLR
436...
437---
438name:            test_3xs64_eq_clamp
439tracksRegLiveness: true
440body:             |
441  bb.1:
442    liveins: $x0
443    ; CHECK-LABEL: name: test_3xs64_eq_clamp
444    ; CHECK: liveins: $x0
445    ; CHECK-NEXT: {{  $}}
446    ; CHECK-NEXT: %const:_(s64) = G_IMPLICIT_DEF
447    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR %const(s64), %const(s64)
448    ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR %const(s64), %const(s64)
449    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<2 x s64>), [[BUILD_VECTOR1]]
450    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
451    ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[ICMP]](<2 x s64>), [[C]](s64)
452    ; CHECK-NEXT: $x0 = COPY [[EVEC]](s64)
453    ; CHECK-NEXT: RET_ReallyLR
454    %const:_(s64) = G_IMPLICIT_DEF
455    %rhs:_(<3 x s64>) = G_BUILD_VECTOR %const(s64), %const(s64), %const(s64)
456    %lhs:_(<3 x s64>) = G_BUILD_VECTOR %const(s64), %const(s64), %const(s64)
457    %cmp:_(<3 x s64>) = G_ICMP intpred(eq), %lhs(<3 x s64>), %rhs
458    %1:_(s64) = G_CONSTANT i64 1
459    %2:_(s64) = G_EXTRACT_VECTOR_ELT %cmp(<3 x s64>), %1(s64)
460    $x0 = COPY %2(s64)
461    RET_ReallyLR
462...
463---
464name:            test_5xs32_eq_clamp
465tracksRegLiveness: true
466body:             |
467  bb.1:
468    liveins: $x0
469    ; CHECK-LABEL: name: test_5xs32_eq_clamp
470    ; CHECK: liveins: $x0
471    ; CHECK-NEXT: {{  $}}
472    ; CHECK-NEXT: %const:_(s32) = G_IMPLICIT_DEF
473    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32)
474    ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32)
475    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s32>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<4 x s32>), [[BUILD_VECTOR1]]
476    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
477    ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[ICMP]](<4 x s32>), [[C]](s64)
478    ; CHECK-NEXT: $w0 = COPY [[EVEC]](s32)
479    ; CHECK-NEXT: RET_ReallyLR
480    %const:_(s32) = G_IMPLICIT_DEF
481    %rhs:_(<5 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32), %const(s32)
482    %lhs:_(<5 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32), %const(s32)
483    %cmp:_(<5 x s32>) = G_ICMP intpred(eq), %lhs(<5 x s32>), %rhs
484    %1:_(s64) = G_CONSTANT i64 1
485    %2:_(s32) = G_EXTRACT_VECTOR_ELT %cmp(<5 x s32>), %1(s64)
486    $w0 = COPY %2(s32)
487    RET_ReallyLR
488...
489---
490name:            test_7xs16_eq_clamp
491tracksRegLiveness: true
492body:             |
493  bb.1:
494    liveins: $x0
495    ; CHECK-LABEL: name: test_7xs16_eq_clamp
496    ; CHECK: liveins: $x0
497    ; CHECK-NEXT: {{  $}}
498    ; CHECK-NEXT: %const:_(s16) = G_IMPLICIT_DEF
499    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16)
500    ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16)
501    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<8 x s16>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<8 x s16>), [[BUILD_VECTOR1]]
502    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
503    ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[ICMP]](<8 x s16>), [[C]](s64)
504    ; CHECK-NEXT: %zext:_(s32) = G_ZEXT [[EVEC]](s16)
505    ; CHECK-NEXT: $w0 = COPY %zext(s32)
506    ; CHECK-NEXT: RET_ReallyLR
507    %const:_(s16) = G_IMPLICIT_DEF
508    %rhs:_(<7 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16)
509    %lhs:_(<7 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16)
510    %cmp:_(<7 x s16>) = G_ICMP intpred(eq), %lhs(<7 x s16>), %rhs
511    %1:_(s64) = G_CONSTANT i64 1
512    %2:_(s16) = G_EXTRACT_VECTOR_ELT %cmp(<7 x s16>), %1(s64)
513    %zext:_(s32) = G_ZEXT %2(s16)
514    $w0 = COPY %zext(s32)
515    RET_ReallyLR
516...
517---
518name:            test_9xs8_eq_clamp
519tracksRegLiveness: true
520body:             |
521  bb.1:
522    liveins: $x0
523    ; CHECK-LABEL: name: test_9xs8_eq_clamp
524    ; CHECK: liveins: $x0
525    ; CHECK-NEXT: {{  $}}
526    ; CHECK-NEXT: %const:_(s8) = G_IMPLICIT_DEF
527    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)
528    ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<16 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)
529    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<16 x s8>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<16 x s8>), [[BUILD_VECTOR1]]
530    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
531    ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[ICMP]](<16 x s8>), [[C]](s64)
532    ; CHECK-NEXT: %zext:_(s32) = G_ZEXT [[EVEC]](s8)
533    ; CHECK-NEXT: $w0 = COPY %zext(s32)
534    ; CHECK-NEXT: RET_ReallyLR
535    %const:_(s8) = G_IMPLICIT_DEF
536    %rhs:_(<9 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)
537    %lhs:_(<9 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)
538    %cmp:_(<9 x s8>) = G_ICMP intpred(eq), %lhs(<9 x s8>), %rhs
539    %1:_(s64) = G_CONSTANT i64 1
540    %2:_(s8) = G_EXTRACT_VECTOR_ELT %cmp(<9 x s8>), %1(s64)
541    %zext:_(s32) = G_ZEXT %2(s8)
542    $w0 = COPY %zext(s32)
543    RET_ReallyLR
544...
545---
546name:            test_4xs64_ne
547tracksRegLiveness: true
548body:             |
549  bb.1:
550    liveins:
551    ; CHECK-LABEL: name: test_4xs64_ne
552    ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
553    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x s64>), [[DEF]]
554    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
555    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
556    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP]], [[BUILD_VECTOR]]
557    ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x s64>), [[DEF]]
558    ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
559    ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP1]], [[BUILD_VECTOR1]]
560    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
561    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR]](<2 x s64>)
562    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR1]](<2 x s64>)
563    ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s32>), [[TRUNC1]](<2 x s32>)
564    ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[CONCAT_VECTORS]](<4 x s32>), [[C1]](s64)
565    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
566    ; CHECK-NEXT: %zext:_(s32) = G_AND [[EVEC]], [[C2]]
567    ; CHECK-NEXT: $w0 = COPY %zext(s32)
568    ; CHECK-NEXT: RET_ReallyLR
569    %vec:_(<4 x s64>) = G_IMPLICIT_DEF
570    %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %vec(<4 x s64>), %vec
571    %1:_(s64) = G_CONSTANT i64 1
572    %elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<4 x s1>), %1
573    %zext:_(s32) = G_ZEXT %elt(s1)
574    $w0 = COPY %zext(s32)
575    RET_ReallyLR
576...
577---
578name:            test_4xp0_ne
579tracksRegLiveness: true
580body:             |
581  bb.1:
582    liveins:
583    ; CHECK-LABEL: name: test_4xp0_ne
584    ; CHECK: [[DEF:%[0-9]+]]:_(<2 x p0>) = G_IMPLICIT_DEF
585    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x p0>), [[DEF]]
586    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
587    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
588    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP]], [[BUILD_VECTOR]]
589    ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x p0>), [[DEF]]
590    ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
591    ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP1]], [[BUILD_VECTOR1]]
592    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
593    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR]](<2 x s64>)
594    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR1]](<2 x s64>)
595    ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s32>), [[TRUNC1]](<2 x s32>)
596    ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[CONCAT_VECTORS]](<4 x s32>), [[C1]](s64)
597    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
598    ; CHECK-NEXT: %zext:_(s32) = G_AND [[EVEC]], [[C2]]
599    ; CHECK-NEXT: $w0 = COPY %zext(s32)
600    ; CHECK-NEXT: RET_ReallyLR
601    %vec:_(<4 x p0>) = G_IMPLICIT_DEF
602    %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %vec(<4 x p0>), %vec
603    %1:_(s64) = G_CONSTANT i64 1
604    %elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<4 x s1>), %1
605    %zext:_(s32) = G_ZEXT %elt(s1)
606    $w0 = COPY %zext(s32)
607    RET_ReallyLR
608...
609