xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll (revision a701b7e368b70688bb4b84dafcaa43fa7c9a3649) 
1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2; RUN: llc -mtriple aarch64 -aarch64-enable-atomic-cfg-tidy=0 -stop-after=irtranslator -global-isel -verify-machineinstrs -disable-cgp-delete-phis %s -o - 2>&1 | FileCheck %s
3
4define i32 @test_bittest(i16 %p) {
5  ; CHECK-LABEL: name: test_bittest
6  ; CHECK: bb.1 (%ir-block.0):
7  ; CHECK-NEXT:   successors: %bb.4(0x1b6db6db), %bb.5(0x64924925)
8  ; CHECK-NEXT:   liveins: $w0
9  ; CHECK-NEXT: {{  $}}
10  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $w0
11  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
12  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 114
13  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
14  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
15  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC]](s16)
16  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
17  ; CHECK-NEXT:   [[SUB:%[0-9]+]]:_(s32) = G_SUB [[ZEXT]], [[C3]]
18  ; CHECK-NEXT:   [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[SUB]](s32)
19  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 59
20  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ugt), [[SUB]](s32), [[C4]]
21  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s1), %bb.4
22  ; CHECK-NEXT:   G_BR %bb.5
23  ; CHECK-NEXT: {{  $}}
24  ; CHECK-NEXT: bb.4 (%ir-block.0):
25  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
26  ; CHECK-NEXT: {{  $}}
27  ; CHECK-NEXT:   [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[ZEXT]](s32), [[C]]
28  ; CHECK-NEXT:   G_BRCOND [[ICMP1]](s1), %bb.3
29  ; CHECK-NEXT:   G_BR %bb.2
30  ; CHECK-NEXT: {{  $}}
31  ; CHECK-NEXT: bb.5 (%ir-block.0):
32  ; CHECK-NEXT:   successors: %bb.3(0x745d1746), %bb.4(0x0ba2e8ba)
33  ; CHECK-NEXT: {{  $}}
34  ; CHECK-NEXT:   [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
35  ; CHECK-NEXT:   [[SHL:%[0-9]+]]:_(s64) = G_SHL [[C5]], [[ZEXT1]](s64)
36  ; CHECK-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 866239240827043840
37  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C6]]
38  ; CHECK-NEXT:   [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
39  ; CHECK-NEXT:   [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s64), [[C7]]
40  ; CHECK-NEXT:   G_BRCOND [[ICMP2]](s1), %bb.3
41  ; CHECK-NEXT:   G_BR %bb.4
42  ; CHECK-NEXT: {{  $}}
43  ; CHECK-NEXT: bb.2.sw.epilog:
44  ; CHECK-NEXT:   $w0 = COPY [[C2]](s32)
45  ; CHECK-NEXT:   RET_ReallyLR implicit $w0
46  ; CHECK-NEXT: {{  $}}
47  ; CHECK-NEXT: bb.3.cb1:
48  ; CHECK-NEXT:   $w0 = COPY [[C1]](s32)
49  ; CHECK-NEXT:   RET_ReallyLR implicit $w0
50  switch i16 %p, label %sw.epilog [
51    i16 58, label %cb1
52    i16 59, label %cb1
53    i16 47, label %cb1
54    i16 48, label %cb1
55    i16 50, label %cb1
56    i16 114, label %cb1
57  ]
58sw.epilog:
59  ret i32 0
60
61cb1:
62  ret i32 42
63}
64
65
66declare void @callee()
67
68define void @test_bittest_2_bt(i32 %p) {
69  ; CHECK-LABEL: name: test_bittest_2_bt
70  ; CHECK: bb.1.entry:
71  ; CHECK-NEXT:   successors: %bb.5(0x345d1746), %bb.6(0x4ba2e8ba)
72  ; CHECK-NEXT:   liveins: $w0
73  ; CHECK-NEXT: {{  $}}
74  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $w0
75  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 176
76  ; CHECK-NEXT:   [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[C]]
77  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 15
78  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ugt), [[SUB]](s32), [[C1]]
79  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s1), %bb.5
80  ; CHECK-NEXT:   G_BR %bb.6
81  ; CHECK-NEXT: {{  $}}
82  ; CHECK-NEXT: bb.5.entry:
83  ; CHECK-NEXT:   successors: %bb.4(0x0ccccccd), %bb.7(0x73333333)
84  ; CHECK-NEXT: {{  $}}
85  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
86  ; CHECK-NEXT:   [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[C2]]
87  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[SUB1]](s32)
88  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 38
89  ; CHECK-NEXT:   [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ugt), [[SUB1]](s32), [[C3]]
90  ; CHECK-NEXT:   G_BRCOND [[ICMP1]](s1), %bb.4
91  ; CHECK-NEXT:   G_BR %bb.7
92  ; CHECK-NEXT: {{  $}}
93  ; CHECK-NEXT: bb.6.entry:
94  ; CHECK-NEXT:   successors: %bb.2(0x76276276), %bb.5(0x09d89d8a)
95  ; CHECK-NEXT: {{  $}}
96  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
97  ; CHECK-NEXT:   [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C4]], [[SUB]](s32)
98  ; CHECK-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 57351
99  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C5]]
100  ; CHECK-NEXT:   [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
101  ; CHECK-NEXT:   [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s32), [[C6]]
102  ; CHECK-NEXT:   G_BRCOND [[ICMP2]](s1), %bb.2
103  ; CHECK-NEXT:   G_BR %bb.5
104  ; CHECK-NEXT: {{  $}}
105  ; CHECK-NEXT: bb.7.entry:
106  ; CHECK-NEXT:   successors: %bb.3(0x71c71c72), %bb.4(0x0e38e38e)
107  ; CHECK-NEXT: {{  $}}
108  ; CHECK-NEXT:   [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
109  ; CHECK-NEXT:   [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[C7]], [[ZEXT]](s64)
110  ; CHECK-NEXT:   [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 365072220160
111  ; CHECK-NEXT:   [[AND1:%[0-9]+]]:_(s64) = G_AND [[SHL1]], [[C8]]
112  ; CHECK-NEXT:   [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
113  ; CHECK-NEXT:   [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND1]](s64), [[C9]]
114  ; CHECK-NEXT:   G_BRCOND [[ICMP3]](s1), %bb.3
115  ; CHECK-NEXT:   G_BR %bb.4
116  ; CHECK-NEXT: {{  $}}
117  ; CHECK-NEXT: bb.2.sw.bb37:
118  ; CHECK-NEXT:   TCRETURNdi @callee, 0, csr_aarch64_aapcs, implicit $sp
119  ; CHECK-NEXT: {{  $}}
120  ; CHECK-NEXT: bb.3.sw.bb55:
121  ; CHECK-NEXT:   TCRETURNdi @callee, 0, csr_aarch64_aapcs, implicit $sp
122  ; CHECK-NEXT: {{  $}}
123  ; CHECK-NEXT: bb.4.sw.default:
124  ; CHECK-NEXT:   RET_ReallyLR
125entry:
126  switch i32 %p, label %sw.default [
127    i32 32, label %sw.bb55
128    i32 34, label %sw.bb55
129    i32 36, label %sw.bb55
130    i32 191, label %sw.bb37
131    i32 190, label %sw.bb37
132    i32 189, label %sw.bb37
133    i32 178, label %sw.bb37
134    i32 177, label %sw.bb37
135    i32 176, label %sw.bb37
136    i32 38, label %sw.bb55
137  ]
138
139sw.bb37:                                          ; preds = %entry, %entry, %entry, %entry, %entry, %entry
140  tail call void @callee()
141  ret void
142
143sw.bb55:                                          ; preds = %entry, %entry, %entry, %entry
144  tail call void @callee()
145  ret void
146
147sw.default:                                       ; preds = %entry
148  ret void
149}
150
151define i32 @test_bittest_single_bt_only_with_fallthrough(i16 %p) {
152  ; CHECK-LABEL: name: test_bittest_single_bt_only_with_fallthrough
153  ; CHECK: bb.1 (%ir-block.0):
154  ; CHECK-NEXT:   successors: %bb.2(0x0aaaaaab), %bb.4(0x75555555)
155  ; CHECK-NEXT:   liveins: $w0
156  ; CHECK-NEXT: {{  $}}
157  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $w0
158  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
159  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
160  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
161  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC]](s16)
162  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
163  ; CHECK-NEXT:   [[SUB:%[0-9]+]]:_(s32) = G_SUB [[ZEXT]], [[C2]]
164  ; CHECK-NEXT:   [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[SUB]](s32)
165  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 59
166  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ugt), [[SUB]](s32), [[C3]]
167  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s1), %bb.2
168  ; CHECK-NEXT: {{  $}}
169  ; CHECK-NEXT: bb.4 (%ir-block.0):
170  ; CHECK-NEXT:   successors: %bb.3(0x745d1746), %bb.2(0x0ba2e8ba)
171  ; CHECK-NEXT: {{  $}}
172  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
173  ; CHECK-NEXT:   [[SHL:%[0-9]+]]:_(s64) = G_SHL [[C4]], [[ZEXT1]](s64)
174  ; CHECK-NEXT:   [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 866239240827043840
175  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C5]]
176  ; CHECK-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
177  ; CHECK-NEXT:   [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s64), [[C6]]
178  ; CHECK-NEXT:   G_BRCOND [[ICMP1]](s1), %bb.3
179  ; CHECK-NEXT: {{  $}}
180  ; CHECK-NEXT: bb.2.sw.epilog:
181  ; CHECK-NEXT:   $w0 = COPY [[C1]](s32)
182  ; CHECK-NEXT:   RET_ReallyLR implicit $w0
183  ; CHECK-NEXT: {{  $}}
184  ; CHECK-NEXT: bb.3.cb1:
185  ; CHECK-NEXT:   $w0 = COPY [[C]](s32)
186  ; CHECK-NEXT:   RET_ReallyLR implicit $w0
187  switch i16 %p, label %sw.epilog [
188    i16 58, label %cb1
189    i16 59, label %cb1
190    i16 47, label %cb1
191    i16 48, label %cb1
192    i16 50, label %cb1
193  ]
194sw.epilog:
195  ret i32 0
196
197cb1:
198  ret i32 42
199}
200
201define void @bit_test_block_incomplete_phi() {
202  ; CHECK-LABEL: name: bit_test_block_incomplete_phi
203  ; CHECK: bb.1.entry:
204  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
205  ; CHECK-NEXT: {{  $}}
206  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
207  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
208  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
209  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s1) = G_CONSTANT i1 true
210  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
211  ; CHECK-NEXT:   [[SUB:%[0-9]+]]:_(s32) = G_SUB [[DEF]], [[C2]]
212  ; CHECK-NEXT: {{  $}}
213  ; CHECK-NEXT: bb.5.entry:
214  ; CHECK-NEXT:   successors: %bb.3(0x51745d17), %bb.4(0x2e8ba2e9)
215  ; CHECK-NEXT: {{  $}}
216  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
217  ; CHECK-NEXT:   [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C3]], [[SUB]](s32)
218  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 491
219  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C4]]
220  ; CHECK-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
221  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s32), [[C5]]
222  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s1), %bb.3
223  ; CHECK-NEXT:   G_BR %bb.4
224  ; CHECK-NEXT: {{  $}}
225  ; CHECK-NEXT: bb.6.entry:
226  ; CHECK-NEXT:   successors:
227  ; CHECK: bb.2.sw.epilog.i:
228  ; CHECK-NEXT:   successors:
229  ; CHECK: bb.3.if.end:
230  ; CHECK-NEXT:   successors: %bb.4(0x80000000)
231  ; CHECK-NEXT: {{  $}}
232  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[DEF1]](p0) :: (load (p0) from `ptr undef`)
233  ; CHECK-NEXT: {{  $}}
234  ; CHECK-NEXT: bb.4.return:
235  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:_(s1) = G_PHI [[C]](s1), %bb.3, [[C1]](s1), %bb.5
236  ; CHECK-NEXT:   RET_ReallyLR
237entry:
238  switch i32 undef, label %sw.epilog.i [
239    i32 4, label %return
240    i32 2, label %return
241    i32 10, label %return
242    i32 9, label %return
243    i32 1, label %if.end
244    i32 3, label %if.end
245    i32 5, label %if.end
246    i32 0, label %if.end
247    i32 6, label %if.end
248    i32 7, label %if.end
249    i32 8, label %if.end
250  ]
251
252sw.epilog.i:                                      ; preds = %entry
253  unreachable
254
255if.end:                                           ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry
256  %0 = load ptr, ptr undef, align 8
257  br label %return
258
259return:                                           ; preds = %if.end, %entry, %entry, %entry, %entry
260  %retval.0 = phi i1 [ false, %if.end ], [ true, %entry ], [ true, %entry ], [ true, %entry ], [ true, %entry ]
261  ret void
262}
263
264define i32 @test_odd_type(i328 %p) {
265  ; CHECK-LABEL: name: test_odd_type
266  ; CHECK: bb.1 (%ir-block.0):
267  ; CHECK-NEXT:   successors: %bb.4(0x1b6db6db), %bb.5(0x64924925)
268  ; CHECK-NEXT:   liveins: $x0, $x1, $x2, $x3, $x4, $x5
269  ; CHECK-NEXT: {{  $}}
270  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x0
271  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
272  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
273  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
274  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(s64) = COPY $x4
275  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(s64) = COPY $x5
276  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s384) = G_MERGE_VALUES [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64), [[COPY3]](s64), [[COPY4]](s64), [[COPY5]](s64)
277  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(s328) = G_TRUNC [[MV]](s384)
278  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s328) = G_CONSTANT i328 114
279  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
280  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
281  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s328) = G_CONSTANT i328 0
282  ; CHECK-NEXT:   [[SUB:%[0-9]+]]:_(s328) = G_SUB [[TRUNC]], [[C3]]
283  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[SUB]](s328)
284  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s328) = G_CONSTANT i328 59
285  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ugt), [[SUB]](s328), [[C4]]
286  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s1), %bb.4
287  ; CHECK-NEXT:   G_BR %bb.5
288  ; CHECK-NEXT: {{  $}}
289  ; CHECK-NEXT: bb.4 (%ir-block.0):
290  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
291  ; CHECK-NEXT: {{  $}}
292  ; CHECK-NEXT:   [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s328), [[C]]
293  ; CHECK-NEXT:   G_BRCOND [[ICMP1]](s1), %bb.3
294  ; CHECK-NEXT:   G_BR %bb.2
295  ; CHECK-NEXT: {{  $}}
296  ; CHECK-NEXT: bb.5 (%ir-block.0):
297  ; CHECK-NEXT:   successors: %bb.3(0x745d1746), %bb.4(0x0ba2e8ba)
298  ; CHECK-NEXT: {{  $}}
299  ; CHECK-NEXT:   [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
300  ; CHECK-NEXT:   [[SHL:%[0-9]+]]:_(s64) = G_SHL [[C5]], [[TRUNC1]](s64)
301  ; CHECK-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 866239240827043840
302  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C6]]
303  ; CHECK-NEXT:   [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
304  ; CHECK-NEXT:   [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s64), [[C7]]
305  ; CHECK-NEXT:   G_BRCOND [[ICMP2]](s1), %bb.3
306  ; CHECK-NEXT:   G_BR %bb.4
307  ; CHECK-NEXT: {{  $}}
308  ; CHECK-NEXT: bb.2.sw.epilog:
309  ; CHECK-NEXT:   $w0 = COPY [[C2]](s32)
310  ; CHECK-NEXT:   RET_ReallyLR implicit $w0
311  ; CHECK-NEXT: {{  $}}
312  ; CHECK-NEXT: bb.3.cb1:
313  ; CHECK-NEXT:   $w0 = COPY [[C1]](s32)
314  ; CHECK-NEXT:   RET_ReallyLR implicit $w0
315  switch i328 %p, label %sw.epilog [
316    i328 58, label %cb1
317    i328 59, label %cb1
318    i328 47, label %cb1
319    i328 48, label %cb1
320    i328 50, label %cb1
321    i328 114, label %cb1
322  ]
323sw.epilog:
324  ret i32 0
325cb1:
326  ret i32 42
327}
328
329define i32 @test_large_pow2_type(i256 %p) {
330  ; CHECK-LABEL: name: test_large_pow2_type
331  ; CHECK: bb.1 (%ir-block.0):
332  ; CHECK-NEXT:   successors: %bb.4(0x1b6db6db), %bb.5(0x64924925)
333  ; CHECK-NEXT:   liveins: $x0, $x1, $x2, $x3
334  ; CHECK-NEXT: {{  $}}
335  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x0
336  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
337  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
338  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
339  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64), [[COPY3]](s64)
340  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s256) = G_CONSTANT i256 114
341  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
342  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
343  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s256) = G_CONSTANT i256 0
344  ; CHECK-NEXT:   [[SUB:%[0-9]+]]:_(s256) = G_SUB [[MV]], [[C3]]
345  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[SUB]](s256)
346  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s256) = G_CONSTANT i256 59
347  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ugt), [[SUB]](s256), [[C4]]
348  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s1), %bb.4
349  ; CHECK-NEXT:   G_BR %bb.5
350  ; CHECK-NEXT: {{  $}}
351  ; CHECK-NEXT: bb.4 (%ir-block.0):
352  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
353  ; CHECK-NEXT: {{  $}}
354  ; CHECK-NEXT:   [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[MV]](s256), [[C]]
355  ; CHECK-NEXT:   G_BRCOND [[ICMP1]](s1), %bb.3
356  ; CHECK-NEXT:   G_BR %bb.2
357  ; CHECK-NEXT: {{  $}}
358  ; CHECK-NEXT: bb.5 (%ir-block.0):
359  ; CHECK-NEXT:   successors: %bb.3(0x745d1746), %bb.4(0x0ba2e8ba)
360  ; CHECK-NEXT: {{  $}}
361  ; CHECK-NEXT:   [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
362  ; CHECK-NEXT:   [[SHL:%[0-9]+]]:_(s64) = G_SHL [[C5]], [[TRUNC]](s64)
363  ; CHECK-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 866239240827043840
364  ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C6]]
365  ; CHECK-NEXT:   [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
366  ; CHECK-NEXT:   [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s64), [[C7]]
367  ; CHECK-NEXT:   G_BRCOND [[ICMP2]](s1), %bb.3
368  ; CHECK-NEXT:   G_BR %bb.4
369  ; CHECK-NEXT: {{  $}}
370  ; CHECK-NEXT: bb.2.sw.epilog:
371  ; CHECK-NEXT:   $w0 = COPY [[C2]](s32)
372  ; CHECK-NEXT:   RET_ReallyLR implicit $w0
373  ; CHECK-NEXT: {{  $}}
374  ; CHECK-NEXT: bb.3.cb1:
375  ; CHECK-NEXT:   $w0 = COPY [[C1]](s32)
376  ; CHECK-NEXT:   RET_ReallyLR implicit $w0
377  switch i256 %p, label %sw.epilog [
378    i256 58, label %cb1
379    i256 59, label %cb1
380    i256 47, label %cb1
381    i256 48, label %cb1
382    i256 50, label %cb1
383    i256 114, label %cb1
384  ]
385sw.epilog:
386  ret i32 0
387cb1:
388  ret i32 42
389}
390
391