1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -mtriple=aarch64-- -mcpu=falkor -O0 -aarch64-enable-atomic-cfg-tidy=0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - | FileCheck %s 3 4define void @store_nontemporal(ptr dereferenceable(4) %ptr) { 5 ; CHECK-LABEL: name: store_nontemporal 6 ; CHECK: bb.1 (%ir-block.0): 7 ; CHECK-NEXT: liveins: $x0 8 ; CHECK-NEXT: {{ $}} 9 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0 10 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 11 ; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: (non-temporal store (s32) into %ir.ptr) 12 ; CHECK-NEXT: RET_ReallyLR 13 store i32 0, ptr %ptr, align 4, !nontemporal !0 14 ret void 15} 16 17define void @store_dereferenceable(ptr dereferenceable(4) %ptr) { 18 ; CHECK-LABEL: name: store_dereferenceable 19 ; CHECK: bb.1 (%ir-block.0): 20 ; CHECK-NEXT: liveins: $x0 21 ; CHECK-NEXT: {{ $}} 22 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0 23 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 24 ; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: (store (s32) into %ir.ptr) 25 ; CHECK-NEXT: RET_ReallyLR 26 store i32 0, ptr %ptr, align 4 27 ret void 28} 29 30define void @store_volatile_dereferenceable(ptr dereferenceable(4) %ptr) { 31 ; CHECK-LABEL: name: store_volatile_dereferenceable 32 ; CHECK: bb.1 (%ir-block.0): 33 ; CHECK-NEXT: liveins: $x0 34 ; CHECK-NEXT: {{ $}} 35 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0 36 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 37 ; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: (volatile store (s32) into %ir.ptr) 38 ; CHECK-NEXT: RET_ReallyLR 39 store volatile i32 0, ptr %ptr, align 4 40 ret void 41} 42 43define void @store_falkor_strided_access(ptr %ptr) { 44 ; CHECK-LABEL: name: store_falkor_strided_access 45 ; CHECK: bb.1 (%ir-block.0): 46 ; CHECK-NEXT: liveins: $x0 47 ; CHECK-NEXT: {{ $}} 48 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0 49 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 50 ; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: ("aarch64-strided-access" store (s32) into %ir.ptr) 51 ; CHECK-NEXT: RET_ReallyLR 52 store i32 0, ptr %ptr, align 4, !falkor.strided.access !0 53 ret void 54} 55 56!0 = !{} 57