xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-shr-and.mir (revision e1c808b36e2ec7050016c2eaafab3e17696583a0)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
3
4# Check that we can fold a G_ASHR/G_LSHR fed by a G_AND into a G_SBFX/G_UBFX.
5
6---
7name:            mask_extract_unsigned_32
8legalized: true
9body:             |
10  bb.0.entry:
11    ; CHECK-LABEL: name: mask_extract_unsigned_32
12    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
13    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
14    ; CHECK-NEXT: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C]](s32), [[C]]
15    ; CHECK-NEXT: $w0 = COPY [[UBFX]](s32)
16    %0:_(s32) = COPY $w0
17    %1:_(s32) = G_CONSTANT i32 12
18    %2:_(s32) = G_CONSTANT i32 2
19    %3:_(s32) = G_AND %0, %1
20    %4:_(s32) = G_LSHR %3, %2
21    $w0 = COPY %4(s32)
22...
23---
24name:            mask_extract_unsigned_64
25legalized: true
26body:             |
27  bb.0.entry:
28    ; CHECK-LABEL: name: mask_extract_unsigned_64
29    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
30    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
31    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
32    ; CHECK-NEXT: [[UBFX:%[0-9]+]]:_(s64) = G_UBFX [[COPY]], [[C]](s64), [[C1]]
33    ; CHECK-NEXT: $x0 = COPY [[UBFX]](s64)
34    %0:_(s64) = COPY $x0
35    %1:_(s64) = G_CONSTANT i64 1080863910568919040
36    %2:_(s64) = G_CONSTANT i64 56
37    %3:_(s64) = G_AND %0, %1
38    %4:_(s64) = G_LSHR %3, %2
39    $x0 = COPY %4(s64)
40...
41---
42name:            no_mask_extract_unsigned_128
43legalized: true
44body:             |
45  bb.0.entry:
46    ; CHECK-LABEL: name: no_mask_extract_unsigned_128
47    ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $q0
48    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1080863910568919040
49    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 56
50    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s128) = G_AND [[COPY]], [[C]]
51    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s128) = G_LSHR [[AND]], [[C1]](s128)
52    ; CHECK-NEXT: $q0 = COPY [[LSHR]](s128)
53    %0:_(s128) = COPY $q0
54    %1:_(s128) = G_CONSTANT i128 1080863910568919040
55    %2:_(s128) = G_CONSTANT i128 56
56    %3:_(s128) = G_AND %0, %1
57    %4:_(s128) = G_LSHR %3, %2
58    $q0 = COPY %4(s128)
59...
60---
61name:            mask_extract_asr
62legalized: true
63body:             |
64  bb.0.entry:
65    ; CHECK-LABEL: name: mask_extract_asr
66    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
67    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
68    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
69    ; CHECK-NEXT: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C]](s32), [[C1]]
70    ; CHECK-NEXT: $w0 = COPY [[UBFX]](s32)
71    %0:_(s32) = COPY $w0
72    %1:_(s32) = G_CONSTANT i32 1610612736
73    %2:_(s32) = G_CONSTANT i32 29
74    %3:_(s32) = G_AND %0, %1
75    %4:_(s32) = G_ASHR %3, %2
76    $w0 = COPY %4(s32)
77...
78---
79name:            no_mask_extract_asr
80legalized: true
81body:             |
82  bb.0.entry:
83    ; CHECK-LABEL: name: no_mask_extract_asr
84    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
85    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1073741824
86    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 30
87    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
88    ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND]], [[C1]](s32)
89    ; CHECK-NEXT: $w0 = COPY [[ASHR]](s32)
90    %0:_(s32) = COPY $w0
91    %1:_(s32) = G_CONSTANT i32 3221225472
92    %2:_(s32) = G_CONSTANT i32 30
93    %3:_(s32) = G_AND %0, %1
94    %4:_(s32) = G_ASHR %3, %2
95    $w0 = COPY %4(s32)
96...
97---
98name:            mask_extract_signed_nonneg
99legalized: true
100body:             |
101  bb.0.entry:
102    ; CHECK-LABEL: name: mask_extract_signed_nonneg
103    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
104    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
105    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
106    ; CHECK-NEXT: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C]](s32), [[C1]]
107    ; CHECK-NEXT: $w0 = COPY [[UBFX]](s32)
108    %0:_(s32) = COPY $w0
109    %1:_(s32) = G_CONSTANT i32 2147483647
110    %2:_(s32) = G_CONSTANT i32 29
111    %3:_(s32) = G_AND %0, %1
112    %4:_(s32) = G_ASHR %3, %2
113    $w0 = COPY %4(s32)
114...
115---
116name:            no_mask_extract_large_shift
117legalized: true
118body:             |
119  bb.0.entry:
120    ; CHECK-LABEL: name: no_mask_extract_large_shift
121    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
122    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
123    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 33
124    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
125    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
126    ; CHECK-NEXT: $w0 = COPY [[LSHR]](s32)
127    %0:_(s32) = COPY $w0
128    %1:_(s32) = G_CONSTANT i32 12
129    %2:_(s32) = G_CONSTANT i32 33
130    %3:_(s32) = G_AND %0, %1
131    %4:_(s32) = G_LSHR %3, %2
132    $w0 = COPY %4(s32)
133...
134---
135name:            no_mask_extract_negative_shift
136legalized: true
137body:             |
138  bb.0.entry:
139    ; CHECK-LABEL: name: no_mask_extract_negative_shift
140    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
141    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
142    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
143    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
144    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
145    ; CHECK-NEXT: $w0 = COPY [[LSHR]](s32)
146    %0:_(s32) = COPY $w0
147    %1:_(s32) = G_CONSTANT i32 12
148    %2:_(s32) = G_CONSTANT i32 -1
149    %3:_(s32) = G_AND %0, %1
150    %4:_(s32) = G_LSHR %3, %2
151    $w0 = COPY %4(s32)
152...
153---
154name:            no_mask_extract_disjoint
155legalized: true
156body:             |
157  bb.0.entry:
158    ; CHECK-LABEL: name: no_mask_extract_disjoint
159    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
160    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 26
161    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
162    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
163    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
164    ; CHECK-NEXT: $w0 = COPY [[LSHR]](s32)
165    %0:_(s32) = COPY $w0
166    %1:_(s32) = G_CONSTANT i32 26
167    %2:_(s32) = G_CONSTANT i32 1
168    %3:_(s32) = G_AND %0, %1
169    %4:_(s32) = G_LSHR %3, %2
170    $w0 = COPY %4(s32)
171...
172---
173name:           no_mask_extract_extra_bits
174legalized: true
175body:             |
176  bb.0.entry:
177    ; CHECK-LABEL: name: no_mask_extract_extra_bits
178    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
179    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
180    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
181    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
182    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
183    ; CHECK-NEXT: $w0 = COPY [[LSHR]](s32)
184    %0:_(s32) = COPY $w0
185    %1:_(s32) = G_CONSTANT i32 25
186    %2:_(s32) = G_CONSTANT i32 2
187    %3:_(s32) = G_AND %0, %1
188    %4:_(s32) = G_LSHR %3, %2
189    $w0 = COPY %4(s32)
190...
191---
192name:          zero_from_large_shift
193legalized: true
194body:              |
195  bb.1.entry:
196    ; CHECK-LABEL: name: zero_from_large_shift
197    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
198    ; CHECK-NEXT: $x0 = COPY [[C]](s64)
199    %2:_(s32) = COPY $w0
200    %1:_(s8) = G_TRUNC %2:_(s32)
201    %3:_(s8) = G_ASSERT_ZEXT %1:_, 1
202    %5:_(s64) = G_CONSTANT i64 1
203    %7:_(s64) = G_ANYEXT %3:_(s8)
204    %4:_(s64) = G_AND %7:_, %5:_
205    %6:_(s64) = G_LSHR %4:_, %5:_(s64)
206    $x0 = COPY %6:_(s64)
207...
208