xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll (revision 31d6a572579a5d1d9ae14a1a9d4ffbdb1b098e49) 
1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2; RUN: llc -mtriple=aarch64-linux-gnu -O0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
3
4define i8 @v1s8_add(<1 x i8> %a0) {
5  ; CHECK-LABEL: name: v1s8_add
6  ; CHECK: bb.1 (%ir-block.0):
7  ; CHECK-NEXT:   liveins: $d0
8  ; CHECK-NEXT: {{  $}}
9  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<8 x s8>) = COPY $d0
10  ; CHECK-NEXT:   [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[COPY]](<8 x s8>)
11  ; CHECK-NEXT:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s8)
12  ; CHECK-NEXT:   $w0 = COPY [[ANYEXT]](s32)
13  ; CHECK-NEXT:   RET_ReallyLR implicit $w0
14  %res = bitcast <1 x i8> %a0 to i8
15  ret i8 %res
16}
17
18define i24 @test_v3i8(<3 x i8> %a) {
19  ; CHECK-LABEL: name: test_v3i8
20  ; CHECK: bb.1 (%ir-block.0):
21  ; CHECK-NEXT:   liveins: $w0, $w1, $w2
22  ; CHECK-NEXT: {{  $}}
23  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $w0
24  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
25  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $w2
26  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
27  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(<3 x s8>) = G_TRUNC [[BUILD_VECTOR]](<3 x s32>)
28  ; CHECK-NEXT:   [[BITCAST:%[0-9]+]]:_(s24) = G_BITCAST [[TRUNC]](<3 x s8>)
29  ; CHECK-NEXT:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[BITCAST]](s24)
30  ; CHECK-NEXT:   $w0 = COPY [[ANYEXT]](s32)
31  ; CHECK-NEXT:   RET_ReallyLR implicit $w0
32  %res = bitcast <3 x i8> %a to i24
33  ret i24 %res
34}
35
36
37define <1 x half> @test_v1s16(<1 x float> %x) {
38  ; CHECK-LABEL: name: test_v1s16
39  ; CHECK: bb.1 (%ir-block.0):
40  ; CHECK-NEXT:   liveins: $d0
41  ; CHECK-NEXT: {{  $}}
42  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
43  ; CHECK-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
44  ; CHECK-NEXT:   [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[UV]](s32)
45  ; CHECK-NEXT:   $h0 = COPY [[FPTRUNC]](s16)
46  ; CHECK-NEXT:   RET_ReallyLR implicit $h0
47  %tmp = fptrunc <1 x float> %x to <1 x half>
48  ret <1 x half> %tmp
49}
50
51declare <3 x float> @bar(float)
52define void @test_return_v3f32() {
53  ; CHECK-LABEL: name: test_return_v3f32
54  ; CHECK: bb.1 (%ir-block.0):
55  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
56  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
57  ; CHECK-NEXT:   $s0 = COPY [[DEF]](s32)
58  ; CHECK-NEXT:   BL @bar, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $s0, implicit-def $q0
59  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
60  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
61  ; CHECK-NEXT:   [[BITCAST:%[0-9]+]]:_(<4 x s32>) = G_BITCAST [[COPY]](<2 x s64>)
62  ; CHECK-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BITCAST]](<4 x s32>)
63  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV2]](s32)
64  ; CHECK-NEXT:   RET_ReallyLR
65  %call = call <3 x float> @bar(float undef)
66  ret void
67}
68
69declare void @foo(<3 x i32>)
70define void @test_v3i32_arg() {
71  ; CHECK-LABEL: name: test_v3i32_arg
72  ; CHECK: bb.1 (%ir-block.0):
73  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
74  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32)
75  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
76  ; CHECK-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<3 x s32>)
77  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
78  ; CHECK-NEXT:   [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[DEF]](s32)
79  ; CHECK-NEXT:   $q0 = COPY [[BUILD_VECTOR1]](<4 x s32>)
80  ; CHECK-NEXT:   BL @foo, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $q0
81  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
82  ; CHECK-NEXT:   RET_ReallyLR
83  call void @foo(<3 x i32> zeroinitializer)
84  ret void
85}
86