xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/atomic-anyextending-load-crash.ll (revision 60fc4ac67a613e4e36cef019fb2d13d70a06cfe8)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc -global-isel -global-isel-abort=1 -O0 -o - %s | FileCheck %s
3target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
4target triple = "arm64e-apple-macosx14.0.0"
5
6define void @test(ptr %0) {
7; CHECK-LABEL: test:
8; CHECK:       ; %bb.0: ; %entry
9; CHECK-NEXT:    sub sp, sp, #144
10; CHECK-NEXT:    stp x29, x30, [sp, #128] ; 16-byte Folded Spill
11; CHECK-NEXT:    .cfi_def_cfa_offset 144
12; CHECK-NEXT:    .cfi_offset w30, -8
13; CHECK-NEXT:    .cfi_offset w29, -16
14; CHECK-NEXT:    ldar w8, [x0]
15; CHECK-NEXT:    str w8, [sp, #116] ; 4-byte Folded Spill
16; CHECK-NEXT:    mov x8, #0 ; =0x0
17; CHECK-NEXT:    str x8, [sp, #120] ; 8-byte Folded Spill
18; CHECK-NEXT:    blr x8
19; CHECK-NEXT:    ldr w11, [sp, #116] ; 4-byte Folded Reload
20; CHECK-NEXT:    ldr x8, [sp, #120] ; 8-byte Folded Reload
21; CHECK-NEXT:    mov x9, sp
22; CHECK-NEXT:    str xzr, [x9]
23; CHECK-NEXT:    str xzr, [x9, #8]
24; CHECK-NEXT:    str xzr, [x9, #16]
25; CHECK-NEXT:    str xzr, [x9, #24]
26; CHECK-NEXT:    str xzr, [x9, #32]
27; CHECK-NEXT:    str xzr, [x9, #40]
28; CHECK-NEXT:    ; implicit-def: $x10
29; CHECK-NEXT:    mov x10, x11
30; CHECK-NEXT:    str x10, [x9, #48]
31; CHECK-NEXT:    str xzr, [x9, #56]
32; CHECK-NEXT:    str xzr, [x9, #64]
33; CHECK-NEXT:    str xzr, [x9, #72]
34; CHECK-NEXT:    str xzr, [x9, #80]
35; CHECK-NEXT:    str xzr, [x9, #88]
36; CHECK-NEXT:    str xzr, [x9, #96]
37; CHECK-NEXT:    mov x0, x8
38; CHECK-NEXT:    blr x8
39; CHECK-NEXT:    ldp x29, x30, [sp, #128] ; 16-byte Folded Reload
40; CHECK-NEXT:    add sp, sp, #144
41; CHECK-NEXT:    ret
42entry:
43  %atomic-load = load atomic i32, ptr %0 seq_cst, align 4
44  %call10 = call ptr null()
45  call void (ptr, ...) null(ptr null, ptr null, i32 0, ptr null, ptr null, i32 0, i32 0, i32 %atomic-load, i32 0, i32 0, i32 0, i32 0, i64 0, ptr null)
46  ret void
47}
48