1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc < %s -mtriple=aarch64-unknown-linux-gnu -global-isel -global-isel-abort=1 -stop-after=aarch64-expand-pseudo -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,CHECK-NOLSE 3; RUN: llc < %s -mtriple=aarch64-unknown-linux-gnu -global-isel -global-isel-abort=1 -stop-after=aarch64-expand-pseudo -mattr=+rcpc -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,CHECK-LDAPR 4 5define i32 @val_compare_and_swap(ptr %p, i32 %cmp, i32 %new) { 6 ; CHECK-LABEL: name: val_compare_and_swap 7 ; CHECK: bb.0 (%ir-block.0): 8 ; CHECK-NEXT: successors: %bb.1(0x80000000) 9 ; CHECK-NEXT: liveins: $w1, $w2, $x0 10 ; CHECK-NEXT: {{ $}} 11 ; CHECK-NEXT: bb.1.cmpxchg.start: 12 ; CHECK-NEXT: successors: %bb.2(0x7c000000), %bb.3(0x04000000) 13 ; CHECK-NEXT: liveins: $w1, $w2, $x0 14 ; CHECK-NEXT: {{ $}} 15 ; CHECK-NEXT: renamable $w8 = LDAXRW renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s32) from %ir.p) 16 ; CHECK-NEXT: $wzr = SUBSWrs renamable $w8, renamable $w1, 0, implicit-def $nzcv, pcsections !0 17 ; CHECK-NEXT: Bcc 1, %bb.3, implicit killed $nzcv, pcsections !0 18 ; CHECK-NEXT: {{ $}} 19 ; CHECK-NEXT: bb.2.cmpxchg.trystore: 20 ; CHECK-NEXT: successors: %bb.4(0x04000000), %bb.1(0x7c000000) 21 ; CHECK-NEXT: liveins: $w1, $w2, $x0, $x8 22 ; CHECK-NEXT: {{ $}} 23 ; CHECK-NEXT: early-clobber renamable $w9 = STXRW renamable $w2, renamable $x0, pcsections !0 :: (volatile store (s32) into %ir.p) 24 ; CHECK-NEXT: CBNZW killed renamable $w9, %bb.1 25 ; CHECK-NEXT: B %bb.4 26 ; CHECK-NEXT: {{ $}} 27 ; CHECK-NEXT: bb.3.cmpxchg.nostore: 28 ; CHECK-NEXT: successors: %bb.4(0x80000000) 29 ; CHECK-NEXT: liveins: $x8 30 ; CHECK-NEXT: {{ $}} 31 ; CHECK-NEXT: CLREX 15, pcsections !0 32 ; CHECK-NEXT: {{ $}} 33 ; CHECK-NEXT: bb.4.cmpxchg.end: 34 ; CHECK-NEXT: liveins: $x8 35 ; CHECK-NEXT: {{ $}} 36 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 37 ; CHECK-NEXT: RET undef $lr, implicit $w0 38 %pair = cmpxchg ptr %p, i32 %cmp, i32 %new acquire acquire, !pcsections !0 39 %val = extractvalue { i32, i1 } %pair, 0 40 ret i32 %val 41} 42 43define i32 @val_compare_and_swap_from_load(ptr %p, i32 %cmp, ptr %pnew) { 44 ; CHECK-LABEL: name: val_compare_and_swap_from_load 45 ; CHECK: bb.0 (%ir-block.0): 46 ; CHECK-NEXT: successors: %bb.1(0x80000000) 47 ; CHECK-NEXT: liveins: $w1, $x0, $x2 48 ; CHECK-NEXT: {{ $}} 49 ; CHECK-NEXT: renamable $w9 = LDRWui killed renamable $x2, 0, implicit-def $x9, pcsections !0 :: (load (s32) from %ir.pnew) 50 ; CHECK-NEXT: {{ $}} 51 ; CHECK-NEXT: bb.1.cmpxchg.start: 52 ; CHECK-NEXT: successors: %bb.2(0x7c000000), %bb.3(0x04000000) 53 ; CHECK-NEXT: liveins: $w1, $x0, $x9 54 ; CHECK-NEXT: {{ $}} 55 ; CHECK-NEXT: renamable $w8 = LDAXRW renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s32) from %ir.p) 56 ; CHECK-NEXT: $wzr = SUBSWrs renamable $w8, renamable $w1, 0, implicit-def $nzcv, pcsections !0 57 ; CHECK-NEXT: Bcc 1, %bb.3, implicit killed $nzcv, pcsections !0 58 ; CHECK-NEXT: {{ $}} 59 ; CHECK-NEXT: bb.2.cmpxchg.trystore: 60 ; CHECK-NEXT: successors: %bb.4(0x04000000), %bb.1(0x7c000000) 61 ; CHECK-NEXT: liveins: $w1, $x0, $x8, $x9 62 ; CHECK-NEXT: {{ $}} 63 ; CHECK-NEXT: early-clobber renamable $w10 = STXRW renamable $w9, renamable $x0, pcsections !0 :: (volatile store (s32) into %ir.p) 64 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1 65 ; CHECK-NEXT: B %bb.4 66 ; CHECK-NEXT: {{ $}} 67 ; CHECK-NEXT: bb.3.cmpxchg.nostore: 68 ; CHECK-NEXT: successors: %bb.4(0x80000000) 69 ; CHECK-NEXT: liveins: $x8 70 ; CHECK-NEXT: {{ $}} 71 ; CHECK-NEXT: CLREX 15, pcsections !0 72 ; CHECK-NEXT: {{ $}} 73 ; CHECK-NEXT: bb.4.cmpxchg.end: 74 ; CHECK-NEXT: liveins: $x8 75 ; CHECK-NEXT: {{ $}} 76 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 77 ; CHECK-NEXT: RET undef $lr, implicit $w0 78 %new = load i32, ptr %pnew, !pcsections !0 79 %pair = cmpxchg ptr %p, i32 %cmp, i32 %new acquire acquire, !pcsections !0 80 %val = extractvalue { i32, i1 } %pair, 0 81 ret i32 %val 82} 83 84define i32 @val_compare_and_swap_rel(ptr %p, i32 %cmp, i32 %new) { 85 ; CHECK-LABEL: name: val_compare_and_swap_rel 86 ; CHECK: bb.0 (%ir-block.0): 87 ; CHECK-NEXT: successors: %bb.1(0x80000000) 88 ; CHECK-NEXT: liveins: $w1, $w2, $x0 89 ; CHECK-NEXT: {{ $}} 90 ; CHECK-NEXT: bb.1.cmpxchg.start: 91 ; CHECK-NEXT: successors: %bb.2(0x7c000000), %bb.3(0x04000000) 92 ; CHECK-NEXT: liveins: $w1, $w2, $x0 93 ; CHECK-NEXT: {{ $}} 94 ; CHECK-NEXT: renamable $w8 = LDAXRW renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s32) from %ir.p) 95 ; CHECK-NEXT: $wzr = SUBSWrs renamable $w8, renamable $w1, 0, implicit-def $nzcv, pcsections !0 96 ; CHECK-NEXT: Bcc 1, %bb.3, implicit killed $nzcv, pcsections !0 97 ; CHECK-NEXT: {{ $}} 98 ; CHECK-NEXT: bb.2.cmpxchg.trystore: 99 ; CHECK-NEXT: successors: %bb.4(0x04000000), %bb.1(0x7c000000) 100 ; CHECK-NEXT: liveins: $w1, $w2, $x0, $x8 101 ; CHECK-NEXT: {{ $}} 102 ; CHECK-NEXT: early-clobber renamable $w9 = STLXRW renamable $w2, renamable $x0, pcsections !0 :: (volatile store (s32) into %ir.p) 103 ; CHECK-NEXT: CBNZW killed renamable $w9, %bb.1 104 ; CHECK-NEXT: B %bb.4 105 ; CHECK-NEXT: {{ $}} 106 ; CHECK-NEXT: bb.3.cmpxchg.nostore: 107 ; CHECK-NEXT: successors: %bb.4(0x80000000) 108 ; CHECK-NEXT: liveins: $x8 109 ; CHECK-NEXT: {{ $}} 110 ; CHECK-NEXT: CLREX 15, pcsections !0 111 ; CHECK-NEXT: {{ $}} 112 ; CHECK-NEXT: bb.4.cmpxchg.end: 113 ; CHECK-NEXT: liveins: $x8 114 ; CHECK-NEXT: {{ $}} 115 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 116 ; CHECK-NEXT: RET undef $lr, implicit $w0 117 %pair = cmpxchg ptr %p, i32 %cmp, i32 %new acq_rel monotonic, !pcsections !0 118 %val = extractvalue { i32, i1 } %pair, 0 119 ret i32 %val 120} 121 122define i64 @val_compare_and_swap_64(ptr %p, i64 %cmp, i64 %new) { 123 ; CHECK-LABEL: name: val_compare_and_swap_64 124 ; CHECK: bb.0 (%ir-block.0): 125 ; CHECK-NEXT: successors: %bb.1(0x80000000) 126 ; CHECK-NEXT: liveins: $x0, $x1, $x2 127 ; CHECK-NEXT: {{ $}} 128 ; CHECK-NEXT: bb.1.cmpxchg.start: 129 ; CHECK-NEXT: successors: %bb.2(0x7c000000), %bb.3(0x04000000) 130 ; CHECK-NEXT: liveins: $x0, $x1, $x2 131 ; CHECK-NEXT: {{ $}} 132 ; CHECK-NEXT: renamable $x8 = LDXRX renamable $x0, pcsections !0 :: (volatile load (s64) from %ir.p) 133 ; CHECK-NEXT: $xzr = SUBSXrs renamable $x8, renamable $x1, 0, implicit-def $nzcv, pcsections !0 134 ; CHECK-NEXT: Bcc 1, %bb.3, implicit killed $nzcv, pcsections !0 135 ; CHECK-NEXT: {{ $}} 136 ; CHECK-NEXT: bb.2.cmpxchg.trystore: 137 ; CHECK-NEXT: successors: %bb.4(0x04000000), %bb.1(0x7c000000) 138 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $x8 139 ; CHECK-NEXT: {{ $}} 140 ; CHECK-NEXT: early-clobber renamable $w9 = STXRX renamable $x2, renamable $x0, pcsections !0 :: (volatile store (s64) into %ir.p) 141 ; CHECK-NEXT: CBNZW killed renamable $w9, %bb.1 142 ; CHECK-NEXT: B %bb.4 143 ; CHECK-NEXT: {{ $}} 144 ; CHECK-NEXT: bb.3.cmpxchg.nostore: 145 ; CHECK-NEXT: successors: %bb.4(0x80000000) 146 ; CHECK-NEXT: liveins: $x8 147 ; CHECK-NEXT: {{ $}} 148 ; CHECK-NEXT: CLREX 15, pcsections !0 149 ; CHECK-NEXT: {{ $}} 150 ; CHECK-NEXT: bb.4.cmpxchg.end: 151 ; CHECK-NEXT: liveins: $x8 152 ; CHECK-NEXT: {{ $}} 153 ; CHECK-NEXT: $x0 = ORRXrs $xzr, killed $x8, 0 154 ; CHECK-NEXT: RET undef $lr, implicit $x0 155 %pair = cmpxchg ptr %p, i64 %cmp, i64 %new monotonic monotonic, !pcsections !0 156 %val = extractvalue { i64, i1 } %pair, 0 157 ret i64 %val 158} 159 160define i64 @val_compare_and_swap_64_monotonic_seqcst(ptr %p, i64 %cmp, i64 %new) { 161 ; CHECK-LABEL: name: val_compare_and_swap_64_monotonic_seqcst 162 ; CHECK: bb.0 (%ir-block.0): 163 ; CHECK-NEXT: successors: %bb.1(0x80000000) 164 ; CHECK-NEXT: liveins: $x0, $x1, $x2 165 ; CHECK-NEXT: {{ $}} 166 ; CHECK-NEXT: bb.1.cmpxchg.start: 167 ; CHECK-NEXT: successors: %bb.2(0x7c000000), %bb.3(0x04000000) 168 ; CHECK-NEXT: liveins: $x0, $x1, $x2 169 ; CHECK-NEXT: {{ $}} 170 ; CHECK-NEXT: renamable $x8 = LDAXRX renamable $x0, pcsections !0 :: (volatile load (s64) from %ir.p) 171 ; CHECK-NEXT: $xzr = SUBSXrs renamable $x8, renamable $x1, 0, implicit-def $nzcv, pcsections !0 172 ; CHECK-NEXT: Bcc 1, %bb.3, implicit killed $nzcv, pcsections !0 173 ; CHECK-NEXT: {{ $}} 174 ; CHECK-NEXT: bb.2.cmpxchg.trystore: 175 ; CHECK-NEXT: successors: %bb.4(0x04000000), %bb.1(0x7c000000) 176 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $x8 177 ; CHECK-NEXT: {{ $}} 178 ; CHECK-NEXT: early-clobber renamable $w9 = STLXRX renamable $x2, renamable $x0, pcsections !0 :: (volatile store (s64) into %ir.p) 179 ; CHECK-NEXT: CBNZW killed renamable $w9, %bb.1 180 ; CHECK-NEXT: B %bb.4 181 ; CHECK-NEXT: {{ $}} 182 ; CHECK-NEXT: bb.3.cmpxchg.nostore: 183 ; CHECK-NEXT: successors: %bb.4(0x80000000) 184 ; CHECK-NEXT: liveins: $x8 185 ; CHECK-NEXT: {{ $}} 186 ; CHECK-NEXT: CLREX 15, pcsections !0 187 ; CHECK-NEXT: {{ $}} 188 ; CHECK-NEXT: bb.4.cmpxchg.end: 189 ; CHECK-NEXT: liveins: $x8 190 ; CHECK-NEXT: {{ $}} 191 ; CHECK-NEXT: $x0 = ORRXrs $xzr, killed $x8, 0 192 ; CHECK-NEXT: RET undef $lr, implicit $x0 193 %pair = cmpxchg ptr %p, i64 %cmp, i64 %new monotonic seq_cst, !pcsections !0 194 %val = extractvalue { i64, i1 } %pair, 0 195 ret i64 %val 196} 197 198define i64 @val_compare_and_swap_64_release_acquire(ptr %p, i64 %cmp, i64 %new) { 199 ; CHECK-LABEL: name: val_compare_and_swap_64_release_acquire 200 ; CHECK: bb.0 (%ir-block.0): 201 ; CHECK-NEXT: successors: %bb.1(0x80000000) 202 ; CHECK-NEXT: liveins: $x0, $x1, $x2 203 ; CHECK-NEXT: {{ $}} 204 ; CHECK-NEXT: bb.1.cmpxchg.start: 205 ; CHECK-NEXT: successors: %bb.2(0x7c000000), %bb.3(0x04000000) 206 ; CHECK-NEXT: liveins: $x0, $x1, $x2 207 ; CHECK-NEXT: {{ $}} 208 ; CHECK-NEXT: renamable $x8 = LDAXRX renamable $x0, pcsections !0 :: (volatile load (s64) from %ir.p) 209 ; CHECK-NEXT: $xzr = SUBSXrs renamable $x8, renamable $x1, 0, implicit-def $nzcv, pcsections !0 210 ; CHECK-NEXT: Bcc 1, %bb.3, implicit killed $nzcv, pcsections !0 211 ; CHECK-NEXT: {{ $}} 212 ; CHECK-NEXT: bb.2.cmpxchg.trystore: 213 ; CHECK-NEXT: successors: %bb.4(0x04000000), %bb.1(0x7c000000) 214 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $x8 215 ; CHECK-NEXT: {{ $}} 216 ; CHECK-NEXT: early-clobber renamable $w9 = STLXRX renamable $x2, renamable $x0, pcsections !0 :: (volatile store (s64) into %ir.p) 217 ; CHECK-NEXT: CBNZW killed renamable $w9, %bb.1 218 ; CHECK-NEXT: B %bb.4 219 ; CHECK-NEXT: {{ $}} 220 ; CHECK-NEXT: bb.3.cmpxchg.nostore: 221 ; CHECK-NEXT: successors: %bb.4(0x80000000) 222 ; CHECK-NEXT: liveins: $x8 223 ; CHECK-NEXT: {{ $}} 224 ; CHECK-NEXT: CLREX 15, pcsections !0 225 ; CHECK-NEXT: {{ $}} 226 ; CHECK-NEXT: bb.4.cmpxchg.end: 227 ; CHECK-NEXT: liveins: $x8 228 ; CHECK-NEXT: {{ $}} 229 ; CHECK-NEXT: $x0 = ORRXrs $xzr, killed $x8, 0 230 ; CHECK-NEXT: RET undef $lr, implicit $x0 231 %pair = cmpxchg ptr %p, i64 %cmp, i64 %new release acquire, !pcsections !0 232 %val = extractvalue { i64, i1 } %pair, 0 233 ret i64 %val 234} 235 236define i32 @fetch_and_nand(ptr %p) { 237 ; CHECK-LABEL: name: fetch_and_nand 238 ; CHECK: bb.0 (%ir-block.0): 239 ; CHECK-NEXT: successors: %bb.1(0x80000000) 240 ; CHECK-NEXT: liveins: $x0 241 ; CHECK-NEXT: {{ $}} 242 ; CHECK-NEXT: bb.1.atomicrmw.start: 243 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 244 ; CHECK-NEXT: liveins: $x0 245 ; CHECK-NEXT: {{ $}} 246 ; CHECK-NEXT: renamable $w8 = LDXRW renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s32) from %ir.p) 247 ; CHECK-NEXT: renamable $w9 = ANDWri renamable $w8, 2, pcsections !0 248 ; CHECK-NEXT: $w9 = ORNWrs $wzr, killed renamable $w9, 0, pcsections !0 249 ; CHECK-NEXT: early-clobber renamable $w10 = STLXRW killed renamable $w9, renamable $x0, pcsections !0 :: (volatile store (s32) into %ir.p) 250 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 251 ; CHECK-NEXT: {{ $}} 252 ; CHECK-NEXT: bb.2.atomicrmw.end: 253 ; CHECK-NEXT: liveins: $x8 254 ; CHECK-NEXT: {{ $}} 255 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 256 ; CHECK-NEXT: RET undef $lr, implicit $w0 257 %val = atomicrmw nand ptr %p, i32 7 release, !pcsections !0 258 ret i32 %val 259} 260 261define i64 @fetch_and_nand_64(ptr %p) { 262 ; CHECK-LABEL: name: fetch_and_nand_64 263 ; CHECK: bb.0 (%ir-block.0): 264 ; CHECK-NEXT: successors: %bb.1(0x80000000) 265 ; CHECK-NEXT: liveins: $x0 266 ; CHECK-NEXT: {{ $}} 267 ; CHECK-NEXT: bb.1.atomicrmw.start: 268 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 269 ; CHECK-NEXT: liveins: $x0 270 ; CHECK-NEXT: {{ $}} 271 ; CHECK-NEXT: renamable $x8 = LDAXRX renamable $x0, pcsections !0 :: (volatile load (s64) from %ir.p) 272 ; CHECK-NEXT: renamable $x9 = ANDXri renamable $x8, 4098, pcsections !0 273 ; CHECK-NEXT: $x9 = ORNXrs $xzr, killed renamable $x9, 0, pcsections !0 274 ; CHECK-NEXT: early-clobber renamable $w10 = STLXRX killed renamable $x9, renamable $x0, pcsections !0 :: (volatile store (s64) into %ir.p) 275 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 276 ; CHECK-NEXT: {{ $}} 277 ; CHECK-NEXT: bb.2.atomicrmw.end: 278 ; CHECK-NEXT: liveins: $x8 279 ; CHECK-NEXT: {{ $}} 280 ; CHECK-NEXT: $x0 = ORRXrs $xzr, killed $x8, 0 281 ; CHECK-NEXT: RET undef $lr, implicit $x0 282 %val = atomicrmw nand ptr %p, i64 7 acq_rel, !pcsections !0 283 ret i64 %val 284} 285 286define i32 @fetch_and_or(ptr %p) { 287 ; CHECK-LABEL: name: fetch_and_or 288 ; CHECK: bb.0 (%ir-block.0): 289 ; CHECK-NEXT: successors: %bb.1(0x80000000) 290 ; CHECK-NEXT: liveins: $x0 291 ; CHECK-NEXT: {{ $}} 292 ; CHECK-NEXT: renamable $w9 = MOVZWi 5, 0 293 ; CHECK-NEXT: {{ $}} 294 ; CHECK-NEXT: bb.1.atomicrmw.start: 295 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 296 ; CHECK-NEXT: liveins: $w9, $x0 297 ; CHECK-NEXT: {{ $}} 298 ; CHECK-NEXT: renamable $w8 = LDAXRW renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s32) from %ir.p) 299 ; CHECK-NEXT: $w10 = ORRWrs renamable $w8, renamable $w9, 0, pcsections !0 300 ; CHECK-NEXT: early-clobber renamable $w11 = STLXRW killed renamable $w10, renamable $x0, pcsections !0 :: (volatile store (s32) into %ir.p) 301 ; CHECK-NEXT: CBNZW killed renamable $w11, %bb.1, pcsections !0 302 ; CHECK-NEXT: {{ $}} 303 ; CHECK-NEXT: bb.2.atomicrmw.end: 304 ; CHECK-NEXT: liveins: $x8 305 ; CHECK-NEXT: {{ $}} 306 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 307 ; CHECK-NEXT: RET undef $lr, implicit $w0 308 %val = atomicrmw or ptr %p, i32 5 seq_cst, !pcsections !0 309 ret i32 %val 310} 311 312define i64 @fetch_and_or_64(ptr %p) { 313 ; CHECK-LABEL: name: fetch_and_or_64 314 ; CHECK: bb.0 (%ir-block.0): 315 ; CHECK-NEXT: successors: %bb.1(0x80000000) 316 ; CHECK-NEXT: liveins: $x0 317 ; CHECK-NEXT: {{ $}} 318 ; CHECK-NEXT: bb.1.atomicrmw.start: 319 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 320 ; CHECK-NEXT: liveins: $x0 321 ; CHECK-NEXT: {{ $}} 322 ; CHECK-NEXT: renamable $x8 = LDXRX renamable $x0, pcsections !0 :: (volatile load (s64) from %ir.p) 323 ; CHECK-NEXT: renamable $x9 = ORRXri renamable $x8, 4098, pcsections !0 324 ; CHECK-NEXT: early-clobber renamable $w10 = STXRX killed renamable $x9, renamable $x0, pcsections !0 :: (volatile store (s64) into %ir.p) 325 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 326 ; CHECK-NEXT: {{ $}} 327 ; CHECK-NEXT: bb.2.atomicrmw.end: 328 ; CHECK-NEXT: liveins: $x8 329 ; CHECK-NEXT: {{ $}} 330 ; CHECK-NEXT: $x0 = ORRXrs $xzr, killed $x8, 0 331 ; CHECK-NEXT: RET undef $lr, implicit $x0 332 %val = atomicrmw or ptr %p, i64 7 monotonic, !pcsections !0 333 ret i64 %val 334} 335 336define void @acquire_fence() { 337 ; CHECK-LABEL: name: acquire_fence 338 ; CHECK: bb.0 (%ir-block.0): 339 ; CHECK-NEXT: DMB 9, pcsections !0 340 ; CHECK-NEXT: RET undef $lr 341 fence acquire, !pcsections !0 342 ret void 343} 344 345define void @release_fence() { 346 ; CHECK-LABEL: name: release_fence 347 ; CHECK: bb.0 (%ir-block.0): 348 ; CHECK-NEXT: DMB 11, pcsections !0 349 ; CHECK-NEXT: RET undef $lr 350 fence release, !pcsections !0 351 ret void 352} 353 354define void @seq_cst_fence() { 355 ; CHECK-LABEL: name: seq_cst_fence 356 ; CHECK: bb.0 (%ir-block.0): 357 ; CHECK-NEXT: DMB 11, pcsections !0 358 ; CHECK-NEXT: RET undef $lr 359 fence seq_cst, !pcsections !0 360 ret void 361} 362 363define i32 @atomic_load(ptr %p) { 364 ; CHECK-LABEL: name: atomic_load 365 ; CHECK: bb.0 (%ir-block.0): 366 ; CHECK-NEXT: liveins: $x0 367 ; CHECK-NEXT: {{ $}} 368 ; CHECK-NEXT: renamable $w0 = LDARW killed renamable $x0, pcsections !0 :: (load seq_cst (s32) from %ir.p) 369 ; CHECK-NEXT: RET undef $lr, implicit $w0 370 %r = load atomic i32, ptr %p seq_cst, align 4, !pcsections !0 371 ret i32 %r 372} 373 374define i8 @atomic_load_relaxed_8(ptr %p, i32 %off32) { 375 ; CHECK-LABEL: name: atomic_load_relaxed_8 376 ; CHECK: bb.0 (%ir-block.0): 377 ; CHECK-NEXT: liveins: $w1, $x0 378 ; CHECK-NEXT: {{ $}} 379 ; CHECK-NEXT: renamable $w8 = LDRBBui renamable $x0, 4095, pcsections !0 :: (load monotonic (s8) from %ir.ptr_unsigned) 380 ; CHECK-NEXT: renamable $w9 = LDRBBroW renamable $x0, killed renamable $w1, 1, 0 :: (load unordered (s8) from %ir.ptr_regoff) 381 ; CHECK-NEXT: renamable $w10 = LDURBBi renamable $x0, -256 :: (load monotonic (s8) from %ir.ptr_unscaled) 382 ; CHECK-NEXT: renamable $w8 = ADDWrx killed renamable $w9, killed renamable $w8, 0, pcsections !0 383 ; CHECK-NEXT: renamable $x9 = ADDXri killed renamable $x0, 291, 12 384 ; CHECK-NEXT: renamable $w8 = ADDWrx killed renamable $w8, killed renamable $w10, 0, pcsections !0 385 ; CHECK-NEXT: renamable $w9 = LDRBBui killed renamable $x9, 0, pcsections !0 :: (load unordered (s8) from %ir.ptr_random) 386 ; CHECK-NEXT: renamable $w0 = ADDWrx killed renamable $w8, killed renamable $w9, 0, pcsections !0 387 ; CHECK-NEXT: RET undef $lr, implicit $w0 388 %ptr_unsigned = getelementptr i8, ptr %p, i32 4095 389 %val_unsigned = load atomic i8, ptr %ptr_unsigned monotonic, align 1, !pcsections !0 390 391 %ptr_regoff = getelementptr i8, ptr %p, i32 %off32 392 %val_regoff = load atomic i8, ptr %ptr_regoff unordered, align 1, !pcsections !0 393 %tot1 = add i8 %val_unsigned, %val_regoff, !pcsections !0 394 395 %ptr_unscaled = getelementptr i8, ptr %p, i32 -256 396 %val_unscaled = load atomic i8, ptr %ptr_unscaled monotonic, align 1, !pcsections !0 397 %tot2 = add i8 %tot1, %val_unscaled, !pcsections !0 398 399 %ptr_random = getelementptr i8, ptr %p, i32 1191936 ; 0x123000 (i.e. ADD imm) 400 %val_random = load atomic i8, ptr %ptr_random unordered, align 1, !pcsections !0 401 %tot3 = add i8 %tot2, %val_random, !pcsections !0 402 403 ret i8 %tot3 404} 405 406define i16 @atomic_load_relaxed_16(ptr %p, i32 %off32) { 407 ; CHECK-LABEL: name: atomic_load_relaxed_16 408 ; CHECK: bb.0 (%ir-block.0): 409 ; CHECK-NEXT: liveins: $w1, $x0 410 ; CHECK-NEXT: {{ $}} 411 ; CHECK-NEXT: renamable $w8 = LDRHHui renamable $x0, 4095, pcsections !0 :: (load monotonic (s16) from %ir.ptr_unsigned) 412 ; CHECK-NEXT: renamable $w9 = LDRHHroW renamable $x0, killed renamable $w1, 1, 1 :: (load unordered (s16) from %ir.ptr_regoff) 413 ; CHECK-NEXT: renamable $w10 = LDURHHi renamable $x0, -256 :: (load monotonic (s16) from %ir.ptr_unscaled) 414 ; CHECK-NEXT: renamable $w8 = ADDWrx killed renamable $w9, killed renamable $w8, 8, pcsections !0 415 ; CHECK-NEXT: renamable $x9 = ADDXri killed renamable $x0, 291, 12 416 ; CHECK-NEXT: renamable $w8 = ADDWrx killed renamable $w8, killed renamable $w10, 8, pcsections !0 417 ; CHECK-NEXT: renamable $w9 = LDRHHui killed renamable $x9, 0, pcsections !0 :: (load unordered (s16) from %ir.ptr_random) 418 ; CHECK-NEXT: renamable $w0 = ADDWrx killed renamable $w8, killed renamable $w9, 8, pcsections !0 419 ; CHECK-NEXT: RET undef $lr, implicit $w0 420 %ptr_unsigned = getelementptr i16, ptr %p, i32 4095 421 %val_unsigned = load atomic i16, ptr %ptr_unsigned monotonic, align 2, !pcsections !0 422 423 %ptr_regoff = getelementptr i16, ptr %p, i32 %off32 424 %val_regoff = load atomic i16, ptr %ptr_regoff unordered, align 2, !pcsections !0 425 %tot1 = add i16 %val_unsigned, %val_regoff, !pcsections !0 426 427 %ptr_unscaled = getelementptr i16, ptr %p, i32 -128 428 %val_unscaled = load atomic i16, ptr %ptr_unscaled monotonic, align 2, !pcsections !0 429 %tot2 = add i16 %tot1, %val_unscaled, !pcsections !0 430 431 %ptr_random = getelementptr i16, ptr %p, i32 595968 ; 0x123000/2 (i.e. ADD imm) 432 %val_random = load atomic i16, ptr %ptr_random unordered, align 2, !pcsections !0 433 %tot3 = add i16 %tot2, %val_random, !pcsections !0 434 435 ret i16 %tot3 436} 437 438define i32 @atomic_load_relaxed_32(ptr %p, i32 %off32) { 439 ; CHECK-LABEL: name: atomic_load_relaxed_32 440 ; CHECK: bb.0 (%ir-block.0): 441 ; CHECK-NEXT: liveins: $w1, $x0 442 ; CHECK-NEXT: {{ $}} 443 ; CHECK-NEXT: renamable $w8 = LDRWui renamable $x0, 4095, pcsections !0 :: (load monotonic (s32) from %ir.ptr_unsigned) 444 ; CHECK-NEXT: renamable $w9 = LDRWroW renamable $x0, killed renamable $w1, 1, 1, pcsections !0 :: (load unordered (s32) from %ir.ptr_regoff) 445 ; CHECK-NEXT: renamable $w10 = LDURWi renamable $x0, -256, pcsections !0 :: (load monotonic (s32) from %ir.ptr_unscaled) 446 ; CHECK-NEXT: renamable $x11 = ADDXri killed renamable $x0, 291, 12 447 ; CHECK-NEXT: $w8 = ADDWrs killed renamable $w8, killed renamable $w9, 0, pcsections !0 448 ; CHECK-NEXT: renamable $w9 = LDRWui killed renamable $x11, 0, pcsections !0 :: (load unordered (s32) from %ir.ptr_random) 449 ; CHECK-NEXT: $w8 = ADDWrs killed renamable $w8, killed renamable $w10, 0, pcsections !0 450 ; CHECK-NEXT: $w0 = ADDWrs killed renamable $w8, killed renamable $w9, 0, pcsections !0 451 ; CHECK-NEXT: RET undef $lr, implicit $w0 452 %ptr_unsigned = getelementptr i32, ptr %p, i32 4095 453 %val_unsigned = load atomic i32, ptr %ptr_unsigned monotonic, align 4, !pcsections !0 454 455 %ptr_regoff = getelementptr i32, ptr %p, i32 %off32 456 %val_regoff = load atomic i32, ptr %ptr_regoff unordered, align 4, !pcsections !0 457 %tot1 = add i32 %val_unsigned, %val_regoff, !pcsections !0 458 459 %ptr_unscaled = getelementptr i32, ptr %p, i32 -64 460 %val_unscaled = load atomic i32, ptr %ptr_unscaled monotonic, align 4, !pcsections !0 461 %tot2 = add i32 %tot1, %val_unscaled, !pcsections !0 462 463 %ptr_random = getelementptr i32, ptr %p, i32 297984 ; 0x123000/4 (i.e. ADD imm) 464 %val_random = load atomic i32, ptr %ptr_random unordered, align 4, !pcsections !0 465 %tot3 = add i32 %tot2, %val_random, !pcsections !0 466 467 ret i32 %tot3 468} 469 470define i64 @atomic_load_relaxed_64(ptr %p, i32 %off32) { 471 ; CHECK-LABEL: name: atomic_load_relaxed_64 472 ; CHECK: bb.0 (%ir-block.0): 473 ; CHECK-NEXT: liveins: $w1, $x0 474 ; CHECK-NEXT: {{ $}} 475 ; CHECK-NEXT: renamable $x8 = LDRXui renamable $x0, 4095, pcsections !0 :: (load monotonic (s64) from %ir.ptr_unsigned) 476 ; CHECK-NEXT: renamable $x9 = LDRXroW renamable $x0, killed renamable $w1, 1, 1, pcsections !0 :: (load unordered (s64) from %ir.ptr_regoff) 477 ; CHECK-NEXT: renamable $x10 = LDURXi renamable $x0, -256, pcsections !0 :: (load monotonic (s64) from %ir.ptr_unscaled) 478 ; CHECK-NEXT: renamable $x11 = ADDXri killed renamable $x0, 291, 12 479 ; CHECK-NEXT: $x8 = ADDXrs killed renamable $x8, killed renamable $x9, 0, pcsections !0 480 ; CHECK-NEXT: renamable $x9 = LDRXui killed renamable $x11, 0, pcsections !0 :: (load unordered (s64) from %ir.ptr_random) 481 ; CHECK-NEXT: $x8 = ADDXrs killed renamable $x8, killed renamable $x10, 0, pcsections !0 482 ; CHECK-NEXT: $x0 = ADDXrs killed renamable $x8, killed renamable $x9, 0, pcsections !0 483 ; CHECK-NEXT: RET undef $lr, implicit $x0 484 %ptr_unsigned = getelementptr i64, ptr %p, i32 4095 485 %val_unsigned = load atomic i64, ptr %ptr_unsigned monotonic, align 8, !pcsections !0 486 487 %ptr_regoff = getelementptr i64, ptr %p, i32 %off32 488 %val_regoff = load atomic i64, ptr %ptr_regoff unordered, align 8, !pcsections !0 489 %tot1 = add i64 %val_unsigned, %val_regoff, !pcsections !0 490 491 %ptr_unscaled = getelementptr i64, ptr %p, i32 -32 492 %val_unscaled = load atomic i64, ptr %ptr_unscaled monotonic, align 8, !pcsections !0 493 %tot2 = add i64 %tot1, %val_unscaled, !pcsections !0 494 495 %ptr_random = getelementptr i64, ptr %p, i32 148992 ; 0x123000/8 (i.e. ADD imm) 496 %val_random = load atomic i64, ptr %ptr_random unordered, align 8, !pcsections !0 497 %tot3 = add i64 %tot2, %val_random, !pcsections !0 498 499 ret i64 %tot3 500} 501 502 503define void @atomc_store(ptr %p) { 504 ; CHECK-LABEL: name: atomc_store 505 ; CHECK: bb.0 (%ir-block.0): 506 ; CHECK-NEXT: liveins: $x0 507 ; CHECK-NEXT: {{ $}} 508 ; CHECK-NEXT: renamable $w8 = MOVZWi 4, 0 509 ; CHECK-NEXT: STLRW killed renamable $w8, killed renamable $x0, pcsections !0 :: (store seq_cst (s32) into %ir.p) 510 ; CHECK-NEXT: RET undef $lr 511 store atomic i32 4, ptr %p seq_cst, align 4, !pcsections !0 512 ret void 513} 514 515define void @atomic_store_relaxed_8(ptr %p, i32 %off32, i8 %val) { 516 ; CHECK-LABEL: name: atomic_store_relaxed_8 517 ; CHECK: bb.0 (%ir-block.0): 518 ; CHECK-NEXT: liveins: $w1, $w2, $x0 519 ; CHECK-NEXT: {{ $}} 520 ; CHECK-NEXT: STRBBui renamable $w2, renamable $x0, 4095, pcsections !0 :: (store monotonic (s8) into %ir.ptr_unsigned) 521 ; CHECK-NEXT: STRBBroW renamable $w2, renamable $x0, killed renamable $w1, 1, 0, pcsections !0 :: (store unordered (s8) into %ir.ptr_regoff) 522 ; CHECK-NEXT: STURBBi renamable $w2, renamable $x0, -256, pcsections !0 :: (store monotonic (s8) into %ir.ptr_unscaled) 523 ; CHECK-NEXT: renamable $x8 = ADDXri killed renamable $x0, 291, 12 524 ; CHECK-NEXT: STRBBui killed renamable $w2, killed renamable $x8, 0, pcsections !0 :: (store unordered (s8) into %ir.ptr_random) 525 ; CHECK-NEXT: RET undef $lr 526 %ptr_unsigned = getelementptr i8, ptr %p, i32 4095 527 store atomic i8 %val, ptr %ptr_unsigned monotonic, align 1, !pcsections !0 528 529 %ptr_regoff = getelementptr i8, ptr %p, i32 %off32 530 store atomic i8 %val, ptr %ptr_regoff unordered, align 1, !pcsections !0 531 532 %ptr_unscaled = getelementptr i8, ptr %p, i32 -256 533 store atomic i8 %val, ptr %ptr_unscaled monotonic, align 1, !pcsections !0 534 535 %ptr_random = getelementptr i8, ptr %p, i32 1191936 ; 0x123000 (i.e. ADD imm) 536 store atomic i8 %val, ptr %ptr_random unordered, align 1, !pcsections !0 537 538 ret void 539} 540 541define void @atomic_store_relaxed_16(ptr %p, i32 %off32, i16 %val) { 542 ; CHECK-LABEL: name: atomic_store_relaxed_16 543 ; CHECK: bb.0 (%ir-block.0): 544 ; CHECK-NEXT: liveins: $w1, $w2, $x0 545 ; CHECK-NEXT: {{ $}} 546 ; CHECK-NEXT: STRHHui renamable $w2, renamable $x0, 4095, pcsections !0 :: (store monotonic (s16) into %ir.ptr_unsigned) 547 ; CHECK-NEXT: STRHHroW renamable $w2, renamable $x0, killed renamable $w1, 1, 1, pcsections !0 :: (store unordered (s16) into %ir.ptr_regoff) 548 ; CHECK-NEXT: STURHHi renamable $w2, renamable $x0, -256, pcsections !0 :: (store monotonic (s16) into %ir.ptr_unscaled) 549 ; CHECK-NEXT: renamable $x8 = ADDXri killed renamable $x0, 291, 12 550 ; CHECK-NEXT: STRHHui killed renamable $w2, killed renamable $x8, 0, pcsections !0 :: (store unordered (s16) into %ir.ptr_random) 551 ; CHECK-NEXT: RET undef $lr 552 %ptr_unsigned = getelementptr i16, ptr %p, i32 4095 553 store atomic i16 %val, ptr %ptr_unsigned monotonic, align 2, !pcsections !0 554 555 %ptr_regoff = getelementptr i16, ptr %p, i32 %off32 556 store atomic i16 %val, ptr %ptr_regoff unordered, align 2, !pcsections !0 557 558 %ptr_unscaled = getelementptr i16, ptr %p, i32 -128 559 store atomic i16 %val, ptr %ptr_unscaled monotonic, align 2, !pcsections !0 560 561 %ptr_random = getelementptr i16, ptr %p, i32 595968 ; 0x123000/2 (i.e. ADD imm) 562 store atomic i16 %val, ptr %ptr_random unordered, align 2, !pcsections !0 563 564 ret void 565} 566 567define void @atomic_store_relaxed_32(ptr %p, i32 %off32, i32 %val) { 568 ; CHECK-LABEL: name: atomic_store_relaxed_32 569 ; CHECK: bb.0 (%ir-block.0): 570 ; CHECK-NEXT: liveins: $w1, $w2, $x0 571 ; CHECK-NEXT: {{ $}} 572 ; CHECK-NEXT: STRWui renamable $w2, renamable $x0, 4095, pcsections !0 :: (store monotonic (s32) into %ir.ptr_unsigned) 573 ; CHECK-NEXT: STRWroW renamable $w2, renamable $x0, killed renamable $w1, 1, 1, pcsections !0 :: (store unordered (s32) into %ir.ptr_regoff) 574 ; CHECK-NEXT: STURWi renamable $w2, renamable $x0, -256, pcsections !0 :: (store monotonic (s32) into %ir.ptr_unscaled) 575 ; CHECK-NEXT: renamable $x8 = ADDXri killed renamable $x0, 291, 12 576 ; CHECK-NEXT: STRWui killed renamable $w2, killed renamable $x8, 0, pcsections !0 :: (store unordered (s32) into %ir.ptr_random) 577 ; CHECK-NEXT: RET undef $lr 578 %ptr_unsigned = getelementptr i32, ptr %p, i32 4095 579 store atomic i32 %val, ptr %ptr_unsigned monotonic, align 4, !pcsections !0 580 581 %ptr_regoff = getelementptr i32, ptr %p, i32 %off32 582 store atomic i32 %val, ptr %ptr_regoff unordered, align 4, !pcsections !0 583 584 %ptr_unscaled = getelementptr i32, ptr %p, i32 -64 585 store atomic i32 %val, ptr %ptr_unscaled monotonic, align 4, !pcsections !0 586 587 %ptr_random = getelementptr i32, ptr %p, i32 297984 ; 0x123000/4 (i.e. ADD imm) 588 store atomic i32 %val, ptr %ptr_random unordered, align 4, !pcsections !0 589 590 ret void 591} 592 593define void @atomic_store_relaxed_64(ptr %p, i32 %off32, i64 %val) { 594 ; CHECK-LABEL: name: atomic_store_relaxed_64 595 ; CHECK: bb.0 (%ir-block.0): 596 ; CHECK-NEXT: liveins: $w1, $x0, $x2 597 ; CHECK-NEXT: {{ $}} 598 ; CHECK-NEXT: STRXui renamable $x2, renamable $x0, 4095, pcsections !0 :: (store monotonic (s64) into %ir.ptr_unsigned) 599 ; CHECK-NEXT: STRXroW renamable $x2, renamable $x0, killed renamable $w1, 1, 1, pcsections !0 :: (store unordered (s64) into %ir.ptr_regoff) 600 ; CHECK-NEXT: STURXi renamable $x2, renamable $x0, -256, pcsections !0 :: (store monotonic (s64) into %ir.ptr_unscaled) 601 ; CHECK-NEXT: renamable $x8 = ADDXri killed renamable $x0, 291, 12 602 ; CHECK-NEXT: STRXui killed renamable $x2, killed renamable $x8, 0, pcsections !0 :: (store unordered (s64) into %ir.ptr_random) 603 ; CHECK-NEXT: RET undef $lr 604 %ptr_unsigned = getelementptr i64, ptr %p, i32 4095 605 store atomic i64 %val, ptr %ptr_unsigned monotonic, align 8, !pcsections !0 606 607 %ptr_regoff = getelementptr i64, ptr %p, i32 %off32 608 store atomic i64 %val, ptr %ptr_regoff unordered, align 8, !pcsections !0 609 610 %ptr_unscaled = getelementptr i64, ptr %p, i32 -32 611 store atomic i64 %val, ptr %ptr_unscaled monotonic, align 8, !pcsections !0 612 613 %ptr_random = getelementptr i64, ptr %p, i32 148992 ; 0x123000/8 (i.e. ADD imm) 614 store atomic i64 %val, ptr %ptr_random unordered, align 8, !pcsections !0 615 616 ret void 617} 618 619define i32 @load_zext(ptr %p8, ptr %p16) { 620 ; CHECK-NOLSE-LABEL: name: load_zext 621 ; CHECK-NOLSE: bb.0 (%ir-block.0): 622 ; CHECK-NOLSE-NEXT: liveins: $x0, $x1 623 ; CHECK-NOLSE-NEXT: {{ $}} 624 ; CHECK-NOLSE-NEXT: renamable $w8 = LDARB killed renamable $x0, pcsections !0 :: (load acquire (s8) from %ir.p8) 625 ; CHECK-NOLSE-NEXT: renamable $w9 = LDRHHui killed renamable $x1, 0, pcsections !0 :: (load unordered (s16) from %ir.p16) 626 ; CHECK-NOLSE-NEXT: renamable $w0 = ADDWrx killed renamable $w9, killed renamable $w8, 0, pcsections !0 627 ; CHECK-NOLSE-NEXT: RET undef $lr, implicit $w0 628 ; 629 ; CHECK-LDAPR-LABEL: name: load_zext 630 ; CHECK-LDAPR: bb.0 (%ir-block.0): 631 ; CHECK-LDAPR-NEXT: liveins: $x0, $x1 632 ; CHECK-LDAPR-NEXT: {{ $}} 633 ; CHECK-LDAPR-NEXT: renamable $w8 = LDAPRB killed renamable $x0, pcsections !0 :: (load acquire (s8) from %ir.p8) 634 ; CHECK-LDAPR-NEXT: renamable $w9 = LDRHHui killed renamable $x1, 0, pcsections !0 :: (load unordered (s16) from %ir.p16) 635 ; CHECK-LDAPR-NEXT: renamable $w0 = ADDWrx killed renamable $w9, killed renamable $w8, 0, pcsections !0 636 ; CHECK-LDAPR-NEXT: RET undef $lr, implicit $w0 637 %val1.8 = load atomic i8, ptr %p8 acquire, align 1, !pcsections !0 638 %val1 = zext i8 %val1.8 to i32 639 640 %val2.16 = load atomic i16, ptr %p16 unordered, align 2, !pcsections !0 641 %val2 = zext i16 %val2.16 to i32 642 643 %res = add i32 %val1, %val2, !pcsections !0 644 ret i32 %res 645} 646 647define { i32, i64 } @load_acq(ptr %p32, ptr %p64) { 648 ; CHECK-NOLSE-LABEL: name: load_acq 649 ; CHECK-NOLSE: bb.0 (%ir-block.0): 650 ; CHECK-NOLSE-NEXT: liveins: $x0, $x1 651 ; CHECK-NOLSE-NEXT: {{ $}} 652 ; CHECK-NOLSE-NEXT: renamable $w0 = LDARW killed renamable $x0, pcsections !0 :: (load seq_cst (s32) from %ir.p32) 653 ; CHECK-NOLSE-NEXT: renamable $x1 = LDARX killed renamable $x1, pcsections !0 :: (load acquire (s64) from %ir.p64) 654 ; CHECK-NOLSE-NEXT: RET undef $lr, implicit $w0, implicit $x1 655 ; 656 ; CHECK-LDAPR-LABEL: name: load_acq 657 ; CHECK-LDAPR: bb.0 (%ir-block.0): 658 ; CHECK-LDAPR-NEXT: liveins: $x0, $x1 659 ; CHECK-LDAPR-NEXT: {{ $}} 660 ; CHECK-LDAPR-NEXT: renamable $w0 = LDARW killed renamable $x0, pcsections !0 :: (load seq_cst (s32) from %ir.p32) 661 ; CHECK-LDAPR-NEXT: renamable $x1 = LDAPRX killed renamable $x1, pcsections !0 :: (load acquire (s64) from %ir.p64) 662 ; CHECK-LDAPR-NEXT: RET undef $lr, implicit $w0, implicit $x1 663 %val32 = load atomic i32, ptr %p32 seq_cst, align 4, !pcsections !0 664 %tmp = insertvalue { i32, i64 } undef, i32 %val32, 0 665 666 %val64 = load atomic i64, ptr %p64 acquire, align 8, !pcsections !0 667 %res = insertvalue { i32, i64 } %tmp, i64 %val64, 1 668 669 ret { i32, i64 } %res 670} 671 672define i32 @load_sext(ptr %p8, ptr %p16) { 673 ; CHECK-NOLSE-LABEL: name: load_sext 674 ; CHECK-NOLSE: bb.0 (%ir-block.0): 675 ; CHECK-NOLSE-NEXT: liveins: $x0, $x1 676 ; CHECK-NOLSE-NEXT: {{ $}} 677 ; CHECK-NOLSE-NEXT: renamable $w8 = LDARB killed renamable $x0, pcsections !0 :: (load acquire (s8) from %ir.p8) 678 ; CHECK-NOLSE-NEXT: renamable $w9 = LDRHHui killed renamable $x1, 0, pcsections !0 :: (load unordered (s16) from %ir.p16) 679 ; CHECK-NOLSE-NEXT: renamable $w9 = SBFMWri killed renamable $w9, 0, 15 680 ; CHECK-NOLSE-NEXT: renamable $w0 = ADDWrx killed renamable $w9, killed renamable $w8, 32, pcsections !0 681 ; CHECK-NOLSE-NEXT: RET undef $lr, implicit $w0 682 ; 683 ; CHECK-LDAPR-LABEL: name: load_sext 684 ; CHECK-LDAPR: bb.0 (%ir-block.0): 685 ; CHECK-LDAPR-NEXT: liveins: $x0, $x1 686 ; CHECK-LDAPR-NEXT: {{ $}} 687 ; CHECK-LDAPR-NEXT: renamable $w8 = LDAPRB killed renamable $x0, pcsections !0 :: (load acquire (s8) from %ir.p8) 688 ; CHECK-LDAPR-NEXT: renamable $w9 = LDRHHui killed renamable $x1, 0, pcsections !0 :: (load unordered (s16) from %ir.p16) 689 ; CHECK-LDAPR-NEXT: renamable $w9 = SBFMWri killed renamable $w9, 0, 15 690 ; CHECK-LDAPR-NEXT: renamable $w0 = ADDWrx killed renamable $w9, killed renamable $w8, 32, pcsections !0 691 ; CHECK-LDAPR-NEXT: RET undef $lr, implicit $w0 692 %val1.8 = load atomic i8, ptr %p8 acquire, align 1, !pcsections !0 693 %val1 = sext i8 %val1.8 to i32 694 695 %val2.16 = load atomic i16, ptr %p16 unordered, align 2, !pcsections !0 696 %val2 = sext i16 %val2.16 to i32 697 698 %res = add i32 %val1, %val2, !pcsections !0 699 ret i32 %res 700} 701 702define void @store_trunc(i32 %val, ptr %p8, ptr %p16) { 703 ; CHECK-LABEL: name: store_trunc 704 ; CHECK: bb.0 (%ir-block.0): 705 ; CHECK-NEXT: liveins: $w0, $x1, $x2 706 ; CHECK-NEXT: {{ $}} 707 ; CHECK-NEXT: STLRB renamable $w0, killed renamable $x1, pcsections !0 :: (store seq_cst (s8) into %ir.p8) 708 ; CHECK-NEXT: STRHHui killed renamable $w0, killed renamable $x2, 0, pcsections !0 :: (store monotonic (s16) into %ir.p16) 709 ; CHECK-NEXT: RET undef $lr 710 %val8 = trunc i32 %val to i8 711 store atomic i8 %val8, ptr %p8 seq_cst, align 1, !pcsections !0 712 713 %val16 = trunc i32 %val to i16 714 store atomic i16 %val16, ptr %p16 monotonic, align 2, !pcsections !0 715 716 ret void 717} 718 719define i8 @atomicrmw_add_i8(ptr %ptr, i8 %rhs) { 720 ; CHECK-LABEL: name: atomicrmw_add_i8 721 ; CHECK: bb.0 (%ir-block.0): 722 ; CHECK-NEXT: successors: %bb.1(0x80000000) 723 ; CHECK-NEXT: liveins: $w1, $x0 724 ; CHECK-NEXT: {{ $}} 725 ; CHECK-NEXT: bb.1.atomicrmw.start: 726 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 727 ; CHECK-NEXT: liveins: $w1, $x0 728 ; CHECK-NEXT: {{ $}} 729 ; CHECK-NEXT: renamable $w8 = LDAXRB renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s8) from %ir.ptr) 730 ; CHECK-NEXT: $w9 = ADDWrs renamable $w8, renamable $w1, 0, implicit-def $x9, pcsections !0 731 ; CHECK-NEXT: early-clobber renamable $w10 = STLXRB renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s8) into %ir.ptr) 732 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 733 ; CHECK-NEXT: {{ $}} 734 ; CHECK-NEXT: bb.2.atomicrmw.end: 735 ; CHECK-NEXT: liveins: $x8 736 ; CHECK-NEXT: {{ $}} 737 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 738 ; CHECK-NEXT: RET undef $lr, implicit $w0 739 %res = atomicrmw add ptr %ptr, i8 %rhs seq_cst, !pcsections !0 740 ret i8 %res 741} 742 743define i8 @atomicrmw_xchg_i8(ptr %ptr, i8 %rhs) { 744 ; CHECK-LABEL: name: atomicrmw_xchg_i8 745 ; CHECK: bb.0 (%ir-block.0): 746 ; CHECK-NEXT: successors: %bb.1(0x80000000) 747 ; CHECK-NEXT: liveins: $w1, $x0 748 ; CHECK-NEXT: {{ $}} 749 ; CHECK-NEXT: renamable $w1 = KILL $w1, implicit-def $x1 750 ; CHECK-NEXT: {{ $}} 751 ; CHECK-NEXT: bb.1.atomicrmw.start: 752 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 753 ; CHECK-NEXT: liveins: $x0, $x1 754 ; CHECK-NEXT: {{ $}} 755 ; CHECK-NEXT: renamable $w8 = LDXRB renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s8) from %ir.ptr) 756 ; CHECK-NEXT: early-clobber renamable $w9 = STXRB renamable $w1, renamable $x0, pcsections !0 :: (volatile store (s8) into %ir.ptr) 757 ; CHECK-NEXT: CBNZW killed renamable $w9, %bb.1, pcsections !0 758 ; CHECK-NEXT: {{ $}} 759 ; CHECK-NEXT: bb.2.atomicrmw.end: 760 ; CHECK-NEXT: liveins: $x8 761 ; CHECK-NEXT: {{ $}} 762 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 763 ; CHECK-NEXT: RET undef $lr, implicit $w0 764 %res = atomicrmw xchg ptr %ptr, i8 %rhs monotonic, !pcsections !0 765 ret i8 %res 766} 767 768define i8 @atomicrmw_sub_i8(ptr %ptr, i8 %rhs) { 769 ; CHECK-LABEL: name: atomicrmw_sub_i8 770 ; CHECK: bb.0 (%ir-block.0): 771 ; CHECK-NEXT: successors: %bb.1(0x80000000) 772 ; CHECK-NEXT: liveins: $w1, $x0 773 ; CHECK-NEXT: {{ $}} 774 ; CHECK-NEXT: bb.1.atomicrmw.start: 775 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 776 ; CHECK-NEXT: liveins: $w1, $x0 777 ; CHECK-NEXT: {{ $}} 778 ; CHECK-NEXT: renamable $w8 = LDAXRB renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s8) from %ir.ptr) 779 ; CHECK-NEXT: $w9 = SUBWrs renamable $w8, renamable $w1, 0, implicit-def $x9, pcsections !0 780 ; CHECK-NEXT: early-clobber renamable $w10 = STXRB renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s8) into %ir.ptr) 781 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 782 ; CHECK-NEXT: {{ $}} 783 ; CHECK-NEXT: bb.2.atomicrmw.end: 784 ; CHECK-NEXT: liveins: $x8 785 ; CHECK-NEXT: {{ $}} 786 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 787 ; CHECK-NEXT: RET undef $lr, implicit $w0 788 %res = atomicrmw sub ptr %ptr, i8 %rhs acquire, !pcsections !0 789 ret i8 %res 790} 791 792define i8 @atomicrmw_and_i8(ptr %ptr, i8 %rhs) { 793 ; CHECK-LABEL: name: atomicrmw_and_i8 794 ; CHECK: bb.0 (%ir-block.0): 795 ; CHECK-NEXT: successors: %bb.1(0x80000000) 796 ; CHECK-NEXT: liveins: $w1, $x0 797 ; CHECK-NEXT: {{ $}} 798 ; CHECK-NEXT: bb.1.atomicrmw.start: 799 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 800 ; CHECK-NEXT: liveins: $w1, $x0 801 ; CHECK-NEXT: {{ $}} 802 ; CHECK-NEXT: renamable $w8 = LDXRB renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s8) from %ir.ptr) 803 ; CHECK-NEXT: $w9 = ANDWrs renamable $w8, renamable $w1, 0, implicit-def $x9, pcsections !0 804 ; CHECK-NEXT: early-clobber renamable $w10 = STLXRB renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s8) into %ir.ptr) 805 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 806 ; CHECK-NEXT: {{ $}} 807 ; CHECK-NEXT: bb.2.atomicrmw.end: 808 ; CHECK-NEXT: liveins: $x8 809 ; CHECK-NEXT: {{ $}} 810 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 811 ; CHECK-NEXT: RET undef $lr, implicit $w0 812 %res = atomicrmw and ptr %ptr, i8 %rhs release, !pcsections !0 813 ret i8 %res 814} 815 816define i8 @atomicrmw_or_i8(ptr %ptr, i8 %rhs) { 817 ; CHECK-LABEL: name: atomicrmw_or_i8 818 ; CHECK: bb.0 (%ir-block.0): 819 ; CHECK-NEXT: successors: %bb.1(0x80000000) 820 ; CHECK-NEXT: liveins: $w1, $x0 821 ; CHECK-NEXT: {{ $}} 822 ; CHECK-NEXT: bb.1.atomicrmw.start: 823 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 824 ; CHECK-NEXT: liveins: $w1, $x0 825 ; CHECK-NEXT: {{ $}} 826 ; CHECK-NEXT: renamable $w8 = LDAXRB renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s8) from %ir.ptr) 827 ; CHECK-NEXT: $w9 = ORRWrs renamable $w8, renamable $w1, 0, implicit-def $x9, pcsections !0 828 ; CHECK-NEXT: early-clobber renamable $w10 = STLXRB renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s8) into %ir.ptr) 829 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 830 ; CHECK-NEXT: {{ $}} 831 ; CHECK-NEXT: bb.2.atomicrmw.end: 832 ; CHECK-NEXT: liveins: $x8 833 ; CHECK-NEXT: {{ $}} 834 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 835 ; CHECK-NEXT: RET undef $lr, implicit $w0 836 %res = atomicrmw or ptr %ptr, i8 %rhs seq_cst, !pcsections !0 837 ret i8 %res 838} 839 840define i8 @atomicrmw_xor_i8(ptr %ptr, i8 %rhs) { 841 ; CHECK-LABEL: name: atomicrmw_xor_i8 842 ; CHECK: bb.0 (%ir-block.0): 843 ; CHECK-NEXT: successors: %bb.1(0x80000000) 844 ; CHECK-NEXT: liveins: $w1, $x0 845 ; CHECK-NEXT: {{ $}} 846 ; CHECK-NEXT: bb.1.atomicrmw.start: 847 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 848 ; CHECK-NEXT: liveins: $w1, $x0 849 ; CHECK-NEXT: {{ $}} 850 ; CHECK-NEXT: renamable $w8 = LDXRB renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s8) from %ir.ptr) 851 ; CHECK-NEXT: $w9 = EORWrs renamable $w8, renamable $w1, 0, implicit-def $x9, pcsections !0 852 ; CHECK-NEXT: early-clobber renamable $w10 = STXRB renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s8) into %ir.ptr) 853 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 854 ; CHECK-NEXT: {{ $}} 855 ; CHECK-NEXT: bb.2.atomicrmw.end: 856 ; CHECK-NEXT: liveins: $x8 857 ; CHECK-NEXT: {{ $}} 858 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 859 ; CHECK-NEXT: RET undef $lr, implicit $w0 860 %res = atomicrmw xor ptr %ptr, i8 %rhs monotonic, !pcsections !0 861 ret i8 %res 862} 863 864define i8 @atomicrmw_min_i8(ptr %ptr, i8 %rhs) { 865 ; CHECK-LABEL: name: atomicrmw_min_i8 866 ; CHECK: bb.0 (%ir-block.0): 867 ; CHECK-NEXT: successors: %bb.1(0x80000000) 868 ; CHECK-NEXT: liveins: $w1, $x0 869 ; CHECK-NEXT: {{ $}} 870 ; CHECK-NEXT: bb.1.atomicrmw.start: 871 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 872 ; CHECK-NEXT: liveins: $w1, $x0 873 ; CHECK-NEXT: {{ $}} 874 ; CHECK-NEXT: renamable $w8 = LDAXRB renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s8) from %ir.ptr) 875 ; CHECK-NEXT: renamable $w9 = SBFMWri renamable $w8, 0, 7, pcsections !0 876 ; CHECK-NEXT: dead $wzr = SUBSWrx killed renamable $w9, renamable $w1, 32, implicit-def $nzcv, pcsections !0 877 ; CHECK-NEXT: renamable $w9 = CSELWr renamable $w8, renamable $w1, 11, implicit killed $nzcv, implicit-def $x9, pcsections !0 878 ; CHECK-NEXT: early-clobber renamable $w10 = STXRB renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s8) into %ir.ptr) 879 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 880 ; CHECK-NEXT: {{ $}} 881 ; CHECK-NEXT: bb.2.atomicrmw.end: 882 ; CHECK-NEXT: liveins: $x8 883 ; CHECK-NEXT: {{ $}} 884 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 885 ; CHECK-NEXT: RET undef $lr, implicit $w0 886 %res = atomicrmw min ptr %ptr, i8 %rhs acquire, !pcsections !0 887 ret i8 %res 888} 889 890define i8 @atomicrmw_max_i8(ptr %ptr, i8 %rhs) { 891 ; CHECK-LABEL: name: atomicrmw_max_i8 892 ; CHECK: bb.0 (%ir-block.0): 893 ; CHECK-NEXT: successors: %bb.1(0x80000000) 894 ; CHECK-NEXT: liveins: $w1, $x0 895 ; CHECK-NEXT: {{ $}} 896 ; CHECK-NEXT: bb.1.atomicrmw.start: 897 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 898 ; CHECK-NEXT: liveins: $w1, $x0 899 ; CHECK-NEXT: {{ $}} 900 ; CHECK-NEXT: renamable $w8 = LDXRB renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s8) from %ir.ptr) 901 ; CHECK-NEXT: renamable $w9 = SBFMWri renamable $w8, 0, 7, pcsections !0 902 ; CHECK-NEXT: dead $wzr = SUBSWrx killed renamable $w9, renamable $w1, 32, implicit-def $nzcv, pcsections !0 903 ; CHECK-NEXT: renamable $w9 = CSELWr renamable $w8, renamable $w1, 12, implicit killed $nzcv, implicit-def $x9, pcsections !0 904 ; CHECK-NEXT: early-clobber renamable $w10 = STLXRB renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s8) into %ir.ptr) 905 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 906 ; CHECK-NEXT: {{ $}} 907 ; CHECK-NEXT: bb.2.atomicrmw.end: 908 ; CHECK-NEXT: liveins: $x8 909 ; CHECK-NEXT: {{ $}} 910 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 911 ; CHECK-NEXT: RET undef $lr, implicit $w0 912 %res = atomicrmw max ptr %ptr, i8 %rhs release, !pcsections !0 913 ret i8 %res 914} 915 916define i8 @atomicrmw_umin_i8(ptr %ptr, i8 %rhs) { 917 ; CHECK-LABEL: name: atomicrmw_umin_i8 918 ; CHECK: bb.0 (%ir-block.0): 919 ; CHECK-NEXT: successors: %bb.1(0x80000000) 920 ; CHECK-NEXT: liveins: $w1, $x0 921 ; CHECK-NEXT: {{ $}} 922 ; CHECK-NEXT: renamable $w9 = ANDWri killed renamable $w1, 7 923 ; CHECK-NEXT: {{ $}} 924 ; CHECK-NEXT: bb.1.atomicrmw.start: 925 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 926 ; CHECK-NEXT: liveins: $w9, $x0 927 ; CHECK-NEXT: {{ $}} 928 ; CHECK-NEXT: renamable $w8 = LDAXRB renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s8) from %ir.ptr) 929 ; CHECK-NEXT: renamable $w8 = ANDWri renamable $w8, 7, implicit killed $x8 930 ; CHECK-NEXT: $wzr = SUBSWrs renamable $w8, renamable $w9, 0, implicit-def $nzcv, pcsections !0 931 ; CHECK-NEXT: renamable $w10 = CSELWr renamable $w8, renamable $w9, 3, implicit killed $nzcv, implicit-def $x10, pcsections !0 932 ; CHECK-NEXT: early-clobber renamable $w11 = STLXRB renamable $w10, renamable $x0, implicit killed $x10, pcsections !0 :: (volatile store (s8) into %ir.ptr) 933 ; CHECK-NEXT: CBNZW killed renamable $w11, %bb.1, pcsections !0 934 ; CHECK-NEXT: {{ $}} 935 ; CHECK-NEXT: bb.2.atomicrmw.end: 936 ; CHECK-NEXT: liveins: $w8 937 ; CHECK-NEXT: {{ $}} 938 ; CHECK-NEXT: $w0 = ORRWrs $wzr, killed $w8, 0 939 ; CHECK-NEXT: RET undef $lr, implicit $w0 940 %res = atomicrmw umin ptr %ptr, i8 %rhs seq_cst, !pcsections !0 941 ret i8 %res 942} 943 944define i8 @atomicrmw_umax_i8(ptr %ptr, i8 %rhs) { 945 ; CHECK-LABEL: name: atomicrmw_umax_i8 946 ; CHECK: bb.0 (%ir-block.0): 947 ; CHECK-NEXT: successors: %bb.1(0x80000000) 948 ; CHECK-NEXT: liveins: $w1, $x0 949 ; CHECK-NEXT: {{ $}} 950 ; CHECK-NEXT: renamable $w9 = ANDWri killed renamable $w1, 7 951 ; CHECK-NEXT: {{ $}} 952 ; CHECK-NEXT: bb.1.atomicrmw.start: 953 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 954 ; CHECK-NEXT: liveins: $w9, $x0 955 ; CHECK-NEXT: {{ $}} 956 ; CHECK-NEXT: renamable $w8 = LDXRB renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s8) from %ir.ptr) 957 ; CHECK-NEXT: renamable $w8 = ANDWri renamable $w8, 7, implicit killed $x8 958 ; CHECK-NEXT: $wzr = SUBSWrs renamable $w8, renamable $w9, 0, implicit-def $nzcv, pcsections !0 959 ; CHECK-NEXT: renamable $w10 = CSELWr renamable $w8, renamable $w9, 8, implicit killed $nzcv, implicit-def $x10, pcsections !0 960 ; CHECK-NEXT: early-clobber renamable $w11 = STXRB renamable $w10, renamable $x0, implicit killed $x10, pcsections !0 :: (volatile store (s8) into %ir.ptr) 961 ; CHECK-NEXT: CBNZW killed renamable $w11, %bb.1, pcsections !0 962 ; CHECK-NEXT: {{ $}} 963 ; CHECK-NEXT: bb.2.atomicrmw.end: 964 ; CHECK-NEXT: liveins: $w8 965 ; CHECK-NEXT: {{ $}} 966 ; CHECK-NEXT: $w0 = ORRWrs $wzr, killed $w8, 0 967 ; CHECK-NEXT: RET undef $lr, implicit $w0 968 %res = atomicrmw umax ptr %ptr, i8 %rhs monotonic, !pcsections !0 969 ret i8 %res 970} 971 972define i16 @atomicrmw_add_i16(ptr %ptr, i16 %rhs) { 973 ; CHECK-LABEL: name: atomicrmw_add_i16 974 ; CHECK: bb.0 (%ir-block.0): 975 ; CHECK-NEXT: successors: %bb.1(0x80000000) 976 ; CHECK-NEXT: liveins: $w1, $x0 977 ; CHECK-NEXT: {{ $}} 978 ; CHECK-NEXT: bb.1.atomicrmw.start: 979 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 980 ; CHECK-NEXT: liveins: $w1, $x0 981 ; CHECK-NEXT: {{ $}} 982 ; CHECK-NEXT: renamable $w8 = LDAXRH renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s16) from %ir.ptr) 983 ; CHECK-NEXT: $w9 = ADDWrs renamable $w8, renamable $w1, 0, implicit-def $x9, pcsections !0 984 ; CHECK-NEXT: early-clobber renamable $w10 = STLXRH renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s16) into %ir.ptr) 985 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 986 ; CHECK-NEXT: {{ $}} 987 ; CHECK-NEXT: bb.2.atomicrmw.end: 988 ; CHECK-NEXT: liveins: $x8 989 ; CHECK-NEXT: {{ $}} 990 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 991 ; CHECK-NEXT: RET undef $lr, implicit $w0 992 %res = atomicrmw add ptr %ptr, i16 %rhs seq_cst, !pcsections !0 993 ret i16 %res 994} 995 996define i16 @atomicrmw_xchg_i16(ptr %ptr, i16 %rhs) { 997 ; CHECK-LABEL: name: atomicrmw_xchg_i16 998 ; CHECK: bb.0 (%ir-block.0): 999 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1000 ; CHECK-NEXT: liveins: $w1, $x0 1001 ; CHECK-NEXT: {{ $}} 1002 ; CHECK-NEXT: renamable $w1 = KILL $w1, implicit-def $x1 1003 ; CHECK-NEXT: {{ $}} 1004 ; CHECK-NEXT: bb.1.atomicrmw.start: 1005 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 1006 ; CHECK-NEXT: liveins: $x0, $x1 1007 ; CHECK-NEXT: {{ $}} 1008 ; CHECK-NEXT: renamable $w8 = LDXRH renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s16) from %ir.ptr) 1009 ; CHECK-NEXT: early-clobber renamable $w9 = STXRH renamable $w1, renamable $x0, pcsections !0 :: (volatile store (s16) into %ir.ptr) 1010 ; CHECK-NEXT: CBNZW killed renamable $w9, %bb.1, pcsections !0 1011 ; CHECK-NEXT: {{ $}} 1012 ; CHECK-NEXT: bb.2.atomicrmw.end: 1013 ; CHECK-NEXT: liveins: $x8 1014 ; CHECK-NEXT: {{ $}} 1015 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 1016 ; CHECK-NEXT: RET undef $lr, implicit $w0 1017 %res = atomicrmw xchg ptr %ptr, i16 %rhs monotonic, !pcsections !0 1018 ret i16 %res 1019} 1020 1021define i16 @atomicrmw_sub_i16(ptr %ptr, i16 %rhs) { 1022 ; CHECK-LABEL: name: atomicrmw_sub_i16 1023 ; CHECK: bb.0 (%ir-block.0): 1024 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1025 ; CHECK-NEXT: liveins: $w1, $x0 1026 ; CHECK-NEXT: {{ $}} 1027 ; CHECK-NEXT: bb.1.atomicrmw.start: 1028 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 1029 ; CHECK-NEXT: liveins: $w1, $x0 1030 ; CHECK-NEXT: {{ $}} 1031 ; CHECK-NEXT: renamable $w8 = LDAXRH renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s16) from %ir.ptr) 1032 ; CHECK-NEXT: $w9 = SUBWrs renamable $w8, renamable $w1, 0, implicit-def $x9, pcsections !0 1033 ; CHECK-NEXT: early-clobber renamable $w10 = STXRH renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s16) into %ir.ptr) 1034 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 1035 ; CHECK-NEXT: {{ $}} 1036 ; CHECK-NEXT: bb.2.atomicrmw.end: 1037 ; CHECK-NEXT: liveins: $x8 1038 ; CHECK-NEXT: {{ $}} 1039 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 1040 ; CHECK-NEXT: RET undef $lr, implicit $w0 1041 %res = atomicrmw sub ptr %ptr, i16 %rhs acquire, !pcsections !0 1042 ret i16 %res 1043} 1044 1045define i16 @atomicrmw_and_i16(ptr %ptr, i16 %rhs) { 1046 ; CHECK-LABEL: name: atomicrmw_and_i16 1047 ; CHECK: bb.0 (%ir-block.0): 1048 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1049 ; CHECK-NEXT: liveins: $w1, $x0 1050 ; CHECK-NEXT: {{ $}} 1051 ; CHECK-NEXT: bb.1.atomicrmw.start: 1052 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 1053 ; CHECK-NEXT: liveins: $w1, $x0 1054 ; CHECK-NEXT: {{ $}} 1055 ; CHECK-NEXT: renamable $w8 = LDXRH renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s16) from %ir.ptr) 1056 ; CHECK-NEXT: $w9 = ANDWrs renamable $w8, renamable $w1, 0, implicit-def $x9, pcsections !0 1057 ; CHECK-NEXT: early-clobber renamable $w10 = STLXRH renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s16) into %ir.ptr) 1058 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 1059 ; CHECK-NEXT: {{ $}} 1060 ; CHECK-NEXT: bb.2.atomicrmw.end: 1061 ; CHECK-NEXT: liveins: $x8 1062 ; CHECK-NEXT: {{ $}} 1063 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 1064 ; CHECK-NEXT: RET undef $lr, implicit $w0 1065 %res = atomicrmw and ptr %ptr, i16 %rhs release, !pcsections !0 1066 ret i16 %res 1067} 1068 1069define i16 @atomicrmw_or_i16(ptr %ptr, i16 %rhs) { 1070 ; CHECK-LABEL: name: atomicrmw_or_i16 1071 ; CHECK: bb.0 (%ir-block.0): 1072 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1073 ; CHECK-NEXT: liveins: $w1, $x0 1074 ; CHECK-NEXT: {{ $}} 1075 ; CHECK-NEXT: bb.1.atomicrmw.start: 1076 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 1077 ; CHECK-NEXT: liveins: $w1, $x0 1078 ; CHECK-NEXT: {{ $}} 1079 ; CHECK-NEXT: renamable $w8 = LDAXRH renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s16) from %ir.ptr) 1080 ; CHECK-NEXT: $w9 = ORRWrs renamable $w8, renamable $w1, 0, implicit-def $x9, pcsections !0 1081 ; CHECK-NEXT: early-clobber renamable $w10 = STLXRH renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s16) into %ir.ptr) 1082 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 1083 ; CHECK-NEXT: {{ $}} 1084 ; CHECK-NEXT: bb.2.atomicrmw.end: 1085 ; CHECK-NEXT: liveins: $x8 1086 ; CHECK-NEXT: {{ $}} 1087 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 1088 ; CHECK-NEXT: RET undef $lr, implicit $w0 1089 %res = atomicrmw or ptr %ptr, i16 %rhs seq_cst, !pcsections !0 1090 ret i16 %res 1091} 1092 1093define i16 @atomicrmw_xor_i16(ptr %ptr, i16 %rhs) { 1094 ; CHECK-LABEL: name: atomicrmw_xor_i16 1095 ; CHECK: bb.0 (%ir-block.0): 1096 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1097 ; CHECK-NEXT: liveins: $w1, $x0 1098 ; CHECK-NEXT: {{ $}} 1099 ; CHECK-NEXT: bb.1.atomicrmw.start: 1100 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 1101 ; CHECK-NEXT: liveins: $w1, $x0 1102 ; CHECK-NEXT: {{ $}} 1103 ; CHECK-NEXT: renamable $w8 = LDXRH renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s16) from %ir.ptr) 1104 ; CHECK-NEXT: $w9 = EORWrs renamable $w8, renamable $w1, 0, implicit-def $x9, pcsections !0 1105 ; CHECK-NEXT: early-clobber renamable $w10 = STXRH renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s16) into %ir.ptr) 1106 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 1107 ; CHECK-NEXT: {{ $}} 1108 ; CHECK-NEXT: bb.2.atomicrmw.end: 1109 ; CHECK-NEXT: liveins: $x8 1110 ; CHECK-NEXT: {{ $}} 1111 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 1112 ; CHECK-NEXT: RET undef $lr, implicit $w0 1113 %res = atomicrmw xor ptr %ptr, i16 %rhs monotonic, !pcsections !0 1114 ret i16 %res 1115} 1116 1117define i16 @atomicrmw_min_i16(ptr %ptr, i16 %rhs) { 1118 ; CHECK-LABEL: name: atomicrmw_min_i16 1119 ; CHECK: bb.0 (%ir-block.0): 1120 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1121 ; CHECK-NEXT: liveins: $w1, $x0 1122 ; CHECK-NEXT: {{ $}} 1123 ; CHECK-NEXT: bb.1.atomicrmw.start: 1124 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 1125 ; CHECK-NEXT: liveins: $w1, $x0 1126 ; CHECK-NEXT: {{ $}} 1127 ; CHECK-NEXT: renamable $w8 = LDAXRH renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s16) from %ir.ptr) 1128 ; CHECK-NEXT: renamable $w9 = SBFMWri renamable $w8, 0, 15, pcsections !0 1129 ; CHECK-NEXT: dead $wzr = SUBSWrx killed renamable $w9, renamable $w1, 40, implicit-def $nzcv, pcsections !0 1130 ; CHECK-NEXT: renamable $w9 = CSELWr renamable $w8, renamable $w1, 11, implicit killed $nzcv, implicit-def $x9, pcsections !0 1131 ; CHECK-NEXT: early-clobber renamable $w10 = STXRH renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s16) into %ir.ptr) 1132 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 1133 ; CHECK-NEXT: {{ $}} 1134 ; CHECK-NEXT: bb.2.atomicrmw.end: 1135 ; CHECK-NEXT: liveins: $x8 1136 ; CHECK-NEXT: {{ $}} 1137 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 1138 ; CHECK-NEXT: RET undef $lr, implicit $w0 1139 %res = atomicrmw min ptr %ptr, i16 %rhs acquire, !pcsections !0 1140 ret i16 %res 1141} 1142 1143define i16 @atomicrmw_max_i16(ptr %ptr, i16 %rhs) { 1144 ; CHECK-LABEL: name: atomicrmw_max_i16 1145 ; CHECK: bb.0 (%ir-block.0): 1146 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1147 ; CHECK-NEXT: liveins: $w1, $x0 1148 ; CHECK-NEXT: {{ $}} 1149 ; CHECK-NEXT: bb.1.atomicrmw.start: 1150 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 1151 ; CHECK-NEXT: liveins: $w1, $x0 1152 ; CHECK-NEXT: {{ $}} 1153 ; CHECK-NEXT: renamable $w8 = LDXRH renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s16) from %ir.ptr) 1154 ; CHECK-NEXT: renamable $w9 = SBFMWri renamable $w8, 0, 15, pcsections !0 1155 ; CHECK-NEXT: dead $wzr = SUBSWrx killed renamable $w9, renamable $w1, 40, implicit-def $nzcv, pcsections !0 1156 ; CHECK-NEXT: renamable $w9 = CSELWr renamable $w8, renamable $w1, 12, implicit killed $nzcv, implicit-def $x9, pcsections !0 1157 ; CHECK-NEXT: early-clobber renamable $w10 = STLXRH renamable $w9, renamable $x0, implicit killed $x9, pcsections !0 :: (volatile store (s16) into %ir.ptr) 1158 ; CHECK-NEXT: CBNZW killed renamable $w10, %bb.1, pcsections !0 1159 ; CHECK-NEXT: {{ $}} 1160 ; CHECK-NEXT: bb.2.atomicrmw.end: 1161 ; CHECK-NEXT: liveins: $x8 1162 ; CHECK-NEXT: {{ $}} 1163 ; CHECK-NEXT: $w0 = ORRWrs $wzr, $w8, 0, implicit killed $x8 1164 ; CHECK-NEXT: RET undef $lr, implicit $w0 1165 %res = atomicrmw max ptr %ptr, i16 %rhs release, !pcsections !0 1166 ret i16 %res 1167} 1168 1169define i16 @atomicrmw_umin_i16(ptr %ptr, i16 %rhs) { 1170 ; CHECK-LABEL: name: atomicrmw_umin_i16 1171 ; CHECK: bb.0 (%ir-block.0): 1172 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1173 ; CHECK-NEXT: liveins: $w1, $x0 1174 ; CHECK-NEXT: {{ $}} 1175 ; CHECK-NEXT: renamable $w9 = ANDWri killed renamable $w1, 15 1176 ; CHECK-NEXT: {{ $}} 1177 ; CHECK-NEXT: bb.1.atomicrmw.start: 1178 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 1179 ; CHECK-NEXT: liveins: $w9, $x0 1180 ; CHECK-NEXT: {{ $}} 1181 ; CHECK-NEXT: renamable $w8 = LDAXRH renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s16) from %ir.ptr) 1182 ; CHECK-NEXT: renamable $w8 = ANDWri renamable $w8, 15, implicit killed $x8 1183 ; CHECK-NEXT: $wzr = SUBSWrs renamable $w8, renamable $w9, 0, implicit-def $nzcv, pcsections !0 1184 ; CHECK-NEXT: renamable $w10 = CSELWr renamable $w8, renamable $w9, 3, implicit killed $nzcv, implicit-def $x10, pcsections !0 1185 ; CHECK-NEXT: early-clobber renamable $w11 = STLXRH renamable $w10, renamable $x0, implicit killed $x10, pcsections !0 :: (volatile store (s16) into %ir.ptr) 1186 ; CHECK-NEXT: CBNZW killed renamable $w11, %bb.1, pcsections !0 1187 ; CHECK-NEXT: {{ $}} 1188 ; CHECK-NEXT: bb.2.atomicrmw.end: 1189 ; CHECK-NEXT: liveins: $w8 1190 ; CHECK-NEXT: {{ $}} 1191 ; CHECK-NEXT: $w0 = ORRWrs $wzr, killed $w8, 0 1192 ; CHECK-NEXT: RET undef $lr, implicit $w0 1193 %res = atomicrmw umin ptr %ptr, i16 %rhs seq_cst, !pcsections !0 1194 ret i16 %res 1195} 1196 1197define i16 @atomicrmw_umax_i16(ptr %ptr, i16 %rhs) { 1198 ; CHECK-LABEL: name: atomicrmw_umax_i16 1199 ; CHECK: bb.0 (%ir-block.0): 1200 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1201 ; CHECK-NEXT: liveins: $w1, $x0 1202 ; CHECK-NEXT: {{ $}} 1203 ; CHECK-NEXT: renamable $w9 = ANDWri killed renamable $w1, 15 1204 ; CHECK-NEXT: {{ $}} 1205 ; CHECK-NEXT: bb.1.atomicrmw.start: 1206 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 1207 ; CHECK-NEXT: liveins: $w9, $x0 1208 ; CHECK-NEXT: {{ $}} 1209 ; CHECK-NEXT: renamable $w8 = LDXRH renamable $x0, implicit-def $x8, pcsections !0 :: (volatile load (s16) from %ir.ptr) 1210 ; CHECK-NEXT: renamable $w8 = ANDWri renamable $w8, 15, implicit killed $x8 1211 ; CHECK-NEXT: $wzr = SUBSWrs renamable $w8, renamable $w9, 0, implicit-def $nzcv, pcsections !0 1212 ; CHECK-NEXT: renamable $w10 = CSELWr renamable $w8, renamable $w9, 8, implicit killed $nzcv, implicit-def $x10, pcsections !0 1213 ; CHECK-NEXT: early-clobber renamable $w11 = STXRH renamable $w10, renamable $x0, implicit killed $x10, pcsections !0 :: (volatile store (s16) into %ir.ptr) 1214 ; CHECK-NEXT: CBNZW killed renamable $w11, %bb.1, pcsections !0 1215 ; CHECK-NEXT: {{ $}} 1216 ; CHECK-NEXT: bb.2.atomicrmw.end: 1217 ; CHECK-NEXT: liveins: $w8 1218 ; CHECK-NEXT: {{ $}} 1219 ; CHECK-NEXT: $w0 = ORRWrs $wzr, killed $w8, 0 1220 ; CHECK-NEXT: RET undef $lr, implicit $w0 1221 %res = atomicrmw umax ptr %ptr, i16 %rhs monotonic, !pcsections !0 1222 ret i16 %res 1223} 1224 1225define { i8, i1 } @cmpxchg_i8(ptr %ptr, i8 %desired, i8 %new) { 1226 ; CHECK-LABEL: name: cmpxchg_i8 1227 ; CHECK: bb.0 (%ir-block.0): 1228 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1229 ; CHECK-NEXT: liveins: $w1, $w2, $x0 1230 ; CHECK-NEXT: {{ $}} 1231 ; CHECK-NEXT: $x8 = ORRXrs $xzr, $x0, 0 1232 ; CHECK-NEXT: renamable $w2 = KILL $w2, implicit-def $x2 1233 ; CHECK-NEXT: {{ $}} 1234 ; CHECK-NEXT: bb.1.cmpxchg.start: 1235 ; CHECK-NEXT: successors: %bb.2(0x7c000000), %bb.4(0x04000000) 1236 ; CHECK-NEXT: liveins: $w1, $x2, $x8 1237 ; CHECK-NEXT: {{ $}} 1238 ; CHECK-NEXT: renamable $w0 = LDXRB renamable $x8, implicit-def $x0, pcsections !0 :: (volatile load (s8) from %ir.ptr) 1239 ; CHECK-NEXT: renamable $w9 = ANDWri renamable $w0, 7, pcsections !0 1240 ; CHECK-NEXT: dead $wzr = SUBSWrx killed renamable $w9, renamable $w1, 0, implicit-def $nzcv, pcsections !0 1241 ; CHECK-NEXT: Bcc 1, %bb.4, implicit killed $nzcv, pcsections !0 1242 ; CHECK-NEXT: {{ $}} 1243 ; CHECK-NEXT: bb.2.cmpxchg.trystore: 1244 ; CHECK-NEXT: successors: %bb.3(0x04000000), %bb.1(0x7c000000) 1245 ; CHECK-NEXT: liveins: $w1, $x0, $x2, $x8 1246 ; CHECK-NEXT: {{ $}} 1247 ; CHECK-NEXT: early-clobber renamable $w9 = STXRB renamable $w2, renamable $x8, pcsections !0 :: (volatile store (s8) into %ir.ptr) 1248 ; CHECK-NEXT: CBNZW killed renamable $w9, %bb.1 1249 ; CHECK-NEXT: {{ $}} 1250 ; CHECK-NEXT: bb.3: 1251 ; CHECK-NEXT: liveins: $x0 1252 ; CHECK-NEXT: {{ $}} 1253 ; CHECK-NEXT: renamable $w1 = MOVZWi 1, 0 1254 ; CHECK-NEXT: $w0 = KILL renamable $w0, implicit killed $x0 1255 ; CHECK-NEXT: RET undef $lr, implicit $w0, implicit $w1 1256 ; CHECK-NEXT: {{ $}} 1257 ; CHECK-NEXT: bb.4.cmpxchg.nostore: 1258 ; CHECK-NEXT: liveins: $x0 1259 ; CHECK-NEXT: {{ $}} 1260 ; CHECK-NEXT: $w1 = ORRWrs $wzr, $wzr, 0 1261 ; CHECK-NEXT: CLREX 15, pcsections !0 1262 ; CHECK-NEXT: $w0 = KILL renamable $w0, implicit killed $x0 1263 ; CHECK-NEXT: RET undef $lr, implicit $w0, implicit $w1 1264 %res = cmpxchg ptr %ptr, i8 %desired, i8 %new monotonic monotonic, !pcsections !0 1265 ret { i8, i1 } %res 1266} 1267 1268define { i16, i1 } @cmpxchg_i16(ptr %ptr, i16 %desired, i16 %new) { 1269 ; CHECK-LABEL: name: cmpxchg_i16 1270 ; CHECK: bb.0 (%ir-block.0): 1271 ; CHECK-NEXT: successors: %bb.1(0x80000000) 1272 ; CHECK-NEXT: liveins: $w1, $w2, $x0 1273 ; CHECK-NEXT: {{ $}} 1274 ; CHECK-NEXT: $x8 = ORRXrs $xzr, $x0, 0 1275 ; CHECK-NEXT: renamable $w2 = KILL $w2, implicit-def $x2 1276 ; CHECK-NEXT: {{ $}} 1277 ; CHECK-NEXT: bb.1.cmpxchg.start: 1278 ; CHECK-NEXT: successors: %bb.2(0x7c000000), %bb.4(0x04000000) 1279 ; CHECK-NEXT: liveins: $w1, $x2, $x8 1280 ; CHECK-NEXT: {{ $}} 1281 ; CHECK-NEXT: renamable $w0 = LDXRH renamable $x8, implicit-def $x0, pcsections !0 :: (volatile load (s16) from %ir.ptr) 1282 ; CHECK-NEXT: renamable $w9 = ANDWri renamable $w0, 15, pcsections !0 1283 ; CHECK-NEXT: dead $wzr = SUBSWrx killed renamable $w9, renamable $w1, 8, implicit-def $nzcv, pcsections !0 1284 ; CHECK-NEXT: Bcc 1, %bb.4, implicit killed $nzcv, pcsections !0 1285 ; CHECK-NEXT: {{ $}} 1286 ; CHECK-NEXT: bb.2.cmpxchg.trystore: 1287 ; CHECK-NEXT: successors: %bb.3(0x04000000), %bb.1(0x7c000000) 1288 ; CHECK-NEXT: liveins: $w1, $x0, $x2, $x8 1289 ; CHECK-NEXT: {{ $}} 1290 ; CHECK-NEXT: early-clobber renamable $w9 = STXRH renamable $w2, renamable $x8, pcsections !0 :: (volatile store (s16) into %ir.ptr) 1291 ; CHECK-NEXT: CBNZW killed renamable $w9, %bb.1 1292 ; CHECK-NEXT: {{ $}} 1293 ; CHECK-NEXT: bb.3: 1294 ; CHECK-NEXT: liveins: $x0 1295 ; CHECK-NEXT: {{ $}} 1296 ; CHECK-NEXT: renamable $w1 = MOVZWi 1, 0 1297 ; CHECK-NEXT: $w0 = KILL renamable $w0, implicit killed $x0 1298 ; CHECK-NEXT: RET undef $lr, implicit $w0, implicit $w1 1299 ; CHECK-NEXT: {{ $}} 1300 ; CHECK-NEXT: bb.4.cmpxchg.nostore: 1301 ; CHECK-NEXT: liveins: $x0 1302 ; CHECK-NEXT: {{ $}} 1303 ; CHECK-NEXT: $w1 = ORRWrs $wzr, $wzr, 0 1304 ; CHECK-NEXT: CLREX 15, pcsections !0 1305 ; CHECK-NEXT: $w0 = KILL renamable $w0, implicit killed $x0 1306 ; CHECK-NEXT: RET undef $lr, implicit $w0, implicit $w1 1307 %res = cmpxchg ptr %ptr, i16 %desired, i16 %new monotonic monotonic, !pcsections !0 1308 ret { i16, i1 } %res 1309} 1310 1311!0 = !{!"foo"} 1312