1; RUN: llc -O0 -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o %t.out 2> %t.err 2; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out 3; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err 4; RUN: not --crash llc -global-isel -mtriple aarch64_be %s -o - 2>&1 | FileCheck %s --check-prefix=BIG-ENDIAN 5; This file checks that the fallback path to selection dag works. 6; The test is fragile in the sense that it must be updated to expose 7; something that fails with global-isel. 8; When we cannot produce a test case anymore, that means we can remove 9; the fallback path. 10 11target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 12target triple = "aarch64--" 13 14; BIG-ENDIAN: unable to translate in big endian mode 15 16; Make sure we don't mess up metadata arguments. 17declare void @llvm.write_register.i64(metadata, i64) 18 19; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_WRITE_REGISTER !0, %0:_(s64) (in function: test_write_register_intrin) 20; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for test_write_register_intrin 21; FALLBACK-WITH-REPORT-LABEL: test_write_register_intrin: 22define void @test_write_register_intrin() { 23 call void @llvm.write_register.i64(metadata !{!"sp"}, i64 0) 24 ret void 25} 26 27@_ZTIi = external global ptr 28declare i32 @__gxx_personality_v0(...) 29 30; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: cannot select: RET_ReallyLR implicit $x0 (in function: strict_align_feature) 31; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for strict_align_feature 32; FALLBACK-WITH-REPORT-OUT-LABEL: strict_align_feature 33define i64 @strict_align_feature(ptr %p) #0 { 34 %x = load i64, ptr %p, align 1 35 ret i64 %x 36} 37 38attributes #0 = { "target-features"="+strict-align" } 39 40; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction: call 41; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for direct_mem 42; FALLBACK-WITH-REPORT-OUT-LABEL: direct_mem 43define void @direct_mem(i32 %x, i32 %y) { 44entry: 45 tail call void asm sideeffect "", "imr,imr,~{memory}"(i32 %x, i32 %y) 46 ret void 47} 48 49; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to lower function{{.*}}scalable_arg 50; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_arg 51define <vscale x 16 x i8> @scalable_arg(<vscale x 16 x i1> %pred, ptr %addr) #1 { 52 %res = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pred, ptr %addr) 53 ret <vscale x 16 x i8> %res 54} 55 56; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to lower function{{.*}}scalable_ret 57; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_ret 58define <vscale x 16 x i8> @scalable_ret(ptr %addr) #1 { 59 %pred = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 0) 60 %res = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pred, ptr %addr) 61 ret <vscale x 16 x i8> %res 62} 63 64; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction{{.*}}scalable_call 65; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_call 66define i8 @scalable_call(ptr %addr) #1 { 67 %pred = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 0) 68 %vec = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pred, ptr %addr) 69 %res = extractelement <vscale x 16 x i8> %vec, i32 0 70 ret i8 %res 71} 72 73; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction{{.*}}scalable_alloca 74; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_alloca 75define void @scalable_alloca() #1 { 76 %local0 = alloca <vscale x 16 x i8> 77 load volatile <vscale x 16 x i8>, ptr %local0 78 ret void 79} 80 81; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction{{.*}}asm_indirect_output 82; FALLBACK-WITH-REPORT-OUT-LABEL: asm_indirect_output 83define void @asm_indirect_output() { 84entry: 85 %ap = alloca ptr, align 8 86 %0 = load ptr, ptr %ap, align 8 87 call void asm sideeffect "", "=*r|m,0,~{memory}"(ptr elementtype(ptr) %ap, ptr %0) 88 ret void 89} 90 91%struct.foo = type { [8 x i64] } 92 93; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction:{{.*}}ld64b{{.*}}asm_output_ls64 94; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for asm_output_ls64 95; FALLBACK-WITH-REPORT-OUT-LABEL: asm_output_ls64 96define void @asm_output_ls64(ptr %output, ptr %addr) #2 { 97entry: 98 %val = call i512 asm sideeffect "ld64b $0,[$1]", "=r,r,~{memory}"(ptr %addr) 99 store i512 %val, ptr %output, align 8 100 ret void 101} 102 103; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction:{{.*}}st64b{{.*}}asm_input_ls64 104; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for asm_input_ls64 105; FALLBACK-WITH-REPORT-OUT-LABEL: asm_input_ls64 106define void @asm_input_ls64(ptr %input, ptr %addr) #2 { 107entry: 108 %val = load i512, ptr %input, align 8 109 call void asm sideeffect "st64b $0,[$1]", "r,r,~{memory}"(i512 %val, ptr %addr) 110 ret void 111} 112 113; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %4:_(s128), %5:_(s1) = G_UMULO %0:_, %6:_ (in function: umul_s128) 114; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for umul_s128 115; FALLBACK-WITH-REPORT-OUT-LABEL: umul_s128 116declare {i128, i1} @llvm.umul.with.overflow.i128(i128, i128) nounwind readnone 117define zeroext i1 @umul_s128(i128 %v1, ptr %res) { 118entry: 119 %t = call {i128, i1} @llvm.umul.with.overflow.i128(i128 %v1, i128 2) 120 %val = extractvalue {i128, i1} %t, 0 121 %obit = extractvalue {i128, i1} %t, 1 122 store i128 %val, ptr %res 123 ret i1 %obit 124} 125 126; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction: {{.*}}llvm.experimental.gc.statepoint{{.*}} (in function: gc_intr) 127; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for gc_intr 128; FALLBACK-WITH-REPORT-OUT-LABEL: gc_intr 129 130declare token @llvm.experimental.gc.statepoint.p0(i64 immarg, i32 immarg, ptr, i32 immarg, i32 immarg, ...) 131declare i32 @llvm.experimental.gc.result(token) 132 133declare i32 @extern_returning_i32() 134 135define i32 @gc_intr() gc "statepoint-example" { 136 %statepoint_token = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 2882400000, i32 0, ptr elementtype(i32 ()) @extern_returning_i32, i32 0, i32 0, i32 0, i32 0) [ "deopt"() ] 137 %ret = call i32 (token) @llvm.experimental.gc.result(token %statepoint_token) 138 ret i32 %ret 139} 140 141declare void @llvm.assume(i1) 142 143; FALLBACK-WITH-REPORT-ERR: <unknown>:0:0: unable to translate instruction: call: ' %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cchi},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)' (in function: inline_asm_with_output_constraint) 144; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for inline_asm_with_output_constraint 145; FALLBACK-WITH-REPORT-OUT-LABEL: inline_asm_with_output_constraint 146define i32 @inline_asm_with_output_constraint(i64 %a) { 147entry: 148 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cchi},0,~{dirflag},~{fpsr},~{flags}"(i64 %a) 149 %asmresult1 = extractvalue { i64, i32 } %0, 1 150 %1 = icmp ult i32 %asmresult1, 2 151 tail call void @llvm.assume(i1 %1) 152 ret i32 %asmresult1 153} 154 155attributes #1 = { "target-features"="+sve" } 156attributes #2 = { "target-features"="+ls64" } 157 158declare <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 %pattern) 159declare <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1>, ptr) 160