xref: /llvm-project/llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll (revision 744c0057e7dc0d1d046a4867cece2f31fee9bb23)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc -mtriple=aarch64 -mattr=-fp-armv8 -o - %s | FileCheck %s
3
4define half @f2h(float %a) {
5; CHECK-LABEL: f2h:
6; CHECK:       // %bb.0: // %entry
7; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
8; CHECK-NEXT:    .cfi_def_cfa_offset 16
9; CHECK-NEXT:    .cfi_offset w30, -16
10; CHECK-NEXT:    bl __gnu_f2h_ieee
11; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
12; CHECK-NEXT:    ret
13entry:
14  %0 = fptrunc float %a to half
15  ret half %0
16}
17
18define bfloat @f2bfloat(float %a) {
19; CHECK-LABEL: f2bfloat:
20; CHECK:       // %bb.0: // %entry
21; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
22; CHECK-NEXT:    .cfi_def_cfa_offset 16
23; CHECK-NEXT:    .cfi_offset w30, -16
24; CHECK-NEXT:    bl __truncsfbf2
25; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
26; CHECK-NEXT:    ret
27entry:
28  %0 = fptrunc float %a to bfloat
29  ret bfloat %0
30}
31
32