xref: /llvm-project/llvm/test/Analysis/UniformityAnalysis/AMDGPU/propagate-loop-live-out.ll (revision ae77aceba5ad6ee575d3d79eb0259624322b19f4)
1; RUN: opt -mtriple amdgcn-unknown-amdhsa -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s
2
3; CHECK: DIVERGENT:       %.126.i355.i = phi i1 [ false, %bb5 ], [ true, %bb4 ]
4
5; Function Attrs: nounwind readnone speculatable
6declare i32 @llvm.amdgcn.workitem.id.x() #0
7
8define protected amdgpu_kernel void @_Z23krnl_GPUITSFitterKerneli() {
9bb0:
10  %i4 = call i32 @llvm.amdgcn.workitem.id.x()
11  %i5 = icmp eq i32 %i4, -1
12  br label %bb1
13
14bb1:                                              ; preds = %bb3, %bb0
15  %lsr.iv = phi i32 [ %i1, %bb3 ], [ 7, %bb0 ]
16  br i1 %i5, label %bb2, label %bb3
17
18bb2:                                              ; preds = %bb1
19  %lsr.iv.next = add nsw i32 %lsr.iv, -1
20  %i14 = icmp eq i32 %lsr.iv.next, 0
21  br label %bb3
22
23bb3:                                              ; preds = %bb2, %bb1
24  %i1 = phi i32 [ %lsr.iv.next, %bb2 ], [ 0, %bb1 ]
25  %i2 = phi i1 [ false, %bb2 ], [ true, %bb1 ]
26  %i3 = phi i1 [ %i14, %bb2 ], [ true, %bb1 ]
27  br i1 %i3, label %bb4, label %bb1
28
29bb4:                                              ; preds = %bb3
30  br i1 %i2, label %bb5, label %bb6
31
32bb5:                                              ; preds = %bb4
33  br label %bb6
34
35bb6:                                              ; preds = %bb5, %bb4
36  %.126.i355.i = phi i1 [ false, %bb5 ], [ true, %bb4 ]
37  br i1 %.126.i355.i, label %bb7, label %bb8
38
39bb7:                                              ; preds = %bb6
40  br label %bb8
41
42bb8:                                              ; preds = %bb7, %bb6
43  ret void
44}
45
46attributes #0 = { nounwind readnone speculatable }
47