xref: /llvm-project/llvm/test/Analysis/UniformityAnalysis/AMDGPU/join-at-loop-exit.ll (revision ae77aceba5ad6ee575d3d79eb0259624322b19f4)
1; RUN: opt -mtriple amdgcn-unknown-amdhsa -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s
2
3; CHECK: DIVERGENT:       %Guard.bb4 = phi i1 [ true, %bb1 ], [ false, %bb2 ]
4; CHECK: DIVERGENT:       br i1 %Guard.bb4, label %bb4, label %bb5
5
6; Function Attrs: nounwind readnone speculatable
7declare i32 @llvm.amdgcn.workitem.id.x() #0
8
9define protected amdgpu_kernel void @test() {
10bb0:
11  %tid.x = call i32 @llvm.amdgcn.workitem.id.x()
12  %i5 = icmp eq i32 %tid.x, -1
13  br label %bb1
14
15bb1:                                              ; preds = %bb2, %bb0
16  %lsr.iv = phi i32 [ 7, %bb0 ], [ %lsr.iv.next, %bb2 ]
17  br i1 %i5, label %bb2, label %bb3
18
19bb2:                                              ; preds = %bb1
20  %lsr.iv.next = add nsw i32 %lsr.iv, -1
21  %i14 = icmp eq i32 %lsr.iv.next, 0
22  br i1 %i14, label %bb3, label %bb1
23
24bb3:                                              ; preds = %bb2, %bb1
25  %Guard.bb4 = phi i1 [ true, %bb1 ], [ false, %bb2 ]
26  br i1 %Guard.bb4, label %bb4, label %bb5
27
28bb4:                                              ; preds = %bb3
29  br label %bb5
30
31bb5:                                              ; preds = %bb3, %bb4
32  ret void
33}
34
35attributes #0 = { nounwind readnone speculatable }
36