1; RUN: opt %s -mtriple amdgcn-- -passes='print<uniformity>' -disable-output 2>&1 | FileCheck %s 2 3; These tests have identical control flow graphs with slight changes 4; that affect cycle-info. There is a minor functional difference in 5; the branch conditions; but that is not relevant to the tests. 6 7;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 8;; 9;; The cycle has a header (T) that does not dominate the join, hence 10;; the entire cycle is reported as converged. 11;; 12;; CHECK-LABEL: UniformityInfo for function 't_header': 13;; CHECK: CYCLES ASSSUMED DIVERGENT: 14;; CHECK: depth=1: entries(T P) S Q R 15 16define amdgpu_kernel void @t_header(i32 %a, i32 %b, i32 %c) { 17entry: 18 %cond.uni = icmp slt i32 %a, 0 19 %tid = call i32 @llvm.amdgcn.workitem.id.x() 20 %cond.div = icmp slt i32 %tid, 0 21 %a.div = add i32 %tid, %a 22 br i1 %cond.uni, label %P, label %T 23 24P: 25; CHECK: DIVERGENT: %pp.phi = 26 %pp.phi = phi i32 [ %a, %entry], [ %b, %T ] 27 %pp = add i32 %b, 1 28 br i1 %cond.uni, label %R, label %Q 29 30Q: 31 %qq = add i32 %b, 1 32 br i1 %cond.div, label %S, label %R 33 34R: 35 %rr = add i32 %b, 1 36 br label %S 37 38S: 39; CHECK: DIVERGENT: %s.phi = 40; CHECK: DIVERGENT: %ss = 41 %s.phi = phi i32 [ %qq, %Q ], [ %rr, %R ] 42 %ss = add i32 %pp.phi, 1 43 br i1 %cond.uni, label %exit, label %T 44 45T: 46; CHECK: DIVERGENT: %tt.phi = 47 %tt.phi = phi i32 [ %ss, %S ], [ %a, %entry ] 48 %tt = add i32 %b, 1 49 br label %P 50 51exit: 52 %ee = add i32 %b, 1 53 ret void 54} 55 56;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 57;; 58;; The cycle has a header (P) that dominates the join, hence 59;; the cycle is reported as converged. 60;; 61;; CHECK-LABEL: UniformityInfo for function 'p_header': 62;; CHECK-NOT: CYCLES ASSSUMED DIVERGENT: 63 64define amdgpu_kernel void @p_header(i32 %a, i32 %b, i32 %c) { 65entry: 66 %cond.uni = icmp slt i32 %a, 0 67 %tid = call i32 @llvm.amdgcn.workitem.id.x() 68 %cond.div = icmp slt i32 %tid, 0 69 br i1 %cond.uni, label %T, label %P 70 71P: 72; CHECK-NOT: DIVERGENT: %pp.phi = phi i32 73 %pp.phi = phi i32 [ %a, %entry], [ %b, %T ] 74 %pp = add i32 %b, 1 75 br i1 %cond.uni, label %R, label %Q 76 77Q: 78 %qq = add i32 %b, 1 79 br i1 %cond.div, label %S, label %R 80 81R: 82 %rr = add i32 %b, 1 83 br label %S 84 85S: 86; CHECK: DIVERGENT: %s.phi = 87; CHECK-NOT: DIVERGENT: %ss = add i32 88 %s.phi = phi i32 [ %qq, %Q ], [ %rr, %R ] 89 %ss = add i32 %pp.phi, 1 90 br i1 %cond.uni, label %exit, label %T 91 92T: 93; CHECK-NOT: DIVERGENT: %tt.phi = phi i32 94 %tt.phi = phi i32 [ %ss, %S ], [ %a, %entry ] 95 %tt = add i32 %b, 1 96 br label %P 97 98exit: 99 %ee = add i32 %b, 1 100 ret void 101} 102 103declare i32 @llvm.amdgcn.workitem.id.x() #0 104