xref: /llvm-project/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir (revision fbe1c0616fa83d39ebad29cfefa020bbebd90057)
1# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
2
3# This test was generated using SelectionDAG, where the compilation flow does
4# not match the assumptions made in MachineUA. For now, this test mostly serves
5# the purpose of catching in any crash when invoking MachineUA. The test should
6# be deleted when it is clear that it is not actually testing anything useful.
7
8---
9# CHECK-LABEL: MachineUniformityInfo for function: hidden_diverge
10# CHECK-LABEL: BLOCK bb.0
11# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:vgpr_32(s32) = COPY $vgpr0
12# CHECK-LABEL: BLOCK bb.2
13# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:vreg_1 = PHI %{{[0-9]*}}:vreg_1, %bb.0, %{{[0-9]*}}:sreg_64, %bb.1
14# CHECK-LABEL: BLOCK bb.3
15# CHECK-LABEL: BLOCK bb.4
16
17name:            hidden_diverge
18tracksRegLiveness: true
19body:             |
20  bb.0:
21    successors: %bb.1(0x40000000), %bb.2(0x40000000)
22    liveins: $vgpr0, $sgpr0_sgpr1
23
24    %11:sgpr_64(p4) = COPY $sgpr0_sgpr1
25    %10:vgpr_32(s32) = COPY $vgpr0
26    %15:sreg_64_xexec = S_LOAD_DWORDX2_IMM %11(p4), 36, 0
27    %16:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %11(p4), 44, 0
28    %17:sreg_32 = COPY %15.sub1
29    %18:sreg_32 = COPY %15.sub0
30    %19:sgpr_96 = REG_SEQUENCE killed %18, %subreg.sub0, killed %17, %subreg.sub1, killed %16, %subreg.sub2
31    %0:sgpr_96 = COPY %19
32    %20:sreg_32 = S_MOV_B32 -1
33    %21:sreg_64 = V_CMP_GT_I32_e64 %10(s32), killed %20, implicit $exec
34    %22:sreg_32 = S_MOV_B32 0
35    %23:sreg_64 = V_CMP_LT_I32_e64 %10(s32), killed %22, implicit $exec
36    %1:vreg_1 = COPY %21
37    %14:sreg_32 = IMPLICIT_DEF
38    %2:sreg_64 = SI_IF killed %23, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
39    S_BRANCH %bb.1
40
41  bb.1:
42    successors: %bb.2(0x80000000)
43
44    %24:sreg_32 = COPY %0.sub0
45    %3:sreg_32 = COPY %0.sub1
46    %25:sreg_32 = S_MOV_B32 0
47    S_CMP_LT_I32 killed %24, killed %25, implicit-def $scc
48    %26:sreg_64 = COPY $scc
49    %4:sreg_64 = COPY %26
50
51  bb.2:
52    successors: %bb.3(0x40000000), %bb.4(0x40000000)
53
54    %5:sreg_32 = PHI %14, %bb.0, %3, %bb.1
55    %6:vreg_1 = PHI %1, %bb.0, %4, %bb.1
56    SI_END_CF %2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
57    %27:sreg_64 = COPY %6
58    %7:sreg_64 = SI_IF %27, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
59    S_BRANCH %bb.3
60
61  bb.3:
62    successors: %bb.4(0x80000000)
63
64    %8:sreg_32 = COPY %0.sub2
65
66  bb.4:
67    %9:vgpr_32 = PHI %5, %bb.2, %8, %bb.3
68    SI_END_CF %7, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
69    %28:sreg_64 = IMPLICIT_DEF
70    %29:vreg_64 = COPY %28
71    GLOBAL_STORE_DWORD killed %29, %9, 0, 0, implicit $exec
72    S_ENDPGM 0
73
74...
75