1# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1030 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s 2--- 3name: f1 4tracksRegLiveness: true 5body: | 6 ; CHECK-LABEL: MachineUniformityInfo for function: f1 7 bb.1: 8 %3:_(s32) = G_CONSTANT i32 0 9 %25:_(s32) = G_IMPLICIT_DEF 10 11 bb.2: 12 %0:_(s32) = G_PHI %22(s32), %bb.5, %3(s32), %bb.1 13 %1:_(s32) = G_PHI %3(s32), %bb.1, %20(s32), %bb.5 14 %2:_(s32) = G_PHI %3(s32), %bb.1, %19(s32), %bb.5 15 %36:_(s32) = G_CONSTANT i32 0 16 %4:_(s1) = G_ICMP intpred(slt), %1(s32), %36 17 18 bb.3: 19 successors: %bb.4(0x04000000), %bb.3(0x7c000000) 20 21 %5:_(s32) = G_PHI %38(s32), %bb.3, %1(s32), %bb.2 22 %38:_(s32) = G_CONSTANT i32 0 23 G_BRCOND %4(s1), %bb.3 24 G_BR %bb.4 25 26 bb.4: 27 successors: %bb.7, %bb.5 28 29 %6:_(s32) = G_PHI %5(s32), %bb.3 30 %33:_(s1) = G_CONSTANT i1 true 31 %7:_(s64) = G_SEXT %2(s32) 32 %39:_(s32) = G_CONSTANT i32 2 33 %10:_(s64) = G_SHL %7, %39(s32) 34 %11:_(p0) = G_INTTOPTR %10(s64) 35 %13:_(s32) = G_LOAD %11(p0) :: (load (s32)) 36 %37:_(s32) = G_CONSTANT i32 0 37 %14:sreg_32_xm0_xexec(s1) = G_ICMP intpred(slt), %13(s32), %37 38 %16:sreg_32_xm0_xexec(s32) = SI_IF %14(s1), %bb.5, implicit-def $exec, implicit-def $scc, implicit $exec 39 G_BR %bb.7 40 41 bb.5: 42 successors: %bb.6(0x04000000), %bb.2(0x7c000000) 43 ; CHECK-NOT: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_PHI 44 ; CHECK-NOT: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_PHI 45 ; CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_PHI 46 ; CHECK-NOT: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:sreg_32_xm0_xexec(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.if.break) 47 %19:_(s32) = G_PHI %18(s32), %bb.7, %25(s32), %bb.4 48 %20:_(s32) = G_PHI %6(s32), %bb.7, %25(s32), %bb.4 49 %21:_(s1) = G_PHI %34(s1), %bb.7, %33(s1), %bb.4 50 G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.end.cf), %16(s32) 51 %22:sreg_32_xm0_xexec(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.if.break), %21(s1), %0(s32) 52 SI_LOOP %22(s32), %bb.2, implicit-def $exec, implicit-def $scc, implicit $exec 53 G_BR %bb.6 54 55 bb.6: 56 %24:_(s32) = G_PHI %22(s32), %bb.5 57 G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.end.cf), %24(s32) 58 SI_RETURN 59 60 bb.7: 61 %34:_(s1) = G_CONSTANT i1 false 62 %35:_(s32) = G_CONSTANT i32 1 63 %18:_(s32) = G_OR %2, %35 64 G_BR %bb.5 65 66... 67