1# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s 2# loads from flat non uniform 3--- 4name: flatloads 5tracksRegLiveness: true 6machineFunctionInfo: 7 isEntryFunction: true 8 9body: | 10 bb.0: 11 ; CHECK-LABEL: MachineUniformityInfo for function: flatloads 12 ; CHECK: DIVERGENT: %1 13 ; CHECK-NOT: DIVERGENT: %2 14 %0:vreg_64 = IMPLICIT_DEF 15 %1:vgpr_32(s32) = FLAT_LOAD_DWORD %0, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32)) 16 %2:vgpr_32(s32) = FLAT_LOAD_DWORD %0, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32), addrspace 1) 17 %3:sreg_32 = V_READFIRSTLANE_B32 %1(s32), implicit $exec 18 S_ENDPGM 0 19... 20 21# loads from scratch non uniform 22--- 23name: scratchloads 24tracksRegLiveness: true 25machineFunctionInfo: 26 isEntryFunction: true 27 28body: | 29 bb.0: 30 ; CHECK-LABEL: MachineUniformityInfo for function: scratchloads 31 ; CHECK: DIVERGENT: %1 32 %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 33 %1:vgpr_32 = SCRATCH_LOAD_DWORD %0, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32), addrspace 5) 34 S_ENDPGM 0 35... 36 37# Global load 38--- 39name: globalloads 40tracksRegLiveness: true 41machineFunctionInfo: 42 isEntryFunction: true 43 44body: | 45 bb.0: 46 ; CHECK-LABEL: MachineUniformityInfo for function: globalloads 47 ; CHECK: DIVERGENT: %2 48 ; CHECK-NOT: DIVERGENT: %3 49 %0:vreg_64 = IMPLICIT_DEF 50 %1:vreg_64 = IMPLICIT_DEF 51 %2:vgpr_32(s32) = GLOBAL_LOAD_DWORD %0, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32)) 52 %3:vreg_64 = GLOBAL_LOAD_DWORDX2 %1, 0, 0, implicit $exec :: (load (s64), addrspace 1) 53 %4:sreg_32 = V_READFIRSTLANE_B32 %2(s32), implicit $exec 54 S_ENDPGM 0 55... 56 57# FIXME:: ADDTID might instruction incorrectly marked uniform 58--- 59name: dsreads 60tracksRegLiveness: true 61machineFunctionInfo: 62 isEntryFunction: true 63 64body: | 65 bb.0: 66 ; CHECK-LABEL: MachineUniformityInfo for function: dsreads 67 ; CHECK-NEXT: ALL VALUES UNIFORM 68 %0:vreg_64 = IMPLICIT_DEF 69 $m0 = S_MOV_B32 0 70 %1:vgpr_32 = DS_READ_ADDTID_B32 0, 0, implicit $m0, implicit $exec 71 S_ENDPGM 0 72... 73 74# copy source == $sgpr => uniform, $vgpr => divergent 75--- 76name: sgprcopy 77tracksRegLiveness: true 78machineFunctionInfo: 79 isEntryFunction: true 80body: | 81 bb.0: 82 ; CHECK-LABEL: MachineUniformityInfo for function: sgprcopy 83 ; CHECK: DIVERGENT: %2 84 liveins: $sgpr0,$sgpr1,$vgpr0 85 %0:sgpr_32 = COPY $sgpr0 86 %1:vgpr_32 = COPY $sgpr1 87 %2:vgpr_32 = COPY $vgpr0 88 S_ENDPGM 0 89... 90 91# writelane is not uniform 92--- 93name: writelane 94machineFunctionInfo: 95 isEntryFunction: true 96body: | 97 bb.0: 98 ; CHECK-LABEL: MachineUniformityInfo for function: writelane 99 ; CHECK: DIVERGENT: %4 100 101 ; Note how %5 is the result of a vector compare, but it is reported as 102 ; uniform because it is stored in an sreg. 103 ; CHECK-NOT: DIVERGENT: %5 104 105 %0:vgpr_32 = IMPLICIT_DEF 106 %1:vgpr_32 = IMPLICIT_DEF 107 %2:sgpr_32 = V_READFIRSTLANE_B32 %0, implicit $exec 108 %3:sgpr_32 = V_READLANE_B32 %1, 0, implicit $exec 109 $sgpr0 = V_READFIRSTLANE_B32 $vgpr0, implicit $exec 110 $sgpr1 = V_READLANE_B32 $vgpr1, $sgpr0, implicit $exec 111 112 %4:vgpr_32 = V_WRITELANE_B32 0, 0, %0, implicit $exec 113 %5:sreg_64 = V_CMP_EQ_U32_e64 %0, %4, implicit $exec 114 S_CBRANCH_VCCZ %bb.1, implicit $vcc 115 116 bb.1: 117 %16:vgpr_32 = IMPLICIT_DEF 118 S_ENDPGM 0 119... 120# Directly reading physical vgpr not uniform 121--- 122name: physicalreg 123tracksRegLiveness: true 124body: | 125 bb.0: 126 ; CHECK-LABEL: MachineUniformityInfo for function: physicalreg 127 ; CHECK: DIVERGENT: %0 128 ; CHECK: DIVERGENT: %1 129 ; CHECK: DIVERGENT: %2 130 ; CHECK: DIVERGENT: %3 131 ; CHECK: DIVERGENT: %4 132 ; CHECK-NOT: DIVERGENT 133 ; CHECK: DIVERGENT: %5 134 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5 135 %0:vgpr_32 = COPY $vgpr0 136 %1:vgpr_32 = COPY $vgpr1 137 %2:vgpr_32 = V_AND_B32_e32 %1, $vgpr3, implicit $exec 138 %3:vgpr_32 = V_ADD_U32_e32 $vgpr2, $vgpr3, implicit $exec 139 %4:vgpr_32 = V_SUB_CO_U32_e32 $vgpr2, $vgpr3, implicit $exec, implicit-def $vcc 140 %5:vgpr_32 = V_AND_B32_e32 $vgpr4, $vgpr5, implicit $exec 141 S_ENDPGM 0 142... 143# mbcnt instructions are not uniform 144--- 145name: mbcnt_lo 146machineFunctionInfo: 147 isEntryFunction: true 148body: | 149 bb.0: 150 ; CHECK-LABEL: MachineUniformityInfo for function: mbcnt_lo 151 ; CHECK: DIVERGENT: %0 152 %0:vgpr_32 = V_MBCNT_LO_U32_B32_e64 -1, 0, implicit $exec 153 S_ENDPGM 0 154... 155--- 156name: mbcnt_hi 157machineFunctionInfo: 158 isEntryFunction: true 159body: | 160 bb.0: 161 ; CHECK-LABEL: MachineUniformityInfo for function: mbcnt_hi 162 ; CHECK: DIVERGENT: %0 163 %0:vgpr_32 = V_MBCNT_HI_U32_B32_e64 -1, 0, implicit $exec 164 S_ENDPGM 0 165... 166