xref: /llvm-project/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir (revision ae77aceba5ad6ee575d3d79eb0259624322b19f4)
1# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
2
3---
4name:            loads
5tracksRegLiveness: true
6body:             |
7  bb.1.entry:
8    %1:_(p0) = G_IMPLICIT_DEF
9    %4:_(p1) = G_IMPLICIT_DEF
10    %6:_(p5) = G_IMPLICIT_DEF
11
12    ; Atomic load
13    ; CHECK: DIVERGENT
14    ; CHECK-SAME: G_LOAD
15    %0:_(s32) = G_LOAD %1(p0) :: (load seq_cst (s32) from `ptr undef`)
16
17    ; flat load
18    ; CHECK: DIVERGENT
19    ; CHECK-SAME: G_LOAD
20    %2:_(s32) = G_LOAD %1(p0) :: (load (s32) from `ptr undef`)
21
22    ; Gloabal load
23    ; CHECK-NOT: DIVERGENT
24    %3:_(s32) = G_LOAD %4(p1) :: (load (s32) from `ptr addrspace(1) undef`, addrspace 1)
25
26    ; Private load
27    ; CHECK: DIVERGENT
28    ; CHECK-SAME: G_LOAD
29    %5:_(s32) = G_LOAD %6(p5) :: (volatile load (s32) from `ptr addrspace(5) undef`, addrspace 5)
30    G_STORE %2(s32), %4(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
31    G_STORE %3(s32), %4(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
32    G_STORE %5(s32), %4(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
33    G_STORE %0(s32), %4(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
34    SI_RETURN
35
36...
37