1# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s 2# CHECK-LABEL: MachineUniformityInfo for function: test 3 4# CHECK-LABEL: BLOCK bb.0 5# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_ICMP intpred(eq), %{{[0-9]*}}:_(s32), %{{[0-9]*}}:_ 6 7# CHECK-LABEL: BLOCK bb.1 8# CHECK-NOT: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_PHI %{{[0-9]*}}:_(s32), %bb.0, %{{[0-9]*}}:_(s32), %bb.2 9# CHECK: DIVERGENT: G_BRCOND %{{[0-9]*}}:_(s1), %bb.3 10 11# CHECK-LABEL: BLOCK bb.2 12# CHECK-NOT: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32), %{{[0-9]*}}:_(s1) = G_UADDO_ 13# CHECK-NOT: DIVERGENT: G_BRCOND %{{[0-9]*}}:_(s1), %bb.3 14 15# CHECK-LABEL: BLOCK bb.3 16# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_PHI %{{[0-9]*}}:_(s1), %bb.1, %{{[0-9]*}}:_(s1), %bb.2 17# CHECK: DIVERGENT: G_BRCOND %{{[0-9]*}}:_(s1), %bb.4 18# CHECK: DIVERGENT: G_BR %bb.5 19 20--- 21name: test 22tracksRegLiveness: true 23body: | 24 bb.0: 25 successors: %bb.1 26 27 %2:_(s1) = G_CONSTANT i1 true 28 %3:_(s1) = G_CONSTANT i1 false 29 %1:_(s32) = G_CONSTANT i32 0 30 %20:_(s32) = G_CONSTANT i32 7 31 %5:_(s32) = G_CONSTANT i32 -1 32 %4:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.x) 33 %6:_(s1) = G_ICMP intpred(eq), %4(s32), %5 34 35 bb.1: 36 successors: %bb.2, %bb.3 37 38 %8:_(s32) = G_PHI %20(s32), %bb.0, %21(s32), %bb.2 39 G_BRCOND %6(s1), %bb.3 ; Entrance to loop is divergent 40 bb.2: 41 successors: %bb.3, %bb.1 42 43 %21:_(s32), %22:_(s1) = G_UADDO %8, %5 44 %23:_(s1) = G_ICMP intpred(eq), %21(s32), %1 45 G_BRCOND %23(s1), %bb.3 46 G_BR %bb.1 47 48 bb.3: 49 %31:_(s1) = G_PHI %2(s1), %bb.1, %3(s1), %bb.2 50 S_ENDPGM 0 51 G_BRCOND %31(s1), %bb.4 52 G_BR %bb.5 53 bb.4: 54 G_BR %bb.5 55 bb.5: 56 57... 58