1# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s 2# CHECK-LABEL: MachineUniformityInfo for function: basic 3# CHECK-NOT: CYCLES ASSSUMED DIVERGENT: 4# CHECK: CYCLES WITH DIVERGENT EXIT: 5# CHECK: depth=1: entries(bb.1 bb.3) bb.2 6 7--- 8name: basic 9tracksRegLiveness: true 10body: | 11 bb.0: 12 successors: %bb.3, %bb.1 13 14 %0:_(s32) = G_CONSTANT i32 0 15 %1:_(s32) = G_CONSTANT i32 1 16 17 %2:_(s32) = G_IMPLICIT_DEF 18 %3:_(s32) = G_IMPLICIT_DEF 19 20 %6:_(s1) = G_ICMP intpred(slt), %2(s32), %0(s32) ;uniform condition 21 %7:_(s1) = G_ICMP intpred(eq), %4(s32), %0 ;divergent condition 22 %4:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.x) 23 G_BRCOND %6(s1), %bb.3 24 G_BR %bb.1 25 26 bb.1: 27 successors: %bb.2 28 29 %8:_(s32) = G_PHI %2(s32), %bb.0, %3(s32), %bb.3 30 %10:_(s32) = G_PHI %2(s32), %bb.0, %16(s32), %bb.3 31 %9:_(s32) = G_ADD %3(s32), %1(s32) 32 G_BR %bb.2 33 34 bb.2: 35 successors: %bb.3, %bb.4 36 37 %13:_(s32) = G_ADD %3(s32), %1(s32) 38 %14:_(s32) = G_ADD %10(s32), %1(s32) 39 %15:_(s32) = G_ADD %10(s32), %1(s32) 40 41 G_BRCOND %7(s1), %bb.3 42 G_BR %bb.4 43 44 bb.3: 45 successors: %bb.1 46 %16:_(s32) = G_PHI %13(s32), %bb.2, %2(s32), %bb.0 47 %17:_(s32) = G_ADD %3(s32), %1(s32) 48 G_BR %bb.1 49 bb.4: 50 ; CHECK-LABEL: bb.4 51 ; CHECK: DIVERGENT: 52 ; CHECK: DIVERGENT: 53 ; CHECK-NOT: DIVERGENT: 54 %18:_(s32) = G_ADD %8(s32), %3(s32) 55 %19:_(s32) = G_ADD %8(s32), %3(s32) 56 %20:_(s32) = G_ADD %3(s32), %1(s32) 57 S_ENDPGM 0 58... 59