xref: /llvm-project/llvm/test/Analysis/TypeBasedAliasAnalysis/dse.ll (revision 527bdbff3d26c4f908b9d454da3261d2ae0c8332)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
2; RUN: opt < %s -aa-pipeline=tbaa,basic-aa -passes=dse -S | FileCheck %s
3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
4
5; DSE should make use of TBAA.
6
7define i8 @test0_yes(ptr %a, ptr %b) nounwind {
8; CHECK-LABEL: define i8 @test0_yes
9; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0:[0-9]+]] {
10; CHECK-NEXT:    [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[TBAA0:![0-9]+]]
11; CHECK-NEXT:    store i8 1, ptr [[A]], align 1, !tbaa [[TBAA3:![0-9]+]]
12; CHECK-NEXT:    ret i8 [[Y]]
13;
14  store i8 0, ptr %a, !tbaa !1
15  %y = load i8, ptr %b, !tbaa !2
16  store i8 1, ptr %a, !tbaa !1
17  ret i8 %y
18}
19
20define i8 @test0_no(ptr %a, ptr %b) nounwind {
21; CHECK-LABEL: define i8 @test0_no
22; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
23; CHECK-NEXT:    store i8 0, ptr [[A]], align 1, !tbaa [[TBAA3]]
24; CHECK-NEXT:    [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[TBAA5:![0-9]+]]
25; CHECK-NEXT:    store i8 1, ptr [[A]], align 1, !tbaa [[TBAA3]]
26; CHECK-NEXT:    ret i8 [[Y]]
27;
28  store i8 0, ptr %a, !tbaa !3
29  %y = load i8, ptr %b, !tbaa !4
30  store i8 1, ptr %a, !tbaa !3
31  ret i8 %y
32}
33
34define i8 @test1_yes(ptr %a, ptr %b) nounwind {
35; CHECK-LABEL: define i8 @test1_yes
36; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
37; CHECK-NEXT:    [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[TBAA8:![0-9]+]]
38; CHECK-NEXT:    store i8 1, ptr [[A]], align 1
39; CHECK-NEXT:    ret i8 [[Y]]
40;
41  store i8 0, ptr %a
42  %y = load i8, ptr %b, !tbaa !5
43  store i8 1, ptr %a
44  ret i8 %y
45}
46
47define i8 @test1_no(ptr %a, ptr %b) nounwind {
48; CHECK-LABEL: define i8 @test1_no
49; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
50; CHECK-NEXT:    store i8 0, ptr [[A]], align 1
51; CHECK-NEXT:    [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[TBAA10:![0-9]+]]
52; CHECK-NEXT:    store i8 1, ptr [[A]], align 1
53; CHECK-NEXT:    ret i8 [[Y]]
54;
55  store i8 0, ptr %a
56  %y = load i8, ptr %b, !tbaa !6
57  store i8 1, ptr %a
58  ret i8 %y
59}
60
61; Root note.
62!0 = !{ }
63; Some type.
64!1 = !{!7, !7, i64 0}
65; Some other non-aliasing type.
66!2 = !{!8, !8, i64 0}
67
68; Some type.
69!3 = !{!9, !9, i64 0}
70; Some type in a different type system.
71!4 = !{!10, !10, i64 0}
72
73; Invariant memory.
74!5 = !{!11, !11, i64 0, i1 1}
75; Not invariant memory.
76!6 = !{!11, !11, i64 0, i1 0}
77!7 = !{ !"foo", !0 }
78!8 = !{ !"bar", !0 }
79!9 = !{ !"foo", !0 }
80!10 = !{ !"bar", !12}
81!11 = !{ !"qux", !0}
82!12 = !{!"different"}
83