1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py 2; RUN: opt -disable-output "-passes=print<scalar-evolution>" < %s 2>&1 | FileCheck %s 3 4target triple = "x86_64-unknown-linux-gnu" 5 6define void @f0() { 7; CHECK-LABEL: 'f0' 8; CHECK-NEXT: Classifying expressions for: @f0 9; CHECK-NEXT: %v0 = phi i16 [ 2, %b0 ], [ %v2, %b1 ] 10; CHECK-NEXT: --> {2,+,1}<nuw><nsw><%b1> U: [2,4) S: [2,4) Exits: 3 LoopDispositions: { %b1: Computable } 11; CHECK-NEXT: %v1 = phi i16 [ 1, %b0 ], [ %v3, %b1 ] 12; CHECK-NEXT: --> {1,+,2,+,1}<%b1> U: full-set S: full-set Exits: 3 LoopDispositions: { %b1: Computable } 13; CHECK-NEXT: %v2 = add nsw i16 %v0, 1 14; CHECK-NEXT: --> {3,+,1}<nuw><nsw><%b1> U: [3,5) S: [3,5) Exits: 4 LoopDispositions: { %b1: Computable } 15; CHECK-NEXT: %v3 = add nsw i16 %v1, %v0 16; CHECK-NEXT: --> {3,+,3,+,1}<%b1> U: full-set S: full-set Exits: 6 LoopDispositions: { %b1: Computable } 17; CHECK-NEXT: %v4 = and i16 %v3, 1 18; CHECK-NEXT: --> (zext i1 {true,+,true,+,true}<%b1> to i16) U: [0,2) S: [0,2) Exits: 0 LoopDispositions: { %b1: Computable } 19; CHECK-NEXT: Determining loop execution counts for: @f0 20; CHECK-NEXT: Loop %b1: backedge-taken count is i6 1 21; CHECK-NEXT: Loop %b1: constant max backedge-taken count is i6 1 22; CHECK-NEXT: Loop %b1: symbolic max backedge-taken count is i6 1 23; CHECK-NEXT: Loop %b1: Trip multiple is 2 24; 25b0: 26 br label %b1 27 28b1: ; preds = %b1, %b0 29 %v0 = phi i16 [ 2, %b0 ], [ %v2, %b1 ] 30 %v1 = phi i16 [ 1, %b0 ], [ %v3, %b1 ] 31 %v2 = add nsw i16 %v0, 1 32 %v3 = add nsw i16 %v1, %v0 33 %v4 = and i16 %v3, 1 34 %v5 = icmp ne i16 %v4, 0 35 br i1 %v5, label %b1, label %b2 36 37b2: ; preds = %b1 38 ret void 39} 40 41@g0 = common dso_local global i16 0, align 2 42@g1 = common dso_local global i32 0, align 4 43@g2 = common dso_local global ptr null, align 8 44 45define void @f1() #0 { 46; CHECK-LABEL: 'f1' 47; CHECK-NEXT: Classifying expressions for: @f1 48; CHECK-NEXT: %v0 = phi i16 [ 0, %b0 ], [ %v3, %b1 ] 49; CHECK-NEXT: --> {0,+,3,+,1}<%b1> U: full-set S: full-set Exits: 7 LoopDispositions: { %b1: Computable } 50; CHECK-NEXT: %v1 = phi i32 [ 3, %b0 ], [ %v6, %b1 ] 51; CHECK-NEXT: --> {3,+,1}<nuw><nsw><%b1> U: [3,6) S: [3,6) Exits: 5 LoopDispositions: { %b1: Computable } 52; CHECK-NEXT: %v2 = trunc i32 %v1 to i16 53; CHECK-NEXT: --> {3,+,1}<%b1> U: [3,6) S: [3,6) Exits: 5 LoopDispositions: { %b1: Computable } 54; CHECK-NEXT: %v3 = add i16 %v0, %v2 55; CHECK-NEXT: --> {3,+,4,+,1}<%b1> U: full-set S: full-set Exits: 12 LoopDispositions: { %b1: Computable } 56; CHECK-NEXT: %v4 = and i16 %v3, 1 57; CHECK-NEXT: --> (zext i1 {true,+,false,+,true}<%b1> to i16) U: [0,2) S: [0,2) Exits: 0 LoopDispositions: { %b1: Computable } 58; CHECK-NEXT: %v6 = add nuw nsw i32 %v1, 1 59; CHECK-NEXT: --> {4,+,1}<nuw><nsw><%b1> U: [4,7) S: [4,7) Exits: 6 LoopDispositions: { %b1: Computable } 60; CHECK-NEXT: %v7 = phi i32 [ %v1, %b1 ] 61; CHECK-NEXT: --> {3,+,1}<nuw><nsw><%b1> U: [3,6) S: [3,6) --> 5 U: [5,6) S: [5,6) 62; CHECK-NEXT: %v8 = phi i16 [ %v3, %b1 ] 63; CHECK-NEXT: --> {3,+,4,+,1}<%b1> U: full-set S: full-set --> 12 U: [12,13) S: [12,13) 64; CHECK-NEXT: Determining loop execution counts for: @f1 65; CHECK-NEXT: Loop %b3: <multiple exits> Unpredictable backedge-taken count. 66; CHECK-NEXT: Loop %b3: Unpredictable constant max backedge-taken count. 67; CHECK-NEXT: Loop %b3: Unpredictable symbolic max backedge-taken count. 68; CHECK-NEXT: Loop %b1: backedge-taken count is i6 2 69; CHECK-NEXT: Loop %b1: constant max backedge-taken count is i6 2 70; CHECK-NEXT: Loop %b1: symbolic max backedge-taken count is i6 2 71; CHECK-NEXT: Loop %b1: Trip multiple is 3 72; 73b0: 74 store i16 0, ptr @g0, align 2 75 store ptr @g1, ptr @g2, align 8 76 br label %b1 77 78b1: ; preds = %b1, %b0 79 %v0 = phi i16 [ 0, %b0 ], [ %v3, %b1 ] 80 %v1 = phi i32 [ 3, %b0 ], [ %v6, %b1 ] 81 %v2 = trunc i32 %v1 to i16 82 %v3 = add i16 %v0, %v2 83 %v4 = and i16 %v3, 1 84 %v5 = icmp eq i16 %v4, 0 85 %v6 = add nuw nsw i32 %v1, 1 86 br i1 %v5, label %b2, label %b1 87 88b2: ; preds = %b1 89 %v7 = phi i32 [ %v1, %b1 ] 90 %v8 = phi i16 [ %v3, %b1 ] 91 store i32 %v7, ptr @g1, align 4 92 store i16 %v8, ptr @g0, align 2 93 br label %b3 94 95b3: ; preds = %b3, %b2 96 br label %b3 97} 98 99attributes #0 = { nounwind uwtable "target-cpu"="x86-64" } 100