1; RUN: opt -passes='print<access-info>' -disable-output < %s 2>&1 | FileCheck %s 2 3; Test to confirm LAA will find multiple stores to an invariant address in the 4; inner loop. 5; 6; for(; i < itr; i++) { 7; for(; j < itr; j++) { 8; var1[i] = var2[j] + var1[i]; 9; var1[i]++; 10; } 11; } 12 13; The LAA with the new PM is a loop pass so we go from inner to outer loops. 14 15; CHECK: for.body3: 16; CHECK: Non vectorizable stores to invariant address were found in loop. 17; CHECK: for.cond1.preheader: 18; CHECK: Non vectorizable stores to invariant address were not found in loop. 19 20define i32 @foo(ptr nocapture %var1, ptr nocapture readonly %var2, i32 %itr) #0 { 21entry: 22 %cmp20 = icmp eq i32 %itr, 0 23 br i1 %cmp20, label %for.end10, label %for.cond1.preheader 24 25for.cond1.preheader: ; preds = %entry, %for.inc8 26 %indvars.iv23 = phi i64 [ %indvars.iv.next24, %for.inc8 ], [ 0, %entry ] 27 %j.022 = phi i32 [ %j.1.lcssa, %for.inc8 ], [ 0, %entry ] 28 %cmp218 = icmp ult i32 %j.022, %itr 29 br i1 %cmp218, label %for.body3.lr.ph, label %for.inc8 30 31for.body3.lr.ph: ; preds = %for.cond1.preheader 32 %arrayidx5 = getelementptr inbounds i32, ptr %var1, i64 %indvars.iv23 33 %0 = zext i32 %j.022 to i64 34 br label %for.body3 35 36for.body3: ; preds = %for.body3, %for.body3.lr.ph 37 %indvars.iv = phi i64 [ %0, %for.body3.lr.ph ], [ %indvars.iv.next, %for.body3 ] 38 %arrayidx = getelementptr inbounds i32, ptr %var2, i64 %indvars.iv 39 %1 = load i32, ptr %arrayidx, align 4 40 %2 = load i32, ptr %arrayidx5, align 4 41 %add = add nsw i32 %2, %1 42 store i32 %add, ptr %arrayidx5, align 4 43 %3 = load i32, ptr %arrayidx5, align 4 44 %4 = add nsw i32 %3, 1 45 store i32 %4, ptr %arrayidx5, align 4 46 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 47 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 48 %exitcond = icmp eq i32 %lftr.wideiv, %itr 49 br i1 %exitcond, label %for.inc8, label %for.body3 50 51for.inc8: ; preds = %for.body3, %for.cond1.preheader 52 %j.1.lcssa = phi i32 [ %j.022, %for.cond1.preheader ], [ %itr, %for.body3 ] 53 %indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1 54 %lftr.wideiv25 = trunc i64 %indvars.iv.next24 to i32 55 %exitcond26 = icmp eq i32 %lftr.wideiv25, %itr 56 br i1 %exitcond26, label %for.end10, label %for.cond1.preheader 57 58for.end10: ; preds = %for.inc8, %entry 59 ret i32 undef 60} 61 62