xref: /llvm-project/llvm/test/Analysis/CostModel/X86/extend.ll (revision ed412494988411fc1aae2f1014c4ecad56d8085f) 
1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
3; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
4; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
5; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx | FileCheck %s --check-prefixes=AVX1
6; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
7; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512FVEC512
8; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512vl,+prefer-256-bit | FileCheck %s --check-prefixes=AVX512FVEC256
9; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512DQVEC512
10; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512dq,+avx512vl,+prefer-256-bit | FileCheck %s --check-prefixes=AVX512DQVEC256
11; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512BWVEC512
12; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512bw,+avx512vl,+prefer-256-bit | FileCheck %s --check-prefixes=AVX512BWVEC256
13
14; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mcpu=slm | FileCheck %s --check-prefixes=SSE,SSE42
15; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mcpu=goldmont | FileCheck %s --check-prefixes=SSE,SSE42
16; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mcpu=btver2 | FileCheck %s --check-prefixes=BTVER2
17
18define i32 @zext_vXi32() "min-legal-vector-width"="256" {
19; SSE-LABEL: 'zext_vXi32'
20; SSE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
21; SSE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> undef to <2 x i64>
22; SSE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i32> undef to <4 x i64>
23; SSE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = zext <8 x i32> undef to <8 x i64>
24; SSE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = zext <16 x i32> undef to <16 x i64>
25; SSE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i64 = zext <32 x i32> undef to <32 x i64>
26; SSE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
27;
28; AVX1-LABEL: 'zext_vXi32'
29; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
30; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> undef to <2 x i64>
31; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = zext <4 x i32> undef to <4 x i64>
32; AVX1-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V8i64 = zext <8 x i32> undef to <8 x i64>
33; AVX1-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V16i64 = zext <16 x i32> undef to <16 x i64>
34; AVX1-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V32i64 = zext <32 x i32> undef to <32 x i64>
35; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
36;
37; AVX2-LABEL: 'zext_vXi32'
38; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
39; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> undef to <2 x i64>
40; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i32> undef to <4 x i64>
41; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V8i64 = zext <8 x i32> undef to <8 x i64>
42; AVX2-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V16i64 = zext <16 x i32> undef to <16 x i64>
43; AVX2-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V32i64 = zext <32 x i32> undef to <32 x i64>
44; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
45;
46; AVX512FVEC512-LABEL: 'zext_vXi32'
47; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
48; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> undef to <2 x i64>
49; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i32> undef to <4 x i64>
50; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = zext <8 x i32> undef to <8 x i64>
51; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = zext <16 x i32> undef to <16 x i64>
52; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i64 = zext <32 x i32> undef to <32 x i64>
53; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
54;
55; AVX512FVEC256-LABEL: 'zext_vXi32'
56; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
57; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> undef to <2 x i64>
58; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i32> undef to <4 x i64>
59; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i64 = zext <8 x i32> undef to <8 x i64>
60; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i64 = zext <16 x i32> undef to <16 x i64>
61; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V32i64 = zext <32 x i32> undef to <32 x i64>
62; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
63;
64; AVX512DQVEC512-LABEL: 'zext_vXi32'
65; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
66; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> undef to <2 x i64>
67; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i32> undef to <4 x i64>
68; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = zext <8 x i32> undef to <8 x i64>
69; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = zext <16 x i32> undef to <16 x i64>
70; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i64 = zext <32 x i32> undef to <32 x i64>
71; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
72;
73; AVX512DQVEC256-LABEL: 'zext_vXi32'
74; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
75; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> undef to <2 x i64>
76; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i32> undef to <4 x i64>
77; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i64 = zext <8 x i32> undef to <8 x i64>
78; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i64 = zext <16 x i32> undef to <16 x i64>
79; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V32i64 = zext <32 x i32> undef to <32 x i64>
80; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
81;
82; AVX512BWVEC512-LABEL: 'zext_vXi32'
83; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
84; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> undef to <2 x i64>
85; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i32> undef to <4 x i64>
86; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = zext <8 x i32> undef to <8 x i64>
87; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = zext <16 x i32> undef to <16 x i64>
88; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i64 = zext <32 x i32> undef to <32 x i64>
89; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
90;
91; AVX512BWVEC256-LABEL: 'zext_vXi32'
92; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
93; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> undef to <2 x i64>
94; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i32> undef to <4 x i64>
95; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i64 = zext <8 x i32> undef to <8 x i64>
96; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i64 = zext <16 x i32> undef to <16 x i64>
97; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V32i64 = zext <32 x i32> undef to <32 x i64>
98; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
99;
100; BTVER2-LABEL: 'zext_vXi32'
101; BTVER2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
102; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> undef to <2 x i64>
103; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = zext <4 x i32> undef to <4 x i64>
104; BTVER2-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V8i64 = zext <8 x i32> undef to <8 x i64>
105; BTVER2-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V16i64 = zext <16 x i32> undef to <16 x i64>
106; BTVER2-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V32i64 = zext <32 x i32> undef to <32 x i64>
107; BTVER2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
108;
109  %I64 = zext i32 undef to i64
110  %V2i64 = zext <2 x i32> undef to <2 x i64>
111  %V4i64 = zext <4 x i32> undef to <4 x i64>
112  %V8i64 = zext <8 x i32> undef to <8 x i64>
113  %V16i64 = zext <16 x i32> undef to <16 x i64>
114  %V32i64 = zext <32 x i32> undef to <32 x i64>
115
116  ret i32 undef
117}
118
119define i32 @zext_vXi16() "min-legal-vector-width"="256" {
120; SSE2-LABEL: 'zext_vXi16'
121; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
122; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
123; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
124; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
125; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
126; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
127; SSE2-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
128; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
129; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
130; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
131; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
132; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
133; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
134; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
135; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
136;
137; SSSE3-LABEL: 'zext_vXi16'
138; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
139; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
140; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
141; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
142; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
143; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
144; SSSE3-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
145; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
146; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
147; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
148; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
149; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
150; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
151; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
152; SSSE3-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
153;
154; SSE42-LABEL: 'zext_vXi16'
155; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
156; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
157; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
158; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
159; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
160; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
161; SSE42-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
162; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
163; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
164; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
165; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
166; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
167; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
168; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
169; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
170;
171; AVX1-LABEL: 'zext_vXi16'
172; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
173; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
174; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
175; AVX1-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
176; AVX1-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
177; AVX1-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
178; AVX1-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
179; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
180; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
181; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
182; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
183; AVX1-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
184; AVX1-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
185; AVX1-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
186; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
187;
188; AVX2-LABEL: 'zext_vXi16'
189; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
190; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
191; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
192; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
193; AVX2-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
194; AVX2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
195; AVX2-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
196; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
197; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
198; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
199; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
200; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
201; AVX2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
202; AVX2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
203; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
204;
205; AVX512FVEC512-LABEL: 'zext_vXi16'
206; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
207; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
208; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
209; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
210; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
211; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
212; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
213; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
214; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
215; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
216; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
217; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
218; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
219; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
220; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
221;
222; AVX512FVEC256-LABEL: 'zext_vXi16'
223; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
224; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
225; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
226; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
227; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
228; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
229; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
230; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
231; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
232; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
233; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
234; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
235; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
236; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
237; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
238;
239; AVX512DQVEC512-LABEL: 'zext_vXi16'
240; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
241; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
242; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
243; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
244; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
245; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
246; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
247; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
248; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
249; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
250; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
251; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
252; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
253; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
254; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
255;
256; AVX512DQVEC256-LABEL: 'zext_vXi16'
257; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
258; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
259; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
260; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
261; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
262; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
263; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
264; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
265; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
266; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
267; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
268; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
269; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
270; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
271; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
272;
273; AVX512BWVEC512-LABEL: 'zext_vXi16'
274; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
275; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
276; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
277; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
278; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
279; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
280; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
281; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
282; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
283; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
284; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
285; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
286; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
287; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
288; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
289;
290; AVX512BWVEC256-LABEL: 'zext_vXi16'
291; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
292; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
293; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
294; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
295; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
296; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
297; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
298; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
299; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
300; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
301; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
302; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
303; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
304; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
305; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
306;
307; BTVER2-LABEL: 'zext_vXi16'
308; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i16 undef to i64
309; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i16> undef to <2 x i64>
310; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = zext <4 x i16> undef to <4 x i64>
311; BTVER2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = zext <8 x i16> undef to <8 x i64>
312; BTVER2-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V16i64 = zext <16 x i16> undef to <16 x i64>
313; BTVER2-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V32i64 = zext <32 x i16> undef to <32 x i64>
314; BTVER2-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V64i64 = zext <64 x i16> undef to <64 x i64>
315; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i16 undef to i32
316; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i16> undef to <2 x i32>
317; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i16> undef to <4 x i32>
318; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i32 = zext <8 x i16> undef to <8 x i32>
319; BTVER2-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V16i32 = zext <16 x i16> undef to <16 x i32>
320; BTVER2-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V32i32 = zext <32 x i16> undef to <32 x i32>
321; BTVER2-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V64i32 = zext <64 x i16> undef to <64 x i32>
322; BTVER2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
323;
324  %I64 = zext i16 undef to i64
325  %V2i64 = zext <2 x i16> undef to <2 x i64>
326  %V4i64 = zext <4 x i16> undef to <4 x i64>
327  %V8i64 = zext <8 x i16> undef to <8 x i64>
328  %V16i64 = zext <16 x i16> undef to <16 x i64>
329  %V32i64 = zext <32 x i16> undef to <32 x i64>
330  %V64i64 = zext <64 x i16> undef to <64 x i64>
331
332  %I32 = zext i16 undef to i32
333  %V2i32 = zext <2 x i16> undef to <2 x i32>
334  %V4i32 = zext <4 x i16> undef to <4 x i32>
335  %V8i32 = zext <8 x i16> undef to <8 x i32>
336  %V16i32 = zext <16 x i16> undef to <16 x i32>
337  %V32i32 = zext <32 x i16> undef to <32 x i32>
338  %V64i32 = zext <64 x i16> undef to <64 x i32>
339
340  ret i32 undef
341}
342
343define i32 @zext_vXi8() "min-legal-vector-width"="256" {
344; SSE2-LABEL: 'zext_vXi8'
345; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
346; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
347; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
348; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
349; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
350; SSE2-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
351; SSE2-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
352; SSE2-NEXT:  Cost Model: Found an estimated cost of 256 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
353; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
354; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
355; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
356; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
357; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
358; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
359; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
360; SSE2-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
361; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
362; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
363; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
364; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
365; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
366; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
367; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
368; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
369; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
370;
371; SSSE3-LABEL: 'zext_vXi8'
372; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
373; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
374; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
375; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
376; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
377; SSSE3-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
378; SSSE3-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
379; SSSE3-NEXT:  Cost Model: Found an estimated cost of 256 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
380; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
381; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
382; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
383; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
384; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
385; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
386; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
387; SSSE3-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
388; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
389; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
390; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
391; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
392; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
393; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
394; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
395; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
396; SSSE3-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
397;
398; SSE42-LABEL: 'zext_vXi8'
399; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
400; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
401; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
402; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
403; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
404; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
405; SSE42-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
406; SSE42-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
407; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
408; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
409; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
410; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
411; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
412; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
413; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
414; SSE42-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
415; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
416; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
417; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
418; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
419; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
420; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
421; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
422; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
423; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
424;
425; AVX1-LABEL: 'zext_vXi8'
426; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
427; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
428; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
429; AVX1-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
430; AVX1-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
431; AVX1-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
432; AVX1-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
433; AVX1-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
434; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
435; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
436; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
437; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
438; AVX1-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
439; AVX1-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
440; AVX1-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
441; AVX1-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
442; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
443; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
444; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
445; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
446; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
447; AVX1-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
448; AVX1-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
449; AVX1-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
450; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
451;
452; AVX2-LABEL: 'zext_vXi8'
453; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
454; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
455; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
456; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
457; AVX2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
458; AVX2-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
459; AVX2-NEXT:  Cost Model: Found an estimated cost of 34 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
460; AVX2-NEXT:  Cost Model: Found an estimated cost of 68 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
461; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
462; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
463; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
464; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
465; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
466; AVX2-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
467; AVX2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
468; AVX2-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
469; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
470; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
471; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
472; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
473; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
474; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
475; AVX2-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
476; AVX2-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
477; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
478;
479; AVX512FVEC512-LABEL: 'zext_vXi8'
480; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
481; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
482; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
483; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
484; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
485; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
486; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
487; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
488; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
489; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
490; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
491; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
492; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
493; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
494; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
495; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
496; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
497; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
498; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
499; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
500; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
501; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
502; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
503; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
504; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
505;
506; AVX512FVEC256-LABEL: 'zext_vXi8'
507; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
508; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
509; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
510; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
511; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
512; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
513; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
514; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
515; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
516; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
517; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
518; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
519; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
520; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
521; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
522; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
523; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
524; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
525; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
526; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
527; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
528; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
529; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
530; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
531; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
532;
533; AVX512DQVEC512-LABEL: 'zext_vXi8'
534; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
535; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
536; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
537; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
538; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
539; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
540; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
541; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
542; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
543; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
544; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
545; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
546; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
547; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
548; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
549; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
550; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
551; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
552; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
553; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
554; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
555; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
556; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
557; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
558; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
559;
560; AVX512DQVEC256-LABEL: 'zext_vXi8'
561; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
562; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
563; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
564; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
565; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
566; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
567; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
568; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
569; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
570; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
571; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
572; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
573; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
574; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
575; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
576; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
577; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
578; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
579; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
580; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
581; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
582; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
583; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
584; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
585; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
586;
587; AVX512BWVEC512-LABEL: 'zext_vXi8'
588; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
589; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
590; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
591; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
592; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
593; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
594; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
595; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
596; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
597; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
598; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
599; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
600; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
601; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
602; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
603; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
604; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
605; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
606; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
607; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
608; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
609; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
610; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
611; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
612; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
613;
614; AVX512BWVEC256-LABEL: 'zext_vXi8'
615; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
616; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
617; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
618; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
619; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
620; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
621; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
622; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
623; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
624; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
625; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
626; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
627; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
628; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
629; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
630; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
631; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
632; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
633; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
634; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
635; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
636; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
637; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
638; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
639; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
640;
641; BTVER2-LABEL: 'zext_vXi8'
642; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
643; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
644; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
645; BTVER2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
646; BTVER2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
647; BTVER2-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
648; BTVER2-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
649; BTVER2-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
650; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
651; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
652; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
653; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
654; BTVER2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
655; BTVER2-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
656; BTVER2-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
657; BTVER2-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
658; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
659; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
660; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
661; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
662; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
663; BTVER2-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
664; BTVER2-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
665; BTVER2-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
666; BTVER2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
667;
668  %I64 = zext i8 undef to i64
669  %V2i64 = zext <2 x i8> undef to <2 x i64>
670  %V4i64 = zext <4 x i8> undef to <4 x i64>
671  %V8i64 = zext <8 x i8> undef to <8 x i64>
672  %V16i64 = zext <16 x i8> undef to <16 x i64>
673  %V32i64 = zext <32 x i8> undef to <32 x i64>
674  %V64i64 = zext <64 x i8> undef to <64 x i64>
675  %V128i64 = zext <128 x i8> undef to <128 x i64>
676
677  %I32 = zext i8 undef to i32
678  %V2i32 = zext <2 x i8> undef to <2 x i32>
679  %V4i32 = zext <4 x i8> undef to <4 x i32>
680  %V8i32 = zext <8 x i8> undef to <8 x i32>
681  %V16i32 = zext <16 x i8> undef to <16 x i32>
682  %V32i32 = zext <32 x i8> undef to <32 x i32>
683  %V64i32 = zext <64 x i8> undef to <64 x i32>
684  %V128i32 = zext <128 x i8> undef to <128 x i32>
685
686  %I16 = zext i8 undef to i16
687  %V2i16 = zext <2 x i8> undef to <2 x i16>
688  %V4i16 = zext <4 x i8> undef to <4 x i16>
689  %V8i16 = zext <8 x i8> undef to <8 x i16>
690  %V16i16 = zext <16 x i8> undef to <16 x i16>
691  %V32i16 = zext <32 x i8> undef to <32 x i16>
692  %V64i16 = zext <64 x i8> undef to <64 x i16>
693  %V128i16 = zext <128 x i8> undef to <128 x i16>
694
695  ret i32 undef
696}
697
698define i32 @zext_vXi1() "min-legal-vector-width"="256" {
699; SSE2-LABEL: 'zext_vXi1'
700; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
701; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
702; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
703; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
704; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
705; SSE2-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
706; SSE2-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
707; SSE2-NEXT:  Cost Model: Found an estimated cost of 256 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
708; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
709; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
710; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
711; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
712; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
713; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
714; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
715; SSE2-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
716; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
717; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
718; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
719; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
720; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
721; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
722; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
723; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
724; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
725; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
726; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
727; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
728; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
729; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
730; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
731; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
732; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
733;
734; SSSE3-LABEL: 'zext_vXi1'
735; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
736; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
737; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
738; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
739; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
740; SSSE3-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
741; SSSE3-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
742; SSSE3-NEXT:  Cost Model: Found an estimated cost of 256 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
743; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
744; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
745; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
746; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
747; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
748; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
749; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
750; SSSE3-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
751; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
752; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
753; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
754; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
755; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
756; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
757; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
758; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
759; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
760; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
761; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
762; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
763; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
764; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
765; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
766; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
767; SSSE3-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
768;
769; SSE42-LABEL: 'zext_vXi1'
770; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
771; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
772; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
773; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
774; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
775; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
776; SSE42-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
777; SSE42-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
778; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
779; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
780; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
781; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
782; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
783; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
784; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
785; SSE42-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
786; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
787; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
788; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
789; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
790; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
791; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
792; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
793; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
794; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
795; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
796; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
797; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
798; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
799; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
800; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
801; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
802; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
803;
804; AVX1-LABEL: 'zext_vXi1'
805; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
806; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
807; AVX1-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
808; AVX1-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
809; AVX1-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
810; AVX1-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
811; AVX1-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
812; AVX1-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
813; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
814; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
815; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
816; AVX1-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
817; AVX1-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
818; AVX1-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
819; AVX1-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
820; AVX1-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
821; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
822; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
823; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
824; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
825; AVX1-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
826; AVX1-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
827; AVX1-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
828; AVX1-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
829; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
830; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
831; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
832; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
833; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
834; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
835; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
836; AVX1-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
837; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
838;
839; AVX2-LABEL: 'zext_vXi1'
840; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
841; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
842; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
843; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
844; AVX2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
845; AVX2-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
846; AVX2-NEXT:  Cost Model: Found an estimated cost of 34 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
847; AVX2-NEXT:  Cost Model: Found an estimated cost of 68 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
848; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
849; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
850; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
851; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
852; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
853; AVX2-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
854; AVX2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
855; AVX2-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
856; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
857; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
858; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
859; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
860; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
861; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
862; AVX2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
863; AVX2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
864; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
865; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
866; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
867; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
868; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
869; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
870; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
871; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
872; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
873;
874; AVX512FVEC512-LABEL: 'zext_vXi1'
875; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
876; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
877; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
878; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
879; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
880; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
881; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
882; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
883; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
884; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
885; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
886; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
887; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
888; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
889; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
890; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
891; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
892; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
893; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
894; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
895; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
896; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
897; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
898; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
899; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
900; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
901; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
902; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
903; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
904; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
905; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
906; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
907; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
908;
909; AVX512FVEC256-LABEL: 'zext_vXi1'
910; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
911; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
912; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
913; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
914; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
915; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
916; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
917; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 88 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
918; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
919; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
920; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
921; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
922; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
923; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
924; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
925; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
926; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
927; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
928; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
929; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
930; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
931; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
932; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
933; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
934; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
935; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
936; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
937; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
938; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
939; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
940; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
941; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
942; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
943;
944; AVX512DQVEC512-LABEL: 'zext_vXi1'
945; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
946; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
947; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
948; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
949; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
950; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
951; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
952; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
953; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
954; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
955; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
956; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
957; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
958; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
959; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
960; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
961; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
962; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
963; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
964; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
965; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
966; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
967; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
968; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
969; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
970; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
971; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
972; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
973; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
974; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
975; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
976; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
977; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
978;
979; AVX512DQVEC256-LABEL: 'zext_vXi1'
980; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
981; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
982; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
983; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
984; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
985; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
986; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
987; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
988; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
989; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
990; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
991; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
992; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
993; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
994; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
995; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
996; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
997; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
998; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
999; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
1000; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
1001; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
1002; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
1003; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
1004; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
1005; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
1006; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
1007; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
1008; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
1009; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
1010; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
1011; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
1012; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1013;
1014; AVX512BWVEC512-LABEL: 'zext_vXi1'
1015; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
1016; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
1017; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
1018; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
1019; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
1020; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
1021; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
1022; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
1023; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
1024; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
1025; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
1026; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
1027; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
1028; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
1029; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
1030; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
1031; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
1032; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
1033; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
1034; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
1035; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
1036; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
1037; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
1038; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
1039; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
1040; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
1041; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
1042; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
1043; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
1044; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
1045; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
1046; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
1047; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1048;
1049; AVX512BWVEC256-LABEL: 'zext_vXi1'
1050; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
1051; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
1052; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
1053; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
1054; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
1055; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
1056; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 47 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
1057; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 94 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
1058; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
1059; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
1060; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
1061; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
1062; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
1063; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
1064; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
1065; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
1066; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
1067; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
1068; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
1069; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
1070; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
1071; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
1072; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
1073; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
1074; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
1075; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
1076; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
1077; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
1078; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
1079; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
1080; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
1081; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
1082; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1083;
1084; BTVER2-LABEL: 'zext_vXi1'
1085; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
1086; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
1087; BTVER2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
1088; BTVER2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
1089; BTVER2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
1090; BTVER2-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
1091; BTVER2-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
1092; BTVER2-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
1093; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
1094; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
1095; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
1096; BTVER2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
1097; BTVER2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
1098; BTVER2-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
1099; BTVER2-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
1100; BTVER2-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
1101; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
1102; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
1103; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
1104; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
1105; BTVER2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
1106; BTVER2-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
1107; BTVER2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
1108; BTVER2-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
1109; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
1110; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
1111; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
1112; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
1113; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
1114; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
1115; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
1116; BTVER2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
1117; BTVER2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1118;
1119  %I64 = zext i1 undef to i64
1120  %V2i64 = zext <2 x i1> undef to <2 x i64>
1121  %V4i64 = zext <4 x i1> undef to <4 x i64>
1122  %V8i64 = zext <8 x i1> undef to <8 x i64>
1123  %V16i64 = zext <16 x i1> undef to <16 x i64>
1124  %V32i64 = zext <32 x i1> undef to <32 x i64>
1125  %V64i64 = zext <64 x i1> undef to <64 x i64>
1126  %V128i64 = zext <128 x i1> undef to <128 x i64>
1127
1128  %I32 = zext i1 undef to i32
1129  %V2i32 = zext <2 x i1> undef to <2 x i32>
1130  %V4i32 = zext <4 x i1> undef to <4 x i32>
1131  %V8i32 = zext <8 x i1> undef to <8 x i32>
1132  %V16i32 = zext <16 x i1> undef to <16 x i32>
1133  %V32i32 = zext <32 x i1> undef to <32 x i32>
1134  %V64i32 = zext <64 x i1> undef to <64 x i32>
1135  %V128i32 = zext <128 x i1> undef to <128 x i32>
1136
1137  %I16 = zext i1 undef to i16
1138  %V2i16 = zext <2 x i1> undef to <2 x i16>
1139  %V4i16 = zext <4 x i1> undef to <4 x i16>
1140  %V8i16 = zext <8 x i1> undef to <8 x i16>
1141  %V16i16 = zext <16 x i1> undef to <16 x i16>
1142  %V32i16 = zext <32 x i1> undef to <32 x i16>
1143  %V64i16 = zext <64 x i1> undef to <64 x i16>
1144  %V128i16 = zext <128 x i1> undef to <128 x i16>
1145
1146  %I8 = zext i1 undef to i8
1147  %V2i8 = zext <2 x i1> undef to <2 x i8>
1148  %V4i8 = zext <4 x i1> undef to <4 x i8>
1149  %V8i8 = zext <8 x i1> undef to <8 x i8>
1150  %V16i8 = zext <16 x i1> undef to <16 x i8>
1151  %V32i8 = zext <32 x i1> undef to <32 x i8>
1152  %V64i8 = zext <64 x i1> undef to <64 x i8>
1153  %V128i8 = zext <128 x i1> undef to <128 x i8>
1154
1155  ret i32 undef
1156}
1157
1158define i32 @sext_vXi32() "min-legal-vector-width"="256" {
1159; SSE2-LABEL: 'sext_vXi32'
1160; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1161; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1162; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1163; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1164; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1165; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1166; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1167;
1168; SSSE3-LABEL: 'sext_vXi32'
1169; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1170; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1171; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1172; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1173; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1174; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1175; SSSE3-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1176;
1177; SSE42-LABEL: 'sext_vXi32'
1178; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1179; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1180; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1181; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1182; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1183; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1184; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1185;
1186; AVX1-LABEL: 'sext_vXi32'
1187; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1188; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1189; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1190; AVX1-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1191; AVX1-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1192; AVX1-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1193; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1194;
1195; AVX2-LABEL: 'sext_vXi32'
1196; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1197; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1198; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1199; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1200; AVX2-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1201; AVX2-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1202; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1203;
1204; AVX512FVEC512-LABEL: 'sext_vXi32'
1205; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1206; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1207; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1208; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1209; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1210; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1211; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1212;
1213; AVX512FVEC256-LABEL: 'sext_vXi32'
1214; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1215; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1216; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1217; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1218; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1219; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1220; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1221;
1222; AVX512DQVEC512-LABEL: 'sext_vXi32'
1223; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1224; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1225; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1226; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1227; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1228; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1229; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1230;
1231; AVX512DQVEC256-LABEL: 'sext_vXi32'
1232; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1233; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1234; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1235; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1236; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1237; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1238; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1239;
1240; AVX512BWVEC512-LABEL: 'sext_vXi32'
1241; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1242; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1243; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1244; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1245; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1246; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1247; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1248;
1249; AVX512BWVEC256-LABEL: 'sext_vXi32'
1250; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1251; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1252; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1253; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1254; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1255; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1256; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1257;
1258; BTVER2-LABEL: 'sext_vXi32'
1259; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i32 undef to i64
1260; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i32> undef to <2 x i64>
1261; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = sext <4 x i32> undef to <4 x i64>
1262; BTVER2-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V8i64 = sext <8 x i32> undef to <8 x i64>
1263; BTVER2-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V16i64 = sext <16 x i32> undef to <16 x i64>
1264; BTVER2-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V32i64 = sext <32 x i32> undef to <32 x i64>
1265; BTVER2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1266;
1267  %I64 = sext i32 undef to i64
1268  %V2i64 = sext <2 x i32> undef to <2 x i64>
1269  %V4i64 = sext <4 x i32> undef to <4 x i64>
1270  %V8i64 = sext <8 x i32> undef to <8 x i64>
1271  %V16i64 = sext <16 x i32> undef to <16 x i64>
1272  %V32i64 = sext <32 x i32> undef to <32 x i64>
1273
1274  ret i32 undef
1275}
1276
1277define i32 @sext_vXi16() "min-legal-vector-width"="256" {
1278; SSE2-LABEL: 'sext_vXi16'
1279; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1280; SSE2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1281; SSE2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1282; SSE2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1283; SSE2-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1284; SSE2-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1285; SSE2-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1286; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1287; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1288; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1289; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1290; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1291; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1292; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1293; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1294;
1295; SSSE3-LABEL: 'sext_vXi16'
1296; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1297; SSSE3-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1298; SSSE3-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1299; SSSE3-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1300; SSSE3-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1301; SSSE3-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1302; SSSE3-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1303; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1304; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1305; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1306; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1307; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1308; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1309; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1310; SSSE3-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1311;
1312; SSE42-LABEL: 'sext_vXi16'
1313; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1314; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1315; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1316; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1317; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1318; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1319; SSE42-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1320; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1321; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1322; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1323; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1324; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1325; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1326; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1327; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1328;
1329; AVX1-LABEL: 'sext_vXi16'
1330; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1331; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1332; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1333; AVX1-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1334; AVX1-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1335; AVX1-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1336; AVX1-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1337; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1338; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1339; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1340; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1341; AVX1-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1342; AVX1-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1343; AVX1-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1344; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1345;
1346; AVX2-LABEL: 'sext_vXi16'
1347; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1348; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1349; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1350; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1351; AVX2-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1352; AVX2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1353; AVX2-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1354; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1355; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1356; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1357; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1358; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1359; AVX2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1360; AVX2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1361; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1362;
1363; AVX512FVEC512-LABEL: 'sext_vXi16'
1364; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1365; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1366; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1367; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1368; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1369; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1370; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1371; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1372; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1373; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1374; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1375; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1376; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1377; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1378; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1379;
1380; AVX512FVEC256-LABEL: 'sext_vXi16'
1381; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1382; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1383; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1384; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1385; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1386; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1387; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1388; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1389; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1390; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1391; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1392; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1393; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1394; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1395; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1396;
1397; AVX512DQVEC512-LABEL: 'sext_vXi16'
1398; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1399; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1400; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1401; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1402; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1403; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1404; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1405; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1406; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1407; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1408; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1409; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1410; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1411; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1412; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1413;
1414; AVX512DQVEC256-LABEL: 'sext_vXi16'
1415; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1416; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1417; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1418; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1419; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1420; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1421; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1422; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1423; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1424; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1425; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1426; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1427; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1428; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1429; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1430;
1431; AVX512BWVEC512-LABEL: 'sext_vXi16'
1432; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1433; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1434; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1435; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1436; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1437; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1438; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1439; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1440; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1441; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1442; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1443; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1444; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1445; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1446; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1447;
1448; AVX512BWVEC256-LABEL: 'sext_vXi16'
1449; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1450; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1451; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1452; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1453; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1454; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1455; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1456; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1457; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1458; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1459; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1460; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1461; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1462; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1463; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1464;
1465; BTVER2-LABEL: 'sext_vXi16'
1466; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i16 undef to i64
1467; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i16> undef to <2 x i64>
1468; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = sext <4 x i16> undef to <4 x i64>
1469; BTVER2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = sext <8 x i16> undef to <8 x i64>
1470; BTVER2-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V16i64 = sext <16 x i16> undef to <16 x i64>
1471; BTVER2-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V32i64 = sext <32 x i16> undef to <32 x i64>
1472; BTVER2-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V64i64 = sext <64 x i16> undef to <64 x i64>
1473; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i16 undef to i32
1474; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i16> undef to <2 x i32>
1475; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i16> undef to <4 x i32>
1476; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i32 = sext <8 x i16> undef to <8 x i32>
1477; BTVER2-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V16i32 = sext <16 x i16> undef to <16 x i32>
1478; BTVER2-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V32i32 = sext <32 x i16> undef to <32 x i32>
1479; BTVER2-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V64i32 = sext <64 x i16> undef to <64 x i32>
1480; BTVER2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1481;
1482  %I64 = sext i16 undef to i64
1483  %V2i64 = sext <2 x i16> undef to <2 x i64>
1484  %V4i64 = sext <4 x i16> undef to <4 x i64>
1485  %V8i64 = sext <8 x i16> undef to <8 x i64>
1486  %V16i64 = sext <16 x i16> undef to <16 x i64>
1487  %V32i64 = sext <32 x i16> undef to <32 x i64>
1488  %V64i64 = sext <64 x i16> undef to <64 x i64>
1489
1490  %I32 = sext i16 undef to i32
1491  %V2i32 = sext <2 x i16> undef to <2 x i32>
1492  %V4i32 = sext <4 x i16> undef to <4 x i32>
1493  %V8i32 = sext <8 x i16> undef to <8 x i32>
1494  %V16i32 = sext <16 x i16> undef to <16 x i32>
1495  %V32i32 = sext <32 x i16> undef to <32 x i32>
1496  %V64i32 = sext <64 x i16> undef to <64 x i32>
1497
1498  ret i32 undef
1499}
1500
1501define i32 @sext_vXi8() "min-legal-vector-width"="256" {
1502; SSE2-LABEL: 'sext_vXi8'
1503; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1504; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1505; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1506; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1507; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1508; SSE2-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1509; SSE2-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1510; SSE2-NEXT:  Cost Model: Found an estimated cost of 256 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1511; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1512; SSE2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1513; SSE2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1514; SSE2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1515; SSE2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1516; SSE2-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1517; SSE2-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1518; SSE2-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1519; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1520; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1521; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1522; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1523; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1524; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1525; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1526; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1527; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1528;
1529; SSSE3-LABEL: 'sext_vXi8'
1530; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1531; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1532; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1533; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1534; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1535; SSSE3-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1536; SSSE3-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1537; SSSE3-NEXT:  Cost Model: Found an estimated cost of 256 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1538; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1539; SSSE3-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1540; SSSE3-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1541; SSSE3-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1542; SSSE3-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1543; SSSE3-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1544; SSSE3-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1545; SSSE3-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1546; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1547; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1548; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1549; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1550; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1551; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1552; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1553; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1554; SSSE3-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1555;
1556; SSE42-LABEL: 'sext_vXi8'
1557; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1558; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1559; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1560; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1561; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1562; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1563; SSE42-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1564; SSE42-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1565; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1566; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1567; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1568; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1569; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1570; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1571; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1572; SSE42-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1573; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1574; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1575; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1576; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1577; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1578; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1579; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1580; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1581; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1582;
1583; AVX1-LABEL: 'sext_vXi8'
1584; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1585; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1586; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1587; AVX1-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1588; AVX1-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1589; AVX1-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1590; AVX1-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1591; AVX1-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1592; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1593; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1594; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1595; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1596; AVX1-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1597; AVX1-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1598; AVX1-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1599; AVX1-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1600; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1601; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1602; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1603; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1604; AVX1-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1605; AVX1-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1606; AVX1-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1607; AVX1-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1608; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1609;
1610; AVX2-LABEL: 'sext_vXi8'
1611; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1612; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1613; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1614; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1615; AVX2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1616; AVX2-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1617; AVX2-NEXT:  Cost Model: Found an estimated cost of 34 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1618; AVX2-NEXT:  Cost Model: Found an estimated cost of 68 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1619; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1620; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1621; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1622; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1623; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1624; AVX2-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1625; AVX2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1626; AVX2-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1627; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1628; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1629; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1630; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1631; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1632; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1633; AVX2-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1634; AVX2-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1635; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1636;
1637; AVX512FVEC512-LABEL: 'sext_vXi8'
1638; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1639; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1640; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1641; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1642; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1643; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1644; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1645; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1646; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1647; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1648; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1649; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1650; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1651; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1652; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1653; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1654; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1655; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1656; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1657; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1658; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1659; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1660; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1661; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1662; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1663;
1664; AVX512FVEC256-LABEL: 'sext_vXi8'
1665; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1666; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1667; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1668; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1669; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1670; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1671; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1672; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1673; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1674; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1675; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1676; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1677; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1678; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1679; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1680; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1681; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1682; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1683; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1684; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1685; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1686; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1687; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1688; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1689; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1690;
1691; AVX512DQVEC512-LABEL: 'sext_vXi8'
1692; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1693; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1694; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1695; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1696; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1697; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1698; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1699; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1700; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1701; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1702; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1703; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1704; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1705; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1706; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1707; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1708; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1709; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1710; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1711; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1712; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1713; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1714; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1715; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1716; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1717;
1718; AVX512DQVEC256-LABEL: 'sext_vXi8'
1719; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1720; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1721; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1722; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1723; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1724; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1725; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1726; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1727; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1728; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1729; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1730; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1731; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1732; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1733; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1734; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1735; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1736; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1737; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1738; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1739; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1740; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1741; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1742; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1743; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1744;
1745; AVX512BWVEC512-LABEL: 'sext_vXi8'
1746; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1747; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1748; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1749; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1750; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1751; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1752; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1753; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1754; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1755; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1756; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1757; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1758; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1759; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1760; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1761; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1762; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1763; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1764; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1765; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1766; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1767; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1768; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1769; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1770; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1771;
1772; AVX512BWVEC256-LABEL: 'sext_vXi8'
1773; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1774; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1775; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1776; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1777; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1778; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1779; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1780; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1781; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1782; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1783; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1784; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1785; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1786; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1787; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1788; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1789; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1790; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1791; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1792; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1793; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1794; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1795; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1796; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1797; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1798;
1799; BTVER2-LABEL: 'sext_vXi8'
1800; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
1801; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
1802; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
1803; BTVER2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
1804; BTVER2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
1805; BTVER2-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
1806; BTVER2-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
1807; BTVER2-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
1808; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
1809; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
1810; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
1811; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
1812; BTVER2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
1813; BTVER2-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
1814; BTVER2-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
1815; BTVER2-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
1816; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
1817; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
1818; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
1819; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
1820; BTVER2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
1821; BTVER2-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
1822; BTVER2-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
1823; BTVER2-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
1824; BTVER2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1825;
1826  %I64 = sext i8 undef to i64
1827  %V2i64 = sext <2 x i8> undef to <2 x i64>
1828  %V4i64 = sext <4 x i8> undef to <4 x i64>
1829  %V8i64 = sext <8 x i8> undef to <8 x i64>
1830  %V16i64 = sext <16 x i8> undef to <16 x i64>
1831  %V32i64 = sext <32 x i8> undef to <32 x i64>
1832  %V64i64 = sext <64 x i8> undef to <64 x i64>
1833  %V128i64 = sext <128 x i8> undef to <128 x i64>
1834
1835  %I32 = sext i8 undef to i32
1836  %V2i32 = sext <2 x i8> undef to <2 x i32>
1837  %V4i32 = sext <4 x i8> undef to <4 x i32>
1838  %V8i32 = sext <8 x i8> undef to <8 x i32>
1839  %V16i32 = sext <16 x i8> undef to <16 x i32>
1840  %V32i32 = sext <32 x i8> undef to <32 x i32>
1841  %V64i32 = sext <64 x i8> undef to <64 x i32>
1842  %V128i32 = sext <128 x i8> undef to <128 x i32>
1843
1844  %I16 = sext i8 undef to i16
1845  %V2i16 = sext <2 x i8> undef to <2 x i16>
1846  %V4i16 = sext <4 x i8> undef to <4 x i16>
1847  %V8i16 = sext <8 x i8> undef to <8 x i16>
1848  %V16i16 = sext <16 x i8> undef to <16 x i16>
1849  %V32i16 = sext <32 x i8> undef to <32 x i16>
1850  %V64i16 = sext <64 x i8> undef to <64 x i16>
1851  %V128i16 = sext <128 x i8> undef to <128 x i16>
1852
1853  ret i32 undef
1854}
1855
1856define i32 @sext_vXi1() "min-legal-vector-width"="256" {
1857; SSE2-LABEL: 'sext_vXi1'
1858; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
1859; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
1860; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
1861; SSE2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
1862; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
1863; SSE2-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
1864; SSE2-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
1865; SSE2-NEXT:  Cost Model: Found an estimated cost of 256 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
1866; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
1867; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
1868; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
1869; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
1870; SSE2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
1871; SSE2-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
1872; SSE2-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
1873; SSE2-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
1874; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
1875; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
1876; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
1877; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
1878; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
1879; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
1880; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
1881; SSE2-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
1882; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
1883; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
1884; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
1885; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
1886; SSE2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
1887; SSE2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
1888; SSE2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
1889; SSE2-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
1890; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1891;
1892; SSSE3-LABEL: 'sext_vXi1'
1893; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
1894; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
1895; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
1896; SSSE3-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
1897; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
1898; SSSE3-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
1899; SSSE3-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
1900; SSSE3-NEXT:  Cost Model: Found an estimated cost of 256 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
1901; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
1902; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
1903; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
1904; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
1905; SSSE3-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
1906; SSSE3-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
1907; SSSE3-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
1908; SSSE3-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
1909; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
1910; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
1911; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
1912; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
1913; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
1914; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
1915; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
1916; SSSE3-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
1917; SSSE3-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
1918; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
1919; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
1920; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
1921; SSSE3-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
1922; SSSE3-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
1923; SSSE3-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
1924; SSSE3-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
1925; SSSE3-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1926;
1927; SSE42-LABEL: 'sext_vXi1'
1928; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
1929; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
1930; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
1931; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
1932; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
1933; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
1934; SSE42-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
1935; SSE42-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
1936; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
1937; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
1938; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
1939; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
1940; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
1941; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
1942; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
1943; SSE42-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
1944; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
1945; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
1946; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
1947; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
1948; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
1949; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
1950; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
1951; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
1952; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
1953; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
1954; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
1955; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
1956; SSE42-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
1957; SSE42-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
1958; SSE42-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
1959; SSE42-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
1960; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1961;
1962; AVX1-LABEL: 'sext_vXi1'
1963; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
1964; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
1965; AVX1-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
1966; AVX1-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
1967; AVX1-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
1968; AVX1-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
1969; AVX1-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
1970; AVX1-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
1971; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
1972; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
1973; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
1974; AVX1-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
1975; AVX1-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
1976; AVX1-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
1977; AVX1-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
1978; AVX1-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
1979; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
1980; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
1981; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
1982; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
1983; AVX1-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
1984; AVX1-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
1985; AVX1-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
1986; AVX1-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
1987; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
1988; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
1989; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
1990; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
1991; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
1992; AVX1-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
1993; AVX1-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
1994; AVX1-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
1995; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1996;
1997; AVX2-LABEL: 'sext_vXi1'
1998; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
1999; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
2000; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
2001; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
2002; AVX2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
2003; AVX2-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
2004; AVX2-NEXT:  Cost Model: Found an estimated cost of 34 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
2005; AVX2-NEXT:  Cost Model: Found an estimated cost of 68 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
2006; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
2007; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
2008; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
2009; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
2010; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
2011; AVX2-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
2012; AVX2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
2013; AVX2-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
2014; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
2015; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
2016; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
2017; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
2018; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
2019; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
2020; AVX2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
2021; AVX2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
2022; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
2023; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
2024; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
2025; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
2026; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
2027; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
2028; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
2029; AVX2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
2030; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
2031;
2032; AVX512FVEC512-LABEL: 'sext_vXi1'
2033; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
2034; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
2035; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
2036; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
2037; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
2038; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
2039; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
2040; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
2041; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
2042; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
2043; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
2044; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
2045; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
2046; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
2047; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
2048; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
2049; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
2050; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
2051; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
2052; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
2053; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
2054; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
2055; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
2056; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
2057; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
2058; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
2059; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
2060; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
2061; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
2062; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
2063; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
2064; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
2065; AVX512FVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
2066;
2067; AVX512FVEC256-LABEL: 'sext_vXi1'
2068; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
2069; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
2070; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
2071; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
2072; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
2073; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
2074; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
2075; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
2076; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
2077; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
2078; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
2079; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
2080; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
2081; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
2082; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
2083; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
2084; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
2085; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
2086; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
2087; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
2088; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
2089; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
2090; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
2091; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 80 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
2092; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
2093; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
2094; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
2095; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
2096; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
2097; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 21 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
2098; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
2099; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 84 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
2100; AVX512FVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
2101;
2102; AVX512DQVEC512-LABEL: 'sext_vXi1'
2103; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
2104; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
2105; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
2106; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
2107; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
2108; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
2109; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
2110; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
2111; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
2112; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
2113; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
2114; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
2115; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
2116; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
2117; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
2118; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
2119; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
2120; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
2121; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
2122; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
2123; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
2124; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
2125; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
2126; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
2127; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
2128; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
2129; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
2130; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
2131; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
2132; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
2133; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
2134; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
2135; AVX512DQVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
2136;
2137; AVX512DQVEC256-LABEL: 'sext_vXi1'
2138; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
2139; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
2140; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
2141; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
2142; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
2143; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
2144; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
2145; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
2146; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
2147; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
2148; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
2149; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
2150; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
2151; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
2152; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
2153; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
2154; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
2155; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
2156; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
2157; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
2158; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
2159; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
2160; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
2161; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 80 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
2162; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
2163; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
2164; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
2165; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
2166; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
2167; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 21 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
2168; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
2169; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 84 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
2170; AVX512DQVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
2171;
2172; AVX512BWVEC512-LABEL: 'sext_vXi1'
2173; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
2174; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
2175; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
2176; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
2177; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
2178; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
2179; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
2180; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
2181; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
2182; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
2183; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
2184; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
2185; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
2186; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
2187; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
2188; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
2189; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
2190; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
2191; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
2192; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
2193; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
2194; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
2195; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
2196; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
2197; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
2198; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
2199; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
2200; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
2201; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
2202; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
2203; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
2204; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
2205; AVX512BWVEC512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
2206;
2207; AVX512BWVEC256-LABEL: 'sext_vXi1'
2208; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
2209; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
2210; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
2211; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
2212; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
2213; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
2214; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
2215; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 62 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
2216; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
2217; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
2218; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
2219; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
2220; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
2221; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
2222; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
2223; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
2224; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
2225; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
2226; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
2227; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
2228; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
2229; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
2230; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
2231; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
2232; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
2233; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
2234; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
2235; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
2236; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
2237; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
2238; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
2239; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
2240; AVX512BWVEC256-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
2241;
2242; BTVER2-LABEL: 'sext_vXi1'
2243; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
2244; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
2245; BTVER2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
2246; BTVER2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
2247; BTVER2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
2248; BTVER2-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
2249; BTVER2-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
2250; BTVER2-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
2251; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
2252; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
2253; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
2254; BTVER2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
2255; BTVER2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
2256; BTVER2-NEXT:  Cost Model: Found an estimated cost of 13 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
2257; BTVER2-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
2258; BTVER2-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
2259; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
2260; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
2261; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
2262; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
2263; BTVER2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
2264; BTVER2-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
2265; BTVER2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
2266; BTVER2-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
2267; BTVER2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
2268; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
2269; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
2270; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
2271; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
2272; BTVER2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
2273; BTVER2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
2274; BTVER2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
2275; BTVER2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
2276;
2277  %I64 = sext i1 undef to i64
2278  %V2i64 = sext <2 x i1> undef to <2 x i64>
2279  %V4i64 = sext <4 x i1> undef to <4 x i64>
2280  %V8i64 = sext <8 x i1> undef to <8 x i64>
2281  %V16i64 = sext <16 x i1> undef to <16 x i64>
2282  %V32i64 = sext <32 x i1> undef to <32 x i64>
2283  %V64i64 = sext <64 x i1> undef to <64 x i64>
2284  %V128i64 = sext <128 x i1> undef to <128 x i64>
2285
2286  %I32 = sext i1 undef to i32
2287  %V2i32 = sext <2 x i1> undef to <2 x i32>
2288  %V4i32 = sext <4 x i1> undef to <4 x i32>
2289  %V8i32 = sext <8 x i1> undef to <8 x i32>
2290  %V16i32 = sext <16 x i1> undef to <16 x i32>
2291  %V32i32 = sext <32 x i1> undef to <32 x i32>
2292  %V64i32 = sext <64 x i1> undef to <64 x i32>
2293  %V128i32 = sext <128 x i1> undef to <128 x i32>
2294
2295  %I16 = sext i1 undef to i16
2296  %V2i16 = sext <2 x i1> undef to <2 x i16>
2297  %V4i16 = sext <4 x i1> undef to <4 x i16>
2298  %V8i16 = sext <8 x i1> undef to <8 x i16>
2299  %V16i16 = sext <16 x i1> undef to <16 x i16>
2300  %V32i16 = sext <32 x i1> undef to <32 x i16>
2301  %V64i16 = sext <64 x i1> undef to <64 x i16>
2302  %V128i16 = sext <128 x i1> undef to <128 x i16>
2303
2304  %I8 = sext i1 undef to i8
2305  %V2i8 = sext <2 x i1> undef to <2 x i8>
2306  %V4i8 = sext <4 x i1> undef to <4 x i8>
2307  %V8i8 = sext <8 x i1> undef to <8 x i8>
2308  %V16i8 = sext <16 x i1> undef to <16 x i8>
2309  %V32i8 = sext <32 x i1> undef to <32 x i8>
2310  %V64i8 = sext <64 x i1> undef to <64 x i8>
2311  %V128i8 = sext <128 x i1> undef to <128 x i8>
2312
2313  ret i32 undef
2314}
2315