xref: /llvm-project/llvm/test/Analysis/CostModel/ARM/reduce-bit.ll (revision 233fb987fcf6a5dc2d12b07cb8e30fffd5471871) 
1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2; RUN: opt < %s -mtriple=armv8a-linux-gnueabihf -mattr=+fp64 -passes="print<cost-model>" 2>&1 -disable-output | FileCheck %s --check-prefix=CHECK-V8
3; RUN: opt < %s -mtriple=thumbv8.1m.main-none-eabi -mattr=+mve -passes="print<cost-model>" 2>&1 -disable-output | FileCheck %s --check-prefix=CHECK-MVEI
4
5define void @and() {
6; CHECK-V8-LABEL: 'and'
7; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v1i64 = call i64 @llvm.vector.reduce.and.v1i64(<1 x i64> undef)
8; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i64 = call i64 @llvm.vector.reduce.and.v2i64(<2 x i64> undef)
9; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4i64 = call i64 @llvm.vector.reduce.and.v4i64(<4 x i64> undef)
10; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i32 = call i32 @llvm.vector.reduce.and.v2i32(<2 x i32> undef)
11; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> undef)
12; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v8i32 = call i32 @llvm.vector.reduce.and.v8i32(<8 x i32> undef)
13; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i16 = call i16 @llvm.vector.reduce.and.v2i16(<2 x i16> undef)
14; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i16 = call i16 @llvm.vector.reduce.and.v4i16(<4 x i16> undef)
15; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v8i16 = call i16 @llvm.vector.reduce.and.v8i16(<8 x i16> undef)
16; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %v16i16 = call i16 @llvm.vector.reduce.and.v16i16(<16 x i16> undef)
17; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i8 = call i8 @llvm.vector.reduce.and.v2i8(<2 x i8> undef)
18; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i8 = call i8 @llvm.vector.reduce.and.v4i8(<4 x i8> undef)
19; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v8i8 = call i8 @llvm.vector.reduce.and.v8i8(<8 x i8> undef)
20; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v16i8 = call i8 @llvm.vector.reduce.and.v16i8(<16 x i8> undef)
21; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %v32i8 = call i8 @llvm.vector.reduce.and.v32i8(<32 x i8> undef)
22; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
23;
24; CHECK-MVEI-LABEL: 'and'
25; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v1i64 = call i64 @llvm.vector.reduce.and.v1i64(<1 x i64> undef)
26; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = call i64 @llvm.vector.reduce.and.v2i64(<2 x i64> undef)
27; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v4i64 = call i64 @llvm.vector.reduce.and.v4i64(<4 x i64> undef)
28; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i32 = call i32 @llvm.vector.reduce.and.v2i32(<2 x i32> undef)
29; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i32 = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> undef)
30; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %v8i32 = call i32 @llvm.vector.reduce.and.v8i32(<8 x i32> undef)
31; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i16 = call i16 @llvm.vector.reduce.and.v2i16(<2 x i16> undef)
32; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i16 = call i16 @llvm.vector.reduce.and.v4i16(<4 x i16> undef)
33; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v8i16 = call i16 @llvm.vector.reduce.and.v8i16(<8 x i16> undef)
34; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %v16i16 = call i16 @llvm.vector.reduce.and.v16i16(<16 x i16> undef)
35; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i8 = call i8 @llvm.vector.reduce.and.v2i8(<2 x i8> undef)
36; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i8 = call i8 @llvm.vector.reduce.and.v4i8(<4 x i8> undef)
37; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v8i8 = call i8 @llvm.vector.reduce.and.v8i8(<8 x i8> undef)
38; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %v16i8 = call i8 @llvm.vector.reduce.and.v16i8(<16 x i8> undef)
39; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 33 for instruction: %v32i8 = call i8 @llvm.vector.reduce.and.v32i8(<32 x i8> undef)
40; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
41;
42entry:
43  %v1i64 = call i64 @llvm.vector.reduce.and.v1i64(<1 x i64> undef)
44  %v2i64 = call i64 @llvm.vector.reduce.and.v2i64(<2 x i64> undef)
45  %v4i64 = call i64 @llvm.vector.reduce.and.v4i64(<4 x i64> undef)
46  %v2i32 = call i32 @llvm.vector.reduce.and.v2i32(<2 x i32> undef)
47  %v4i32 = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> undef)
48  %v8i32 = call i32 @llvm.vector.reduce.and.v8i32(<8 x i32> undef)
49  %v2i16 = call i16 @llvm.vector.reduce.and.v2i16(<2 x i16> undef)
50  %v4i16 = call i16 @llvm.vector.reduce.and.v4i16(<4 x i16> undef)
51  %v8i16 = call i16 @llvm.vector.reduce.and.v8i16(<8 x i16> undef)
52  %v16i16 = call i16 @llvm.vector.reduce.and.v16i16(<16 x i16> undef)
53  %v2i8 = call i8 @llvm.vector.reduce.and.v2i8(<2 x i8> undef)
54  %v4i8 = call i8 @llvm.vector.reduce.and.v4i8(<4 x i8> undef)
55  %v8i8 = call i8 @llvm.vector.reduce.and.v8i8(<8 x i8> undef)
56  %v16i8 = call i8 @llvm.vector.reduce.and.v16i8(<16 x i8> undef)
57  %v32i8 = call i8 @llvm.vector.reduce.and.v32i8(<32 x i8> undef)
58  ret void
59}
60
61define void @or() {
62; CHECK-V8-LABEL: 'or'
63; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v1i64 = call i64 @llvm.vector.reduce.or.v1i64(<1 x i64> undef)
64; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i64 = call i64 @llvm.vector.reduce.or.v2i64(<2 x i64> undef)
65; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4i64 = call i64 @llvm.vector.reduce.or.v4i64(<4 x i64> undef)
66; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i32 = call i32 @llvm.vector.reduce.or.v2i32(<2 x i32> undef)
67; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> undef)
68; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v8i32 = call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> undef)
69; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i16 = call i16 @llvm.vector.reduce.or.v2i16(<2 x i16> undef)
70; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i16 = call i16 @llvm.vector.reduce.or.v4i16(<4 x i16> undef)
71; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v8i16 = call i16 @llvm.vector.reduce.or.v8i16(<8 x i16> undef)
72; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %v16i16 = call i16 @llvm.vector.reduce.or.v16i16(<16 x i16> undef)
73; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i8 = call i8 @llvm.vector.reduce.or.v2i8(<2 x i8> undef)
74; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i8 = call i8 @llvm.vector.reduce.or.v4i8(<4 x i8> undef)
75; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v8i8 = call i8 @llvm.vector.reduce.or.v8i8(<8 x i8> undef)
76; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v16i8 = call i8 @llvm.vector.reduce.or.v16i8(<16 x i8> undef)
77; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %v32i8 = call i8 @llvm.vector.reduce.or.v32i8(<32 x i8> undef)
78; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
79;
80; CHECK-MVEI-LABEL: 'or'
81; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v1i64 = call i64 @llvm.vector.reduce.or.v1i64(<1 x i64> undef)
82; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = call i64 @llvm.vector.reduce.or.v2i64(<2 x i64> undef)
83; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v4i64 = call i64 @llvm.vector.reduce.or.v4i64(<4 x i64> undef)
84; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i32 = call i32 @llvm.vector.reduce.or.v2i32(<2 x i32> undef)
85; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i32 = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> undef)
86; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %v8i32 = call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> undef)
87; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i16 = call i16 @llvm.vector.reduce.or.v2i16(<2 x i16> undef)
88; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i16 = call i16 @llvm.vector.reduce.or.v4i16(<4 x i16> undef)
89; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v8i16 = call i16 @llvm.vector.reduce.or.v8i16(<8 x i16> undef)
90; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %v16i16 = call i16 @llvm.vector.reduce.or.v16i16(<16 x i16> undef)
91; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i8 = call i8 @llvm.vector.reduce.or.v2i8(<2 x i8> undef)
92; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i8 = call i8 @llvm.vector.reduce.or.v4i8(<4 x i8> undef)
93; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v8i8 = call i8 @llvm.vector.reduce.or.v8i8(<8 x i8> undef)
94; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %v16i8 = call i8 @llvm.vector.reduce.or.v16i8(<16 x i8> undef)
95; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 33 for instruction: %v32i8 = call i8 @llvm.vector.reduce.or.v32i8(<32 x i8> undef)
96; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
97;
98entry:
99  %v1i64 = call i64 @llvm.vector.reduce.or.v1i64(<1 x i64> undef)
100  %v2i64 = call i64 @llvm.vector.reduce.or.v2i64(<2 x i64> undef)
101  %v4i64 = call i64 @llvm.vector.reduce.or.v4i64(<4 x i64> undef)
102  %v2i32 = call i32 @llvm.vector.reduce.or.v2i32(<2 x i32> undef)
103  %v4i32 = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> undef)
104  %v8i32 = call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> undef)
105  %v2i16 = call i16 @llvm.vector.reduce.or.v2i16(<2 x i16> undef)
106  %v4i16 = call i16 @llvm.vector.reduce.or.v4i16(<4 x i16> undef)
107  %v8i16 = call i16 @llvm.vector.reduce.or.v8i16(<8 x i16> undef)
108  %v16i16 = call i16 @llvm.vector.reduce.or.v16i16(<16 x i16> undef)
109  %v2i8 = call i8 @llvm.vector.reduce.or.v2i8(<2 x i8> undef)
110  %v4i8 = call i8 @llvm.vector.reduce.or.v4i8(<4 x i8> undef)
111  %v8i8 = call i8 @llvm.vector.reduce.or.v8i8(<8 x i8> undef)
112  %v16i8 = call i8 @llvm.vector.reduce.or.v16i8(<16 x i8> undef)
113  %v32i8 = call i8 @llvm.vector.reduce.or.v32i8(<32 x i8> undef)
114  ret void
115}
116
117define void @xor() {
118; CHECK-V8-LABEL: 'xor'
119; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v1i64 = call i64 @llvm.vector.reduce.xor.v1i64(<1 x i64> undef)
120; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i64 = call i64 @llvm.vector.reduce.xor.v2i64(<2 x i64> undef)
121; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v4i64 = call i64 @llvm.vector.reduce.xor.v4i64(<4 x i64> undef)
122; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i32 = call i32 @llvm.vector.reduce.xor.v2i32(<2 x i32> undef)
123; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> undef)
124; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %v8i32 = call i32 @llvm.vector.reduce.xor.v8i32(<8 x i32> undef)
125; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i16 = call i16 @llvm.vector.reduce.xor.v2i16(<2 x i16> undef)
126; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i16 = call i16 @llvm.vector.reduce.xor.v4i16(<4 x i16> undef)
127; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v8i16 = call i16 @llvm.vector.reduce.xor.v8i16(<8 x i16> undef)
128; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %v16i16 = call i16 @llvm.vector.reduce.xor.v16i16(<16 x i16> undef)
129; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i8 = call i8 @llvm.vector.reduce.xor.v2i8(<2 x i8> undef)
130; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i8 = call i8 @llvm.vector.reduce.xor.v4i8(<4 x i8> undef)
131; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v8i8 = call i8 @llvm.vector.reduce.xor.v8i8(<8 x i8> undef)
132; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v16i8 = call i8 @llvm.vector.reduce.xor.v16i8(<16 x i8> undef)
133; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %v32i8 = call i8 @llvm.vector.reduce.xor.v32i8(<32 x i8> undef)
134; CHECK-V8-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
135;
136; CHECK-MVEI-LABEL: 'xor'
137; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v1i64 = call i64 @llvm.vector.reduce.xor.v1i64(<1 x i64> undef)
138; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = call i64 @llvm.vector.reduce.xor.v2i64(<2 x i64> undef)
139; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v4i64 = call i64 @llvm.vector.reduce.xor.v4i64(<4 x i64> undef)
140; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i32 = call i32 @llvm.vector.reduce.xor.v2i32(<2 x i32> undef)
141; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i32 = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> undef)
142; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %v8i32 = call i32 @llvm.vector.reduce.xor.v8i32(<8 x i32> undef)
143; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i16 = call i16 @llvm.vector.reduce.xor.v2i16(<2 x i16> undef)
144; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i16 = call i16 @llvm.vector.reduce.xor.v4i16(<4 x i16> undef)
145; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v8i16 = call i16 @llvm.vector.reduce.xor.v8i16(<8 x i16> undef)
146; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %v16i16 = call i16 @llvm.vector.reduce.xor.v16i16(<16 x i16> undef)
147; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v2i8 = call i8 @llvm.vector.reduce.xor.v2i8(<2 x i8> undef)
148; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %v4i8 = call i8 @llvm.vector.reduce.xor.v4i8(<4 x i8> undef)
149; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %v8i8 = call i8 @llvm.vector.reduce.xor.v8i8(<8 x i8> undef)
150; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %v16i8 = call i8 @llvm.vector.reduce.xor.v16i8(<16 x i8> undef)
151; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 33 for instruction: %v32i8 = call i8 @llvm.vector.reduce.xor.v32i8(<32 x i8> undef)
152; CHECK-MVEI-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
153;
154entry:
155  %v1i64 = call i64 @llvm.vector.reduce.xor.v1i64(<1 x i64> undef)
156  %v2i64 = call i64 @llvm.vector.reduce.xor.v2i64(<2 x i64> undef)
157  %v4i64 = call i64 @llvm.vector.reduce.xor.v4i64(<4 x i64> undef)
158  %v2i32 = call i32 @llvm.vector.reduce.xor.v2i32(<2 x i32> undef)
159  %v4i32 = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> undef)
160  %v8i32 = call i32 @llvm.vector.reduce.xor.v8i32(<8 x i32> undef)
161  %v2i16 = call i16 @llvm.vector.reduce.xor.v2i16(<2 x i16> undef)
162  %v4i16 = call i16 @llvm.vector.reduce.xor.v4i16(<4 x i16> undef)
163  %v8i16 = call i16 @llvm.vector.reduce.xor.v8i16(<8 x i16> undef)
164  %v16i16 = call i16 @llvm.vector.reduce.xor.v16i16(<16 x i16> undef)
165  %v2i8 = call i8 @llvm.vector.reduce.xor.v2i8(<2 x i8> undef)
166  %v4i8 = call i8 @llvm.vector.reduce.xor.v4i8(<4 x i8> undef)
167  %v8i8 = call i8 @llvm.vector.reduce.xor.v8i8(<8 x i8> undef)
168  %v16i8 = call i8 @llvm.vector.reduce.xor.v16i8(<16 x i8> undef)
169  %v32i8 = call i8 @llvm.vector.reduce.xor.v32i8(<32 x i8> undef)
170  ret void
171}
172
173declare i16 @llvm.vector.reduce.and.v16i16(<16 x i16>)
174declare i16 @llvm.vector.reduce.and.v2i16(<2 x i16>)
175declare i16 @llvm.vector.reduce.and.v4i16(<4 x i16>)
176declare i16 @llvm.vector.reduce.and.v8i16(<8 x i16>)
177declare i16 @llvm.vector.reduce.or.v16i16(<16 x i16>)
178declare i16 @llvm.vector.reduce.or.v2i16(<2 x i16>)
179declare i16 @llvm.vector.reduce.or.v4i16(<4 x i16>)
180declare i16 @llvm.vector.reduce.or.v8i16(<8 x i16>)
181declare i16 @llvm.vector.reduce.xor.v16i16(<16 x i16>)
182declare i16 @llvm.vector.reduce.xor.v2i16(<2 x i16>)
183declare i16 @llvm.vector.reduce.xor.v4i16(<4 x i16>)
184declare i16 @llvm.vector.reduce.xor.v8i16(<8 x i16>)
185declare i32 @llvm.vector.reduce.and.v2i32(<2 x i32>)
186declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32>)
187declare i32 @llvm.vector.reduce.and.v8i32(<8 x i32>)
188declare i32 @llvm.vector.reduce.or.v2i32(<2 x i32>)
189declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>)
190declare i32 @llvm.vector.reduce.or.v8i32(<8 x i32>)
191declare i32 @llvm.vector.reduce.xor.v2i32(<2 x i32>)
192declare i32 @llvm.vector.reduce.xor.v4i32(<4 x i32>)
193declare i32 @llvm.vector.reduce.xor.v8i32(<8 x i32>)
194declare i64 @llvm.vector.reduce.and.v1i64(<1 x i64>)
195declare i64 @llvm.vector.reduce.and.v2i64(<2 x i64>)
196declare i64 @llvm.vector.reduce.and.v4i64(<4 x i64>)
197declare i64 @llvm.vector.reduce.or.v1i64(<1 x i64>)
198declare i64 @llvm.vector.reduce.or.v2i64(<2 x i64>)
199declare i64 @llvm.vector.reduce.or.v4i64(<4 x i64>)
200declare i64 @llvm.vector.reduce.xor.v1i64(<1 x i64>)
201declare i64 @llvm.vector.reduce.xor.v2i64(<2 x i64>)
202declare i64 @llvm.vector.reduce.xor.v4i64(<4 x i64>)
203declare i8 @llvm.vector.reduce.and.v16i8(<16 x i8>)
204declare i8 @llvm.vector.reduce.and.v32i8(<32 x i8>)
205declare i8 @llvm.vector.reduce.and.v8i8(<8 x i8>)
206declare i8 @llvm.vector.reduce.and.v4i8(<4 x i8>)
207declare i8 @llvm.vector.reduce.and.v2i8(<2 x i8>)
208declare i8 @llvm.vector.reduce.or.v16i8(<16 x i8>)
209declare i8 @llvm.vector.reduce.or.v32i8(<32 x i8>)
210declare i8 @llvm.vector.reduce.or.v8i8(<8 x i8>)
211declare i8 @llvm.vector.reduce.or.v4i8(<4 x i8>)
212declare i8 @llvm.vector.reduce.or.v2i8(<2 x i8>)
213declare i8 @llvm.vector.reduce.xor.v16i8(<16 x i8>)
214declare i8 @llvm.vector.reduce.xor.v32i8(<32 x i8>)
215declare i8 @llvm.vector.reduce.xor.v8i8(<8 x i8>)
216declare i8 @llvm.vector.reduce.xor.v4i8(<4 x i8>)
217declare i8 @llvm.vector.reduce.xor.v2i8(<2 x i8>)
218