xref: /llvm-project/llvm/test/Analysis/CostModel/ARM/mve-active_lane_mask.ll (revision 4178e33470763b406f614b646c8b01d24309e20b) 
1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2; RUN: opt < %s -S -mtriple=thumbv8.1m.main-none-eabi -mattr=+mve.fp -passes="print<cost-model>" 2>&1 -disable-output | FileCheck %s
3
4target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
5
6; Note that these instructions like this (not in a look that could be tail
7; predicated) should not really be free. We currently assume that all active
8; lane masks are free.
9
10define void @v4i32(i32 %index, i32 %TC) {
11; CHECK-LABEL: 'v4i32'
12; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %TC)
13; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
14;
15  %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %TC)
16  ret void
17}
18
19define void @v8i16(i32 %index, i32 %TC) {
20; CHECK-LABEL: 'v8i16'
21; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %active.lane.mask = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %TC)
22; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
23;
24  %active.lane.mask = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %TC)
25  ret void
26}
27
28define void @v16i8(i32 %index, i32 %TC) {
29; CHECK-LABEL: 'v16i8'
30; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %active.lane.mask = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32 %index, i32 %TC)
31; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
32;
33  %active.lane.mask = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32 %index, i32 %TC)
34  ret void
35}
36
37declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32)
38declare <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32, i32)
39declare <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32, i32)
40