xref: /llvm-project/llvm/test/Analysis/CostModel/AMDGPU/reduce-or.ll (revision 4178e33470763b406f614b646c8b01d24309e20b) 
1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2; RUN: opt < %s -mtriple=amdgcn-unknown-amdhsa -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck -check-prefixes=ALL %s
3; RUN: opt < %s -mtriple=amdgcn-unknown-amdhsa -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output | FileCheck -check-prefixes=ALL-SIZE %s
4; END.
5
6define i32 @reduce_i1(i32 %arg) {
7; ALL-LABEL: 'reduce_i1'
8; ALL-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1 = call i1 @llvm.vector.reduce.or.v1i1(<1 x i1> undef)
9; ALL-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V2 = call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> undef)
10; ALL-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V4 = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> undef)
11; ALL-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V8 = call i1 @llvm.vector.reduce.or.v8i1(<8 x i1> undef)
12; ALL-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %V16 = call i1 @llvm.vector.reduce.or.v16i1(<16 x i1> undef)
13; ALL-NEXT:  Cost Model: Found an estimated cost of 33 for instruction: %V32 = call i1 @llvm.vector.reduce.or.v32i1(<32 x i1> undef)
14; ALL-NEXT:  Cost Model: Found an estimated cost of 65 for instruction: %V64 = call i1 @llvm.vector.reduce.or.v64i1(<64 x i1> undef)
15; ALL-NEXT:  Cost Model: Found an estimated cost of 130 for instruction: %V128 = call i1 @llvm.vector.reduce.or.v128i1(<128 x i1> undef)
16; ALL-NEXT:  Cost Model: Found an estimated cost of 260 for instruction: %V256 = call i1 @llvm.vector.reduce.or.v256i1(<256 x i1> undef)
17; ALL-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
18;
19; ALL-SIZE-LABEL: 'reduce_i1'
20; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V1 = call i1 @llvm.vector.reduce.or.v1i1(<1 x i1> undef)
21; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %V2 = call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> undef)
22; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V4 = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> undef)
23; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %V8 = call i1 @llvm.vector.reduce.or.v8i1(<8 x i1> undef)
24; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %V16 = call i1 @llvm.vector.reduce.or.v16i1(<16 x i1> undef)
25; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 33 for instruction: %V32 = call i1 @llvm.vector.reduce.or.v32i1(<32 x i1> undef)
26; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 65 for instruction: %V64 = call i1 @llvm.vector.reduce.or.v64i1(<64 x i1> undef)
27; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 129 for instruction: %V128 = call i1 @llvm.vector.reduce.or.v128i1(<128 x i1> undef)
28; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 257 for instruction: %V256 = call i1 @llvm.vector.reduce.or.v256i1(<256 x i1> undef)
29; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
30;
31  %V1   = call i1 @llvm.vector.reduce.or.v1i1(<1 x i1> undef)
32  %V2   = call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> undef)
33  %V4   = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> undef)
34  %V8   = call i1 @llvm.vector.reduce.or.v8i1(<8 x i1> undef)
35  %V16  = call i1 @llvm.vector.reduce.or.v16i1(<16 x i1> undef)
36  %V32  = call i1 @llvm.vector.reduce.or.v32i1(<32 x i1> undef)
37  %V64  = call i1 @llvm.vector.reduce.or.v64i1(<64 x i1> undef)
38  %V128 = call i1 @llvm.vector.reduce.or.v128i1(<128 x i1> undef)
39  %V256 = call i1 @llvm.vector.reduce.or.v256i1(<256 x i1> undef)
40  ret i32 undef
41}
42
43declare i1 @llvm.vector.reduce.or.v1i1(<1 x i1>)
44declare i1 @llvm.vector.reduce.or.v2i1(<2 x i1>)
45declare i1 @llvm.vector.reduce.or.v4i1(<4 x i1>)
46declare i1 @llvm.vector.reduce.or.v8i1(<8 x i1>)
47declare i1 @llvm.vector.reduce.or.v16i1(<16 x i1>)
48declare i1 @llvm.vector.reduce.or.v32i1(<32 x i1>)
49declare i1 @llvm.vector.reduce.or.v64i1(<64 x i1>)
50declare i1 @llvm.vector.reduce.or.v128i1(<128 x i1>)
51declare i1 @llvm.vector.reduce.or.v256i1(<256 x i1>)
52