xref: /llvm-project/llvm/test/Analysis/CostModel/AMDGPU/bit-ops.ll (revision 4178e33470763b406f614b646c8b01d24309e20b) 
1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa < %s | FileCheck -check-prefixes=SLOW16 %s
3; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=FAST16 %s
4; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa < %s | FileCheck -check-prefixes=SLOW16-SIZE %s
5; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=FAST16-SIZE %s
6; END.
7
8define amdgpu_kernel void @or() #0 {
9; SLOW16-LABEL: 'or'
10; SLOW16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = or i8 undef, undef
11; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = or <2 x i8> undef, undef
12; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = or <3 x i8> undef, undef
13; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = or <4 x i8> undef, undef
14; SLOW16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = or i16 undef, undef
15; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = or <2 x i16> undef, undef
16; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = or <3 x i16> undef, undef
17; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = or <4 x i16> undef, undef
18; SLOW16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = or i32 undef, undef
19; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = or <2 x i32> undef, undef
20; SLOW16-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = or <3 x i32> undef, undef
21; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = or <4 x i32> undef, undef
22; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = or i64 undef, undef
23; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = or <2 x i64> undef, undef
24; SLOW16-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = or <3 x i64> undef, undef
25; SLOW16-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = or <4 x i64> undef, undef
26; SLOW16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
27;
28; FAST16-LABEL: 'or'
29; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = or i8 undef, undef
30; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = or <2 x i8> undef, undef
31; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = or <3 x i8> undef, undef
32; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = or <4 x i8> undef, undef
33; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = or i16 undef, undef
34; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = or <2 x i16> undef, undef
35; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = or <3 x i16> undef, undef
36; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = or <4 x i16> undef, undef
37; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = or i32 undef, undef
38; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = or <2 x i32> undef, undef
39; FAST16-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = or <3 x i32> undef, undef
40; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = or <4 x i32> undef, undef
41; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = or i64 undef, undef
42; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = or <2 x i64> undef, undef
43; FAST16-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = or <3 x i64> undef, undef
44; FAST16-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = or <4 x i64> undef, undef
45; FAST16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
46;
47; SLOW16-SIZE-LABEL: 'or'
48; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = or i8 undef, undef
49; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = or <2 x i8> undef, undef
50; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = or <3 x i8> undef, undef
51; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = or <4 x i8> undef, undef
52; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = or i16 undef, undef
53; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = or <2 x i16> undef, undef
54; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = or <3 x i16> undef, undef
55; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = or <4 x i16> undef, undef
56; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = or i32 undef, undef
57; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = or <2 x i32> undef, undef
58; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = or <3 x i32> undef, undef
59; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = or <4 x i32> undef, undef
60; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = or i64 undef, undef
61; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = or <2 x i64> undef, undef
62; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = or <3 x i64> undef, undef
63; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = or <4 x i64> undef, undef
64; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
65;
66; FAST16-SIZE-LABEL: 'or'
67; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = or i8 undef, undef
68; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = or <2 x i8> undef, undef
69; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = or <3 x i8> undef, undef
70; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = or <4 x i8> undef, undef
71; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = or i16 undef, undef
72; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = or <2 x i16> undef, undef
73; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = or <3 x i16> undef, undef
74; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = or <4 x i16> undef, undef
75; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = or i32 undef, undef
76; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = or <2 x i32> undef, undef
77; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = or <3 x i32> undef, undef
78; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = or <4 x i32> undef, undef
79; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = or i64 undef, undef
80; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = or <2 x i64> undef, undef
81; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = or <3 x i64> undef, undef
82; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = or <4 x i64> undef, undef
83; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
84;
85  %i8 = or i8 undef, undef
86  %v2i8 = or <2 x i8> undef, undef
87  %v3i8 = or <3 x i8> undef, undef
88  %v4i8 = or <4 x i8> undef, undef
89  %i16 = or i16 undef, undef
90  %v2i16 = or <2 x i16> undef, undef
91  %v3i16 = or <3 x i16> undef, undef
92  %v4i16 = or <4 x i16> undef, undef
93  %i32 = or i32 undef, undef
94  %v2i32 = or <2 x i32> undef, undef
95  %v3i32 = or <3 x i32> undef, undef
96  %v4i32 = or <4 x i32> undef, undef
97  %i64 = or i64 undef, undef
98  %v2i64 = or <2 x i64> undef, undef
99  %v3i64 = or <3 x i64> undef, undef
100  %v4i64 = or <4 x i64> undef, undef
101  ret void
102}
103
104define amdgpu_kernel void @xor() #0 {
105; SLOW16-LABEL: 'xor'
106; SLOW16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = xor i8 undef, undef
107; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = xor <2 x i8> undef, undef
108; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = xor <3 x i8> undef, undef
109; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = xor <4 x i8> undef, undef
110; SLOW16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = xor i16 undef, undef
111; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = xor <2 x i16> undef, undef
112; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = xor <3 x i16> undef, undef
113; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = xor <4 x i16> undef, undef
114; SLOW16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = xor i32 undef, undef
115; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = xor <2 x i32> undef, undef
116; SLOW16-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = xor <3 x i32> undef, undef
117; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = xor <4 x i32> undef, undef
118; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = xor i64 undef, undef
119; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = xor <2 x i64> undef, undef
120; SLOW16-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = xor <3 x i64> undef, undef
121; SLOW16-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = xor <4 x i64> undef, undef
122; SLOW16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
123;
124; FAST16-LABEL: 'xor'
125; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = xor i8 undef, undef
126; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = xor <2 x i8> undef, undef
127; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = xor <3 x i8> undef, undef
128; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = xor <4 x i8> undef, undef
129; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = xor i16 undef, undef
130; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = xor <2 x i16> undef, undef
131; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = xor <3 x i16> undef, undef
132; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = xor <4 x i16> undef, undef
133; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = xor i32 undef, undef
134; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = xor <2 x i32> undef, undef
135; FAST16-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = xor <3 x i32> undef, undef
136; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = xor <4 x i32> undef, undef
137; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = xor i64 undef, undef
138; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = xor <2 x i64> undef, undef
139; FAST16-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = xor <3 x i64> undef, undef
140; FAST16-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = xor <4 x i64> undef, undef
141; FAST16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
142;
143; SLOW16-SIZE-LABEL: 'xor'
144; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = xor i8 undef, undef
145; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = xor <2 x i8> undef, undef
146; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = xor <3 x i8> undef, undef
147; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = xor <4 x i8> undef, undef
148; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = xor i16 undef, undef
149; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = xor <2 x i16> undef, undef
150; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = xor <3 x i16> undef, undef
151; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = xor <4 x i16> undef, undef
152; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = xor i32 undef, undef
153; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = xor <2 x i32> undef, undef
154; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = xor <3 x i32> undef, undef
155; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = xor <4 x i32> undef, undef
156; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = xor i64 undef, undef
157; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = xor <2 x i64> undef, undef
158; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = xor <3 x i64> undef, undef
159; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = xor <4 x i64> undef, undef
160; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
161;
162; FAST16-SIZE-LABEL: 'xor'
163; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = xor i8 undef, undef
164; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = xor <2 x i8> undef, undef
165; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = xor <3 x i8> undef, undef
166; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = xor <4 x i8> undef, undef
167; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = xor i16 undef, undef
168; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = xor <2 x i16> undef, undef
169; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = xor <3 x i16> undef, undef
170; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = xor <4 x i16> undef, undef
171; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = xor i32 undef, undef
172; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = xor <2 x i32> undef, undef
173; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = xor <3 x i32> undef, undef
174; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = xor <4 x i32> undef, undef
175; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = xor i64 undef, undef
176; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = xor <2 x i64> undef, undef
177; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = xor <3 x i64> undef, undef
178; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = xor <4 x i64> undef, undef
179; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
180;
181  %i8 = xor i8 undef, undef
182  %v2i8 = xor <2 x i8> undef, undef
183  %v3i8 = xor <3 x i8> undef, undef
184  %v4i8 = xor <4 x i8> undef, undef
185  %i16 = xor i16 undef, undef
186  %v2i16 = xor <2 x i16> undef, undef
187  %v3i16 = xor <3 x i16> undef, undef
188  %v4i16 = xor <4 x i16> undef, undef
189  %i32 = xor i32 undef, undef
190  %v2i32 = xor <2 x i32> undef, undef
191  %v3i32 = xor <3 x i32> undef, undef
192  %v4i32 = xor <4 x i32> undef, undef
193  %i64 = xor i64 undef, undef
194  %v2i64 = xor <2 x i64> undef, undef
195  %v3i64 = xor <3 x i64> undef, undef
196  %v4i64 = xor <4 x i64> undef, undef
197  ret void
198}
199
200define amdgpu_kernel void @and() #0 {
201; SLOW16-LABEL: 'and'
202; SLOW16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = and i8 undef, undef
203; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = and <2 x i8> undef, undef
204; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = and <3 x i8> undef, undef
205; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = and <4 x i8> undef, undef
206; SLOW16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = and i16 undef, undef
207; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = and <2 x i16> undef, undef
208; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = and <3 x i16> undef, undef
209; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = and <4 x i16> undef, undef
210; SLOW16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = and i32 undef, undef
211; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = and <2 x i32> undef, undef
212; SLOW16-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = and <3 x i32> undef, undef
213; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = and <4 x i32> undef, undef
214; SLOW16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = and i64 undef, undef
215; SLOW16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = and <2 x i64> undef, undef
216; SLOW16-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = and <3 x i64> undef, undef
217; SLOW16-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = and <4 x i64> undef, undef
218; SLOW16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
219;
220; FAST16-LABEL: 'and'
221; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = and i8 undef, undef
222; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = and <2 x i8> undef, undef
223; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = and <3 x i8> undef, undef
224; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = and <4 x i8> undef, undef
225; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = and i16 undef, undef
226; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = and <2 x i16> undef, undef
227; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = and <3 x i16> undef, undef
228; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = and <4 x i16> undef, undef
229; FAST16-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = and i32 undef, undef
230; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = and <2 x i32> undef, undef
231; FAST16-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = and <3 x i32> undef, undef
232; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = and <4 x i32> undef, undef
233; FAST16-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = and i64 undef, undef
234; FAST16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = and <2 x i64> undef, undef
235; FAST16-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = and <3 x i64> undef, undef
236; FAST16-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = and <4 x i64> undef, undef
237; FAST16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
238;
239; SLOW16-SIZE-LABEL: 'and'
240; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = and i8 undef, undef
241; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = and <2 x i8> undef, undef
242; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = and <3 x i8> undef, undef
243; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = and <4 x i8> undef, undef
244; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = and i16 undef, undef
245; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = and <2 x i16> undef, undef
246; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = and <3 x i16> undef, undef
247; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = and <4 x i16> undef, undef
248; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = and i32 undef, undef
249; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = and <2 x i32> undef, undef
250; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = and <3 x i32> undef, undef
251; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = and <4 x i32> undef, undef
252; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = and i64 undef, undef
253; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = and <2 x i64> undef, undef
254; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = and <3 x i64> undef, undef
255; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = and <4 x i64> undef, undef
256; SLOW16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
257;
258; FAST16-SIZE-LABEL: 'and'
259; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i8 = and i8 undef, undef
260; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = and <2 x i8> undef, undef
261; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = and <3 x i8> undef, undef
262; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = and <4 x i8> undef, undef
263; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i16 = and i16 undef, undef
264; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = and <2 x i16> undef, undef
265; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = and <3 x i16> undef, undef
266; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = and <4 x i16> undef, undef
267; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %i32 = and i32 undef, undef
268; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = and <2 x i32> undef, undef
269; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = and <3 x i32> undef, undef
270; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = and <4 x i32> undef, undef
271; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %i64 = and i64 undef, undef
272; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = and <2 x i64> undef, undef
273; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = and <3 x i64> undef, undef
274; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = and <4 x i64> undef, undef
275; FAST16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
276;
277  %i8 = and i8 undef, undef
278  %v2i8 = and <2 x i8> undef, undef
279  %v3i8 = and <3 x i8> undef, undef
280  %v4i8 = and <4 x i8> undef, undef
281  %i16 = and i16 undef, undef
282  %v2i16 = and <2 x i16> undef, undef
283  %v3i16 = and <3 x i16> undef, undef
284  %v4i16 = and <4 x i16> undef, undef
285  %i32 = and i32 undef, undef
286  %v2i32 = and <2 x i32> undef, undef
287  %v3i32 = and <3 x i32> undef, undef
288  %v4i32 = and <4 x i32> undef, undef
289  %i64 = and i64 undef, undef
290  %v2i64 = and <2 x i64> undef, undef
291  %v3i64 = and <3 x i64> undef, undef
292  %v4i64 = and <4 x i64> undef, undef
293  ret void
294}
295
296attributes #0 = { nounwind }
297