xref: /llvm-project/llvm/test/Analysis/CostModel/AArch64/store.ll (revision 68c50b111d74afb9489cf97770fa917d0a1c7f77)
1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64-unknown | FileCheck %s
3; RUN: opt < %s -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=aarch64-unknown | FileCheck %s --check-prefix=SIZE
4; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64-unknown -mattr=slow-misaligned-128store | FileCheck %s --check-prefix=SLOW_MISALIGNED_128_STORE
5
6target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-v256:32:256-a0:0:32-n32-S32"
7define void @getMemoryOpCost() {
8    ; If FeatureSlowMisaligned128Store is set, we penalize 128-bit stores.
9    ; The unlegalized 256-bit stores are further penalized when legalized down
10    ; to 128-bit stores.
11; CHECK-LABEL: 'getMemoryOpCost'
12; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <4 x i64> undef, ptr undef, align 4
13; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <8 x i32> undef, ptr undef, align 4
14; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <16 x i16> undef, ptr undef, align 4
15; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <32 x i8> undef, ptr undef, align 4
16; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <4 x double> undef, ptr undef, align 4
17; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <8 x float> undef, ptr undef, align 4
18; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <16 x half> undef, ptr undef, align 4
19; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <2 x i64> undef, ptr undef, align 4
20; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <4 x i32> undef, ptr undef, align 4
21; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <8 x i16> undef, ptr undef, align 4
22; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <16 x i8> undef, ptr undef, align 4
23; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <2 x double> undef, ptr undef, align 4
24; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <4 x float> undef, ptr undef, align 4
25; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <8 x half> undef, ptr undef, align 4
26; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: store <2 x i8> undef, ptr undef, align 2
27; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <4 x i8> undef, ptr undef, align 4
28; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %1 = load <2 x i8>, ptr undef, align 2
29; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %2 = load <4 x i8>, ptr undef, align 4
30; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
31;
32; SIZE-LABEL: 'getMemoryOpCost'
33; SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <4 x i64> undef, ptr undef, align 4
34; SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <8 x i32> undef, ptr undef, align 4
35; SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <16 x i16> undef, ptr undef, align 4
36; SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <32 x i8> undef, ptr undef, align 4
37; SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <4 x double> undef, ptr undef, align 4
38; SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <8 x float> undef, ptr undef, align 4
39; SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <16 x half> undef, ptr undef, align 4
40; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <2 x i64> undef, ptr undef, align 4
41; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <4 x i32> undef, ptr undef, align 4
42; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <8 x i16> undef, ptr undef, align 4
43; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <16 x i8> undef, ptr undef, align 4
44; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <2 x double> undef, ptr undef, align 4
45; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <4 x float> undef, ptr undef, align 4
46; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <8 x half> undef, ptr undef, align 4
47; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <2 x i8> undef, ptr undef, align 2
48; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: store <4 x i8> undef, ptr undef, align 4
49; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %1 = load <2 x i8>, ptr undef, align 2
50; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %2 = load <4 x i8>, ptr undef, align 4
51; SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
52;
53; SLOW_MISALIGNED_128_STORE-LABEL: 'getMemoryOpCost'
54; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: store <4 x i64> undef, ptr undef, align 4
55; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: store <8 x i32> undef, ptr undef, align 4
56; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: store <16 x i16> undef, ptr undef, align 4
57; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: store <32 x i8> undef, ptr undef, align 4
58; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: store <4 x double> undef, ptr undef, align 4
59; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: store <8 x float> undef, ptr undef, align 4
60; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: store <16 x half> undef, ptr undef, align 4
61; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: store <2 x i64> undef, ptr undef, align 4
62; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: store <4 x i32> undef, ptr undef, align 4
63; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: store <8 x i16> undef, ptr undef, align 4
64; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: store <16 x i8> undef, ptr undef, align 4
65; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: store <2 x double> undef, ptr undef, align 4
66; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: store <4 x float> undef, ptr undef, align 4
67; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: store <8 x half> undef, ptr undef, align 4
68; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: store <2 x i8> undef, ptr undef, align 2
69; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: store <4 x i8> undef, ptr undef, align 4
70; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %1 = load <2 x i8>, ptr undef, align 2
71; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %2 = load <4 x i8>, ptr undef, align 4
72; SLOW_MISALIGNED_128_STORE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
73;
74  store <4 x i64> undef, ptr undef
75  store <8 x i32> undef, ptr undef
76  store <16 x i16> undef, ptr undef
77  store <32 x i8> undef, ptr undef
78
79  store <4 x double> undef, ptr undef
80  store <8 x float> undef, ptr undef
81  store <16 x half> undef, ptr undef
82
83  store <2 x i64> undef, ptr undef
84  store <4 x i32> undef, ptr undef
85  store <8 x i16> undef, ptr undef
86  store <16 x i8> undef, ptr undef
87
88  store <2 x double> undef, ptr undef
89  store <4 x float> undef, ptr undef
90  store <8 x half> undef, ptr undef
91
92  ; We scalarize the loads/stores because there is no vector register name for
93  ; these types (they get extended to v.4h/v.2s).
94  store <2 x i8> undef, ptr undef
95  store <4 x i8> undef, ptr undef
96  load <2 x i8> , ptr undef
97  load <4 x i8> , ptr undef
98
99  ret void
100}
101