1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Type profiles 11//===----------------------------------------------------------------------===// 12def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<1, 2, 18 [SDTCisVT<0, i32>, 19 SDTCisSameAs<1, 2>]>; 20def SDT_ZICmp : SDTypeProfile<1, 3, 21 [SDTCisVT<0, i32>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, i32>]>; 24def SDT_ZBRCCMask : SDTypeProfile<0, 4, 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 27 SDTCisVT<2, OtherVT>, 28 SDTCisVT<3, i32>]>; 29def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 30 [SDTCisSameAs<0, 1>, 31 SDTCisSameAs<1, 2>, 32 SDTCisVT<3, i32>, 33 SDTCisVT<4, i32>, 34 SDTCisVT<5, i32>]>; 35def SDT_ZWrapPtr : SDTypeProfile<1, 1, 36 [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZWrapOffset : SDTypeProfile<1, 2, 39 [SDTCisSameAs<0, 1>, 40 SDTCisSameAs<0, 2>, 41 SDTCisPtrTy<0>]>; 42def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 43def SDT_ZProbedAlloca : SDTypeProfile<1, 2, 44 [SDTCisSameAs<0, 1>, 45 SDTCisSameAs<0, 2>, 46 SDTCisPtrTy<0>]>; 47def SDT_ZGR128Binary : SDTypeProfile<1, 2, 48 [SDTCisVT<0, untyped>, 49 SDTCisInt<1>, 50 SDTCisInt<2>]>; 51def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 52 [SDTCisInt<0>, 53 SDTCisVT<1, i32>, 54 SDTCisSameAs<0, 2>, 55 SDTCisSameAs<0, 3>]>; 56def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 57 [SDTCisInt<0>, 58 SDTCisVT<1, i32>, 59 SDTCisSameAs<0, 2>, 60 SDTCisSameAs<0, 3>, 61 SDTCisVT<1, i32>]>; 62def SDT_ZBinaryConv : SDTypeProfile<1, 2, 63 [SDTCisInt<0>, 64 SDTCisInt<1>, 65 SDTCisSameAs<1, 2>]>; 66def SDT_ZTernary : SDTypeProfile<1, 3, 67 [SDTCisInt<0>, 68 SDTCisSameAs<0, 1>, 69 SDTCisSameAs<0, 2>, 70 SDTCisSameAs<0, 3>]>; 71def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 72 [SDTCisVT<0, i32>, 73 SDTCisPtrTy<1>, 74 SDTCisVT<2, i32>, 75 SDTCisVT<3, i32>, 76 SDTCisVT<4, i32>, 77 SDTCisVT<5, i32>]>; 78def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 79 [SDTCisVT<0, i32>, 80 SDTCisVT<1, i32>, 81 SDTCisPtrTy<2>, 82 SDTCisVT<3, i32>, 83 SDTCisVT<4, i32>, 84 SDTCisVT<5, i32>, 85 SDTCisVT<6, i32>, 86 SDTCisVT<7, i32>]>; 87def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 88 [SDTCisInt<0>, 89 SDTCisVT<1, i32>, 90 SDTCisPtrTy<2>, 91 SDTCisSameAs<0, 3>, 92 SDTCisSameAs<0, 4>]>; 93def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 94 [SDTCisVT<0, untyped>, 95 SDTCisPtrTy<1>]>; 96def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 97 [SDTCisVT<0, untyped>, 98 SDTCisPtrTy<1>]>; 99def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 100 [SDTCisVT<0, untyped>, 101 SDTCisVT<1, i32>, 102 SDTCisPtrTy<2>, 103 SDTCisVT<3, untyped>, 104 SDTCisVT<4, untyped>]>; 105def SDT_ZMemMemLength : SDTypeProfile<0, 3, 106 [SDTCisPtrTy<0>, 107 SDTCisPtrTy<1>, 108 SDTCisVT<2, i64>]>; 109def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 110 [SDTCisVT<0, i32>, 111 SDTCisPtrTy<1>, 112 SDTCisPtrTy<2>, 113 SDTCisVT<3, i64>]>; 114def SDT_ZMemsetMVC : SDTypeProfile<0, 3, 115 [SDTCisPtrTy<0>, 116 SDTCisVT<1, i64>, 117 SDTCisVT<2, i32>]>; 118def SDT_ZString : SDTypeProfile<1, 3, 119 [SDTCisPtrTy<0>, 120 SDTCisPtrTy<1>, 121 SDTCisPtrTy<2>, 122 SDTCisVT<3, i32>]>; 123def SDT_ZStringCC : SDTypeProfile<2, 3, 124 [SDTCisPtrTy<0>, 125 SDTCisVT<1, i32>, 126 SDTCisPtrTy<2>, 127 SDTCisPtrTy<3>, 128 SDTCisVT<4, i32>]>; 129def SDT_ZIPM : SDTypeProfile<1, 1, 130 [SDTCisVT<0, i32>, 131 SDTCisVT<1, i32>]>; 132def SDT_ZPrefetch : SDTypeProfile<0, 2, 133 [SDTCisVT<0, i32>, 134 SDTCisPtrTy<1>]>; 135def SDT_ZStoreInherent : SDTypeProfile<0, 1, 136 [SDTCisPtrTy<0>]>; 137def SDT_ZTBegin : SDTypeProfile<1, 2, 138 [SDTCisVT<0, i32>, 139 SDTCisPtrTy<1>, 140 SDTCisVT<2, i32>]>; 141def SDT_ZADAENTRY : SDTypeProfile<1, 3, 142 [SDTCisPtrTy<0>, 143 SDTCisPtrTy<1>, 144 SDTCisPtrTy<2>, 145 SDTCisVT<3, i64>]>; 146def SDT_ZTEnd : SDTypeProfile<1, 0, 147 [SDTCisVT<0, i32>]>; 148def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 149 [SDTCisVec<0>, 150 SDTCisSameAs<0, 1>, 151 SDTCisVT<3, i32>]>; 152def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 153 [SDTCisVec<1>, 154 SDTCisVT<2, i32>]>; 155def SDT_ZReplicate : SDTypeProfile<1, 1, 156 [SDTCisVec<0>]>; 157def SDT_ZVecUnpack : SDTypeProfile<1, 1, 158 [SDTCisVec<1>]>; 159def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 160 [SDTCisVec<0>, 161 SDTCisVec<1>]>; 162def SDT_ZVecUnary : SDTypeProfile<1, 1, 163 [SDTCisVec<0>, 164 SDTCisSameAs<0, 1>]>; 165def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 166 [SDTCisVec<0>, 167 SDTCisVT<1, i32>, 168 SDTCisSameAs<0, 2>]>; 169def SDT_ZVecCompare : SDTypeProfile<1, 2, 170 [SDTCisSameAs<0, 1>, 171 SDTCisSameAs<0, 2>]>; 172def SDT_ZVecCompareCC : SDTypeProfile<2, 2, 173 [SDTCisVT<1, i32>, 174 SDTCisSameAs<0, 2>, 175 SDTCisSameAs<0, 2>]>; 176def SDT_ZVecBinary : SDTypeProfile<1, 2, 177 [SDTCisVec<0>, 178 SDTCisSameAs<0, 1>, 179 SDTCisSameAs<0, 2>]>; 180def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 181 [SDTCisVec<0>, 182 SDTCisVT<1, i32>, 183 SDTCisSameAs<0, 2>, 184 SDTCisSameAs<0, 2>]>; 185def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 186 [SDTCisVec<0>, 187 SDTCisSameAs<0, 1>, 188 SDTCisVT<2, i32>]>; 189def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 190 [SDTCisVec<0>, 191 SDTCisVec<1>, 192 SDTCisSameAs<1, 2>]>; 193def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 194 [SDTCisVec<0>, 195 SDTCisVT<1, i32>, 196 SDTCisVec<2>, 197 SDTCisSameAs<2, 3>]>; 198def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 199 [SDTCisVec<0>, 200 SDTCisVT<1, i32>, 201 SDTCisVec<2>, 202 SDTCisVT<3, i32>]>; 203def SDT_ZRotateMask : SDTypeProfile<1, 2, 204 [SDTCisVec<0>, 205 SDTCisVT<1, i32>, 206 SDTCisVT<2, i32>]>; 207def SDT_ZJoinDwords : SDTypeProfile<1, 2, 208 [SDTCisVT<0, v2i64>, 209 SDTCisVT<1, i64>, 210 SDTCisVT<2, i64>]>; 211def SDT_ZVecTernary : SDTypeProfile<1, 3, 212 [SDTCisVec<0>, 213 SDTCisSameAs<0, 1>, 214 SDTCisSameAs<0, 2>, 215 SDTCisSameAs<0, 3>]>; 216def SDT_ZVecTernaryConvCC : SDTypeProfile<2, 3, 217 [SDTCisVec<0>, 218 SDTCisVT<1, i32>, 219 SDTCisVec<2>, 220 SDTCisSameAs<2, 3>, 221 SDTCisSameAs<0, 4>]>; 222def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 223 [SDTCisVec<0>, 224 SDTCisSameAs<0, 1>, 225 SDTCisSameAs<0, 2>, 226 SDTCisVT<3, i32>]>; 227def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 228 [SDTCisVec<0>, 229 SDTCisVT<1, i32>, 230 SDTCisSameAs<0, 2>, 231 SDTCisSameAs<0, 3>, 232 SDTCisVT<4, i32>]>; 233def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 234 [SDTCisVec<0>, 235 SDTCisSameAs<0, 1>, 236 SDTCisSameAs<0, 2>, 237 SDTCisSameAs<0, 3>, 238 SDTCisVT<4, i32>]>; 239def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 240 [SDTCisVec<0>, 241 SDTCisVT<1, i32>, 242 SDTCisSameAs<0, 2>, 243 SDTCisSameAs<0, 3>, 244 SDTCisSameAs<0, 4>, 245 SDTCisVT<5, i32>]>; 246def SDT_ZTest : SDTypeProfile<1, 2, 247 [SDTCisVT<0, i32>, 248 SDTCisVT<2, i64>]>; 249 250def SDT_ZSetJmp : SDTypeProfile<1, 1, 251 [SDTCisInt<0>, 252 SDTCisPtrTy<1>]>; 253def SDT_ZLongJmp : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>; 254 255 256//===----------------------------------------------------------------------===// 257// Node definitions 258//===----------------------------------------------------------------------===// 259 260// These are target-independent nodes, but have target-specific formats. 261def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 262 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 263def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 264 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 265 SDNPOutGlue]>; 266def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 267 268// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 269def z_retglue : SDNode<"SystemZISD::RET_GLUE", SDTNone, 270 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 271def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 272 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 273 SDNPVariadic]>; 274def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 275 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 276 SDNPVariadic]>; 277def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 278 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 279 SDNPVariadic]>; 280def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 281 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 282 SDNPVariadic]>; 283def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 284def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 285 SDT_ZWrapOffset, []>; 286def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 287def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 288def z_strict_fcmp : SDNode<"SystemZISD::STRICT_FCMP", SDT_ZCmp, 289 [SDNPHasChain]>; 290def z_strict_fcmps : SDNode<"SystemZISD::STRICT_FCMPS", SDT_ZCmp, 291 [SDNPHasChain]>; 292def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 293def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 294 [SDNPHasChain]>; 295def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 296 SDT_ZSelectCCMask>; 297def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 298def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 299def z_probed_alloca : SDNode<"SystemZISD::PROBED_ALLOCA", SDT_ZProbedAlloca, 300 [SDNPHasChain]>; 301def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 302def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 303def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 304def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 305def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 306def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 307def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 308def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 309def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 310def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 311def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 312def z_vacc : SDNode<"SystemZISD::VACC", SDTIntBinOp>; 313def z_vac : SDNode<"SystemZISD::VAC", SDT_ZTernary>; 314def z_vaccc : SDNode<"SystemZISD::VACCC", SDT_ZTernary>; 315def z_vscbi : SDNode<"SystemZISD::VSCBI", SDTIntBinOp>; 316def z_vsbi : SDNode<"SystemZISD::VSBI", SDT_ZTernary>; 317def z_vsbcbi : SDNode<"SystemZISD::VSBCBI", SDT_ZTernary>; 318 319def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 320 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 321def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 322 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 323def z_loadeswap : SDNode<"SystemZISD::VLER", SDTLoad, 324 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 325def z_storeeswap : SDNode<"SystemZISD::VSTER", SDTStore, 326 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 327def z_stckf : SDNode<"SystemZISD::STCKF", SDT_ZStoreInherent, 328 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 329 330def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 331 332def z_eh_sjlj_setjmp : SDNode<"ISD::EH_SJLJ_SETJMP", SDT_ZSetJmp, 333 [SDNPHasChain, SDNPSideEffect]>; 334def z_eh_sjlj_longjmp : SDNode<"ISD::EH_SJLJ_LONGJMP", SDT_ZLongJmp, 335 [SDNPHasChain, SDNPSideEffect]>; 336 337 338// Defined because the index is an i32 rather than a pointer. 339def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 340 SDT_ZInsertVectorElt>; 341def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 342 SDT_ZExtractVectorElt>; 343def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 344def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 345def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 346def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 347def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 348def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 349def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 350def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 351def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 352 SDT_ZVecTernaryInt>; 353def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 354def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 355def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 356def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 357def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnpack>; 358def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnpack>; 359def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnpack>; 360def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnpack>; 361def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 362 SDT_ZVecBinaryInt>; 363def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 364 SDT_ZVecBinaryInt>; 365def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 366 SDT_ZVecBinaryInt>; 367def z_vrotl_by_scalar : SDNode<"SystemZISD::VROTL_BY_SCALAR", 368 SDT_ZVecBinaryInt>; 369def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZBinaryConv>; 370def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecCompare>; 371def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecCompare>; 372def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecCompare>; 373def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecCompareCC>; 374def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecCompareCC>; 375def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecCompareCC>; 376def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 377def z_strict_vfcmpe : SDNode<"SystemZISD::STRICT_VFCMPE", 378 SDT_ZVecBinaryConv, [SDNPHasChain]>; 379def z_strict_vfcmpes : SDNode<"SystemZISD::STRICT_VFCMPES", 380 SDT_ZVecBinaryConv, [SDNPHasChain]>; 381def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 382def z_strict_vfcmph : SDNode<"SystemZISD::STRICT_VFCMPH", 383 SDT_ZVecBinaryConv, [SDNPHasChain]>; 384def z_strict_vfcmphs : SDNode<"SystemZISD::STRICT_VFCMPHS", 385 SDT_ZVecBinaryConv, [SDNPHasChain]>; 386def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 387def z_strict_vfcmphe : SDNode<"SystemZISD::STRICT_VFCMPHE", 388 SDT_ZVecBinaryConv, [SDNPHasChain]>; 389def z_strict_vfcmphes : SDNode<"SystemZISD::STRICT_VFCMPHES", 390 SDT_ZVecBinaryConv, [SDNPHasChain]>; 391def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 392def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 393def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 394def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 395def z_strict_vextend : SDNode<"SystemZISD::STRICT_VEXTEND", 396 SDT_ZVecUnaryConv, [SDNPHasChain]>; 397def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 398def z_strict_vround : SDNode<"SystemZISD::STRICT_VROUND", 399 SDT_ZVecUnaryConv, [SDNPHasChain]>; 400def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 401def z_scmp128hi : SDNode<"SystemZISD::SCMP128HI", SDT_ZCmp>; 402def z_ucmp128hi : SDNode<"SystemZISD::UCMP128HI", SDT_ZCmp>; 403def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 404def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 405def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 406def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 407def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 408def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 409def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 410def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 411 SDT_ZVecQuaternaryIntCC>; 412def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 413 SDT_ZVecQuaternaryIntCC>; 414def z_vstrs_cc : SDNode<"SystemZISD::VSTRS_CC", 415 SDT_ZVecTernaryConvCC>; 416def z_vstrsz_cc : SDNode<"SystemZISD::VSTRSZ_CC", 417 SDT_ZVecTernaryConvCC>; 418def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 419 420class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 421 : SDNode<"SystemZISD::"#name, profile, 422 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 423 424def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 425def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 426def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 427def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 428def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 429def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 430def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 431def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 432def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 433def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 434def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 435 436def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 437 SDT_ZAtomicCmpSwap, 438 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 439 SDNPMemOperand]>; 440def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 441 SDT_ZAtomicCmpSwapW, 442 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 443 SDNPMemOperand]>; 444 445def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 446 SDT_ZAtomicLoad128, 447 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 448def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 449 SDT_ZAtomicStore128, 450 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 451def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 452 SDT_ZAtomicCmpSwap128, 453 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 454 SDNPMemOperand]>; 455 456def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 457 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 458def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 459 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 460def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 461 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 462def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 463 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 464def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 465 [SDNPHasChain, SDNPMayLoad]>; 466def z_memset_mvc : SDNode<"SystemZISD::MEMSET_MVC", SDT_ZMemsetMVC, 467 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 468def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 469 [SDNPHasChain, SDNPMayLoad]>; 470def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 471 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 472def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 473 [SDNPHasChain, SDNPMayLoad]>; 474def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 475 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 476 SDNPMemOperand]>; 477 478def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 479 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 480def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 481 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 482def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 483 [SDNPHasChain, SDNPSideEffect]>; 484 485def z_ada_entry : SDNode<"SystemZISD::ADA_ENTRY", 486 SDT_ZADAENTRY>; 487 488def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 489def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 490def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 491 492//===----------------------------------------------------------------------===// 493// Pattern fragments 494//===----------------------------------------------------------------------===// 495 496def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 497 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 498}]>; 499def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 500 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 501}]>; 502def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 503 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 504}]>; 505 506def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 507 (z_storebswap node:$src, node:$addr), [{ 508 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 509}]>; 510def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 511 (z_storebswap node:$src, node:$addr), [{ 512 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 513}]>; 514def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 515 (z_storebswap node:$src, node:$addr), [{ 516 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 517}]>; 518 519// Fragments including CC as an implicit source. 520def z_br_ccmask 521 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 522 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 523def z_select_ccmask 524 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 525 (z_select_ccmask_1 node:$true, node:$false, 526 node:$valid, node:$mask, CC)>; 527def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 528def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 529 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 530def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 531 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 532 533// Signed and unsigned comparisons. 534def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 535 unsigned Type = N->getConstantOperandVal(2); 536 return Type != SystemZICMP::UnsignedOnly; 537}]>; 538def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 539 unsigned Type = N->getConstantOperandVal(2); 540 return Type != SystemZICMP::SignedOnly; 541}]>; 542 543// Register- and memory-based TEST UNDER MASK. 544def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, timm)>; 545def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 546 547// Shifts by small immediate amounts. 548def shl1 : PatFrag<(ops node:$src), (shl node:$src, (i32 1))>; 549def shl2 : PatFrag<(ops node:$src), (shl node:$src, (i32 2))>; 550def shl3 : PatFrag<(ops node:$src), (shl node:$src, (i32 3))>; 551def shl4 : PatFrag<(ops node:$src), (shl node:$src, (i32 4))>; 552 553// Register sign-extend operations. Sub-32-bit values are represented as i32s. 554def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 555def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 556def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 557 558// Match extensions of an i32 to an i64, followed by an in-register sign 559// extension from a sub-i32 value. 560def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 561def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 562 563// Register zero-extend operations. Sub-32-bit values are represented as i32s. 564def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 565def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 566def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 567 568// Match a 64-bit value that is guaranteed to have been sign- 569// or zero-extended from a 32-bit value. 570def assertsext32 : PatFrag<(ops node:$src), (assertsext node:$src), [{ 571 return cast<VTSDNode>(N->getOperand(1))->getVT() == MVT::i32; 572}]>; 573def assertzext32 : PatFrag<(ops node:$src), (assertzext node:$src), [{ 574 return cast<VTSDNode>(N->getOperand(1))->getVT() == MVT::i32; 575}]>; 576 577// Match a load or a non-extending atomic load. 578def z_load : PatFrags<(ops node:$ptr), 579 [(load node:$ptr), 580 (atomic_load node:$ptr)], [{ 581 if (auto *AL = dyn_cast<AtomicSDNode>(N)) 582 if (AL->getExtensionType() != ISD::NON_EXTLOAD) 583 return false; 584 return true; 585}]>; 586 587// Sign extending (atomic) loads. 588def z_sextload : PatFrags<(ops node:$ptr), 589 [(unindexedload node:$ptr), 590 (atomic_load node:$ptr)], [{ 591 return getLoadExtType(N) == ISD::SEXTLOAD; 592}]>; 593def z_sextloadi8 : PatFrag<(ops node:$ptr), (z_sextload node:$ptr), [{ 594 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 595}]>; 596def z_sextloadi16 : PatFrag<(ops node:$ptr), (z_sextload node:$ptr), [{ 597 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 598}]>; 599def z_sextloadi32 : PatFrag<(ops node:$ptr), (z_sextload node:$ptr), [{ 600 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 601}]>; 602def z_sextloadi64 : PatFrag<(ops node:$ptr), (z_sextload node:$ptr), [{ 603 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i64; 604}]>; 605 606// Zero extending (atomic) loads. 607def z_zextload : PatFrags<(ops node:$ptr), 608 [(unindexedload node:$ptr), 609 (atomic_load node:$ptr)], [{ 610 return getLoadExtType(N) == ISD::ZEXTLOAD; 611}]>; 612def z_zextloadi8 : PatFrag<(ops node:$ptr), (z_zextload node:$ptr), [{ 613 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 614}]>; 615def z_zextloadi16 : PatFrag<(ops node:$ptr), (z_zextload node:$ptr), [{ 616 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 617}]>; 618def z_zextloadi32 : PatFrag<(ops node:$ptr), (z_zextload node:$ptr), [{ 619 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 620}]>; 621def z_zextloadi64 : PatFrag<(ops node:$ptr), (z_zextload node:$ptr), [{ 622 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i64; 623}]>; 624 625// Extending (atomic) loads in which the extension type can be signed. 626def z_asextload : PatFrags<(ops node:$ptr), 627 [(unindexedload node:$ptr), 628 (atomic_load node:$ptr)], [{ 629 ISD::LoadExtType ETy = getLoadExtType(N); 630 return ETy == ISD::EXTLOAD || ETy == ISD::SEXTLOAD; 631}]>; 632def z_asextloadi8 : PatFrag<(ops node:$ptr), (z_asextload node:$ptr), [{ 633 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 634}]>; 635def z_asextloadi16 : PatFrag<(ops node:$ptr), (z_asextload node:$ptr), [{ 636 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 637}]>; 638def z_asextloadi32 : PatFrag<(ops node:$ptr), (z_asextload node:$ptr), [{ 639 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 640}]>; 641 642// Extending (atomic) loads in which the extension type can be unsigned. 643def z_azextload : PatFrags<(ops node:$ptr), 644 [(unindexedload node:$ptr), 645 (atomic_load node:$ptr)], [{ 646 ISD::LoadExtType ETy = getLoadExtType(N); 647 return ETy == ISD::EXTLOAD || ETy == ISD::ZEXTLOAD; 648}]>; 649def z_azextloadi8 : PatFrag<(ops node:$ptr), (z_azextload node:$ptr), [{ 650 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 651}]>; 652def z_azextloadi16 : PatFrag<(ops node:$ptr), (z_azextload node:$ptr), [{ 653 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 654}]>; 655def z_azextloadi32 : PatFrag<(ops node:$ptr), (z_azextload node:$ptr), [{ 656 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 657}]>; 658 659// Extending (atomic) loads in which the extension type doesn't matter. 660def z_anyextload : PatFrags<(ops node:$ptr), 661 [(unindexedload node:$ptr), 662 (atomic_load node:$ptr)], [{ 663 return getLoadExtType(N) != ISD::NON_EXTLOAD; 664}]>; 665def z_anyextloadi8 : PatFrag<(ops node:$ptr), (z_anyextload node:$ptr), [{ 666 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 667}]>; 668def z_anyextloadi16 : PatFrag<(ops node:$ptr), (z_anyextload node:$ptr), [{ 669 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 670}]>; 671def z_anyextloadi32 : PatFrag<(ops node:$ptr), (z_anyextload node:$ptr), [{ 672 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 673}]>; 674def z_anyextloadi64 : PatFrag<(ops node:$ptr), (z_anyextload node:$ptr), [{ 675 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i64; 676}]>; 677 678// Extending non-atomic loads in which the extension type doesn't matter. 679def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 680 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 681}]>; 682def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 683 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 684}]>; 685def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 686 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 687}]>; 688def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 689 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 690}]>; 691 692// Extending (atomic) loads that are not sign/zero extending. 693def z_extload : PatFrags<(ops node:$ptr), 694 [(extload node:$ptr), 695 (atomic_load node:$ptr)], [{ 696 return getLoadExtType(N) == ISD::EXTLOAD; 697}]>; 698def z_extloadi8 : PatFrag<(ops node:$ptr), (z_extload node:$ptr), [{ 699 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8; 700}]>; 701def z_extloadi16 : PatFrag<(ops node:$ptr), (z_extload node:$ptr), [{ 702 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16; 703}]>; 704def z_extloadi32 : PatFrag<(ops node:$ptr), (z_extload node:$ptr), [{ 705 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32; 706}]>; 707def z_extloadi64 : PatFrag<(ops node:$ptr), (z_extload node:$ptr), [{ 708 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i64; 709}]>; 710 711// Extending atomic FP loads. 712def z_any_extloadf32 : PatFrags<(ops node:$ptr), 713 [(any_extloadf32 node:$ptr), 714 (any_fpextend (f32 (atomic_load node:$ptr)))]>; 715def z_any_extloadf64 : PatFrags<(ops node:$ptr), 716 [(any_extloadf64 node:$ptr), 717 (any_fpextend (f64 (atomic_load node:$ptr)))]>; 718 719// Aligned loads. 720class AlignedLoad<SDPatternOperator load> 721 : PatFrag<(ops node:$addr), (load node:$addr), 722 [{ return storeLoadIsAligned(N); }]>; 723def aligned_z_load : AlignedLoad<z_load>; 724def aligned_z_asextloadi16 : AlignedLoad<z_asextloadi16>; 725def aligned_z_asextloadi32 : AlignedLoad<z_asextloadi32>; 726def aligned_z_azextloadi16 : AlignedLoad<z_azextloadi16>; 727def aligned_z_azextloadi32 : AlignedLoad<z_azextloadi32>; 728 729// Aligned stores. 730class AlignedStore<SDPatternOperator store> 731 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), 732 [{ return storeLoadIsAligned(N); }]>; 733def aligned_store : AlignedStore<store>; 734def aligned_truncstorei16 : AlignedStore<truncstorei16>; 735def aligned_truncstorei32 : AlignedStore<truncstorei32>; 736 737// Non-volatile loads. Used for instructions that might access the storage 738// location multiple times. 739class NonvolatileLoad<SDPatternOperator load> 740 : PatFrag<(ops node:$addr), (load node:$addr), [{ 741 auto *Load = cast<LoadSDNode>(N); 742 return !Load->isVolatile(); 743}]>; 744def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 745def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 746def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 747 748// Non-volatile stores. 749class NonvolatileStore<SDPatternOperator store> 750 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 751 auto *Store = cast<StoreSDNode>(N); 752 return !Store->isVolatile(); 753}]>; 754def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 755def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 756def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 757 758// A store of a load that can be implemented using MVC. 759def mvc_store : PatFrag<(ops node:$value, node:$addr), 760 (unindexedstore node:$value, node:$addr), 761 [{ return storeLoadCanUseMVC(N); }]>; 762 763// Binary read-modify-write operations on memory in which the other 764// operand is also memory and for which block operations like NC can 765// be used. There are two patterns for each operator, depending on 766// which operand contains the "other" load. 767multiclass block_op<SDPatternOperator operator> { 768 def "1" : PatFrag<(ops node:$value, node:$addr), 769 (unindexedstore (operator node:$value, 770 (unindexedload node:$addr)), 771 node:$addr), 772 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 773 def "2" : PatFrag<(ops node:$value, node:$addr), 774 (unindexedstore (operator (unindexedload node:$addr), 775 node:$value), 776 node:$addr), 777 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 778} 779defm block_and : block_op<and>; 780defm block_or : block_op<or>; 781defm block_xor : block_op<xor>; 782 783// Insertions. 784class insert_imm<int mask> : PatFrag<(ops node:$src1, node:$src2), 785 (or (and node:$src1, mask), node:$src2)>; 786 787def inserti8 : insert_imm<-256>; 788def insertll : insert_imm<0xffff0000>; 789def insertlh : insert_imm<0x0000ffff>; 790def insertll64 : insert_imm<0xffffffffffff0000>; 791def insertlh64 : insert_imm<0xffffffff0000ffff>; 792def inserthl64 : insert_imm<0xffff0000ffffffff>; 793def inserthh64 : insert_imm<0x0000ffffffffffff>; 794def insertlf : insert_imm<0xffffffff00000000>; 795def inserthf : insert_imm<0x00000000ffffffff>; 796 797// ORs that can be treated as insertions. 798def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 799 (or node:$src1, node:$src2), [{ 800 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 801 return CurDAG->MaskedValueIsZero(N->getOperand(0), 802 APInt::getLowBitsSet(BitWidth, 8)); 803}]>; 804 805// ORs that can be treated as reversed insertions. 806def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 807 (or node:$src1, node:$src2), [{ 808 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 809 return CurDAG->MaskedValueIsZero(N->getOperand(1), 810 APInt::getLowBitsSet(BitWidth, 8)); 811}]>; 812 813// Negative integer absolute. 814def z_inegabs : PatFrag<(ops node:$src), (ineg (abs node:$src))>; 815 816// Integer multiply-and-add 817def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 818 (add (mul node:$src1, node:$src2), node:$src3)>; 819 820// Alternatives to match operations with or without an overflow CC result. 821def z_sadd : PatFrags<(ops node:$src1, node:$src2), 822 [(z_saddo node:$src1, node:$src2), 823 (add node:$src1, node:$src2)]>; 824def z_uadd : PatFrags<(ops node:$src1, node:$src2), 825 [(z_uaddo node:$src1, node:$src2), 826 (add node:$src1, node:$src2)]>; 827def z_ssub : PatFrags<(ops node:$src1, node:$src2), 828 [(z_ssubo node:$src1, node:$src2), 829 (sub node:$src1, node:$src2)]>; 830def z_usub : PatFrags<(ops node:$src1, node:$src2), 831 [(z_usubo node:$src1, node:$src2), 832 (sub node:$src1, node:$src2)]>; 833 834// Combined logical operations. 835def andc : PatFrag<(ops node:$src1, node:$src2), 836 (and node:$src1, (not node:$src2))>; 837def orc : PatFrag<(ops node:$src1, node:$src2), 838 (or node:$src1, (not node:$src2))>; 839def nand : PatFrag<(ops node:$src1, node:$src2), 840 (not (and node:$src1, node:$src2))>; 841def nor : PatFrag<(ops node:$src1, node:$src2), 842 (not (or node:$src1, node:$src2))>; 843def nxor : PatFrag<(ops node:$src1, node:$src2), 844 (not (xor node:$src1, node:$src2))>; 845 846// Fused multiply-subtract, using the natural operand order. 847def any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 848 (any_fma node:$src1, node:$src2, (fneg node:$src3))>; 849 850// Fused multiply-add and multiply-subtract, but with the order of the 851// operands matching SystemZ's MA and MS instructions. 852def z_any_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 853 (any_fma node:$src2, node:$src3, node:$src1)>; 854def z_any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 855 (any_fma node:$src2, node:$src3, (fneg node:$src1))>; 856 857// Negative fused multiply-add and multiply-subtract. 858def any_fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 859 (fneg (any_fma node:$src1, node:$src2, node:$src3))>; 860def any_fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 861 (fneg (any_fms node:$src1, node:$src2, node:$src3))>; 862 863// Floating-point negative absolute. 864def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 865 866// Floating-point operations which will not participate in reassociation, and 867// therefore are candidates for reg/mem folding during isel. 868def z_any_fadd_noreassoc : PatFrag<(ops node:$src1, node:$src2), 869 (any_fadd node:$src1, node:$src2), 870 [{ return !shouldSelectForReassoc(N); }]>; 871def z_any_fsub_noreassoc : PatFrag<(ops node:$src1, node:$src2), 872 (any_fsub node:$src1, node:$src2), 873 [{ return !shouldSelectForReassoc(N); }]>; 874def z_any_fmul_noreassoc : PatFrag<(ops node:$src1, node:$src2), 875 (any_fmul node:$src1, node:$src2), 876 [{ return !shouldSelectForReassoc(N); }]>; 877 878// Strict floating-point fragments. 879def z_any_fcmp : PatFrags<(ops node:$lhs, node:$rhs), 880 [(z_strict_fcmp node:$lhs, node:$rhs), 881 (z_fcmp node:$lhs, node:$rhs)]>; 882def z_any_vfcmpe : PatFrags<(ops node:$lhs, node:$rhs), 883 [(z_strict_vfcmpe node:$lhs, node:$rhs), 884 (z_vfcmpe node:$lhs, node:$rhs)]>; 885def z_any_vfcmph : PatFrags<(ops node:$lhs, node:$rhs), 886 [(z_strict_vfcmph node:$lhs, node:$rhs), 887 (z_vfcmph node:$lhs, node:$rhs)]>; 888def z_any_vfcmphe : PatFrags<(ops node:$lhs, node:$rhs), 889 [(z_strict_vfcmphe node:$lhs, node:$rhs), 890 (z_vfcmphe node:$lhs, node:$rhs)]>; 891def z_any_vextend : PatFrags<(ops node:$src), 892 [(z_strict_vextend node:$src), 893 (z_vextend node:$src)]>; 894def z_any_vround : PatFrags<(ops node:$src), 895 [(z_strict_vround node:$src), 896 (z_vround node:$src)]>; 897 898// Create a unary operator that loads from memory and then performs 899// the given operation on it. 900class loadu<SDPatternOperator operator, SDPatternOperator load = z_load> 901 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 902 903// Create a store operator that performs the given unary operation 904// on the value before storing it. 905class storeu<SDPatternOperator operator, SDPatternOperator store = store> 906 : PatFrag<(ops node:$value, node:$addr), 907 (store (operator node:$value), node:$addr)>; 908 909// Create a store operator that performs the given inherent operation 910// and stores the resulting value. 911class storei<SDPatternOperator operator, SDPatternOperator store = store> 912 : PatFrag<(ops node:$addr), 913 (store (operator), node:$addr)>; 914 915// Create a shift operator that optionally ignores an AND of the 916// shift count with an immediate if the bottom 6 bits are all set. 917def imm32bottom6set : PatLeaf<(i32 imm), [{ 918 return (N->getZExtValue() & 0x3f) == 0x3f; 919}]>; 920class shiftop<SDPatternOperator operator> 921 : PatFrags<(ops node:$val, node:$count), 922 [(operator node:$val, node:$count), 923 (operator node:$val, (and node:$count, imm32bottom6set))]>; 924 925// Create a shift operator that optionally ignores an AND of the 926// shift count with an immediate if the bottom 7 bits are all set. 927def imm32bottom7set : PatLeaf<(i32 imm), [{ 928 return (N->getZExtValue() & 0x7f) == 0x7f; 929}]>; 930class vshiftop<SDPatternOperator operator> 931 : PatFrags<(ops node:$val, node:$count), 932 [(operator node:$val, node:$count), 933 (operator node:$val, (and node:$count, imm32bottom7set))]>; 934 935def imm32mod64 : PatLeaf<(i32 imm), [{ 936 return (N->getZExtValue() % 64 == 0); 937}]>; 938 939def imm32nobits : PatLeaf<(i32 imm), [{ 940 return (N->getZExtValue() & 0x07) == 0; 941}]>; 942def imm32nobytes : PatLeaf<(i32 imm), [{ 943 return (N->getZExtValue() & 0x78) == 0; 944}]>; 945 946// Load a scalar and replicate it in all elements of a vector. 947class z_replicate_load<ValueType scalartype, SDPatternOperator load> 948 : PatFrag<(ops node:$addr), 949 (z_replicate (scalartype (load node:$addr)))>; 950def z_replicate_loadi8 : z_replicate_load<i32, z_anyextloadi8>; 951def z_replicate_loadi16 : z_replicate_load<i32, z_anyextloadi16>; 952def z_replicate_loadi32 : z_replicate_load<i32, z_load>; 953def z_replicate_loadi64 : z_replicate_load<i64, z_load>; 954def z_replicate_loadf32 : z_replicate_load<f32, z_load>; 955def z_replicate_loadf64 : z_replicate_load<f64, z_load>; 956// Byte-swapped replicated vector element loads. 957def z_replicate_loadbswapi16 : z_replicate_load<i32, z_loadbswap16>; 958def z_replicate_loadbswapi32 : z_replicate_load<i32, z_loadbswap32>; 959def z_replicate_loadbswapi64 : z_replicate_load<i64, z_loadbswap64>; 960 961// Load a scalar and insert it into a single element of a vector. 962class z_vle<ValueType scalartype, SDPatternOperator load> 963 : PatFrag<(ops node:$vec, node:$addr, node:$index), 964 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 965 node:$index)>; 966def z_vlei8 : z_vle<i32, z_anyextloadi8>; 967def z_vlei16 : z_vle<i32, z_anyextloadi16>; 968def z_vlei32 : z_vle<i32, z_load>; 969def z_vlei64 : z_vle<i64, z_load>; 970def z_vlef32 : z_vle<f32, z_load>; 971def z_vlef64 : z_vle<f64, z_load>; 972// Byte-swapped vector element loads. 973def z_vlebri16 : z_vle<i32, z_loadbswap16>; 974def z_vlebri32 : z_vle<i32, z_loadbswap32>; 975def z_vlebri64 : z_vle<i64, z_loadbswap64>; 976 977// Load a scalar and insert it into the low element of the high i64 of a 978// zeroed vector. 979class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 980 : PatFrag<(ops node:$addr), 981 (z_vector_insert immAllZerosV, 982 (scalartype (load node:$addr)), (i32 index))>; 983def z_vllezi8 : z_vllez<i32, z_anyextloadi8, 7>; 984def z_vllezi16 : z_vllez<i32, z_anyextloadi16, 3>; 985def z_vllezi32 : z_vllez<i32, z_load, 1>; 986def z_vllezi64 : PatFrags<(ops node:$addr), 987 [(z_vector_insert immAllZerosV, 988 (i64 (z_load node:$addr)), (i32 0)), 989 (z_join_dwords (i64 (z_load node:$addr)), (i64 0))]>; 990// We use high merges to form a v4f32 from four f32s. Propagating zero 991// into all elements but index 1 gives this expression. 992def z_vllezf32 : PatFrag<(ops node:$addr), 993 (z_merge_high 994 (v2i64 995 (z_unpackl_high 996 (v4i32 997 (bitconvert 998 (v4f32 (scalar_to_vector 999 (f32 (z_load node:$addr)))))))), 1000 (v2i64 1001 (bitconvert (v4f32 immAllZerosV))))>; 1002def z_vllezf64 : PatFrag<(ops node:$addr), 1003 (z_merge_high 1004 (v2f64 (scalar_to_vector (f64 (z_load node:$addr)))), 1005 immAllZerosV)>; 1006 1007// Similarly for the high element of a zeroed vector. 1008def z_vllezli32 : z_vllez<i32, z_load, 0>; 1009def z_vllezlf32 : PatFrag<(ops node:$addr), 1010 (z_merge_high 1011 (v2i64 1012 (bitconvert 1013 (z_merge_high 1014 (v4f32 (scalar_to_vector 1015 (f32 (z_load node:$addr)))), 1016 (v4f32 immAllZerosV)))), 1017 (v2i64 1018 (bitconvert (v4f32 immAllZerosV))))>; 1019 1020// Byte-swapped variants. 1021def z_vllebrzi16 : z_vllez<i32, z_loadbswap16, 3>; 1022def z_vllebrzi32 : z_vllez<i32, z_loadbswap32, 1>; 1023def z_vllebrzli32 : z_vllez<i32, z_loadbswap32, 0>; 1024def z_vllebrzi64 : PatFrags<(ops node:$addr), 1025 [(z_vector_insert immAllZerosV, 1026 (i64 (z_loadbswap64 node:$addr)), 1027 (i32 0)), 1028 (z_join_dwords (i64 (z_loadbswap64 node:$addr)), 1029 (i64 0))]>; 1030 1031 1032// Store one element of a vector. 1033class z_vste<ValueType scalartype, SDPatternOperator store> 1034 : PatFrag<(ops node:$vec, node:$addr, node:$index), 1035 (store (scalartype (z_vector_extract node:$vec, node:$index)), 1036 node:$addr)>; 1037def z_vstei8 : z_vste<i32, truncstorei8>; 1038def z_vstei16 : z_vste<i32, truncstorei16>; 1039def z_vstei32 : z_vste<i32, store>; 1040def z_vstei64 : z_vste<i64, store>; 1041def z_vstef32 : z_vste<f32, store>; 1042def z_vstef64 : z_vste<f64, store>; 1043// Byte-swapped vector element stores. 1044def z_vstebri16 : z_vste<i32, z_storebswap16>; 1045def z_vstebri32 : z_vste<i32, z_storebswap32>; 1046def z_vstebri64 : z_vste<i64, z_storebswap64>; 1047 1048// Arithmetic negation on vectors. 1049def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>; 1050 1051// Bitwise negation on vectors. 1052def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>; 1053 1054// Signed "integer greater than zero" on vectors. 1055def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>; 1056 1057// Signed "integer less than zero" on vectors. 1058def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>; 1059 1060// Sign-extend the i64 elements of a vector. 1061class z_vse<int shift> 1062 : PatFrag<(ops node:$src), 1063 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 1064def z_vsei8 : z_vse<56>; 1065def z_vsei16 : z_vse<48>; 1066def z_vsei32 : z_vse<32>; 1067 1068// ...and again with the extensions being done on individual i64 scalars. 1069class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 1070 : PatFrag<(ops node:$src), 1071 (z_join_dwords 1072 (operator (z_vector_extract node:$src, index1)), 1073 (operator (z_vector_extract node:$src, index2)))>; 1074def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 1075def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 1076def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 1077