xref: /llvm-project/llvm/lib/Target/RISCV/RISCVCombine.td (revision 3cac26f5419b68d37e1919001e1c46a765df294f)
1//=- RISCVCombine.td - Define RISC-V Combine Rules -----------*- tablegen -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//
10//===----------------------------------------------------------------------===//
11
12include "llvm/Target/GlobalISel/Combine.td"
13
14def RISCVPreLegalizerCombiner: GICombiner<
15  "RISCVPreLegalizerCombinerImpl", [all_combines]> {
16}
17
18def RISCVO0PreLegalizerCombiner: GICombiner<
19  "RISCVO0PreLegalizerCombinerImpl", [optnone_combines]> {
20}
21
22// Post-legalization combines which are primarily optimizations.
23// TODO: Add more combines.
24def RISCVPostLegalizerCombiner
25    : GICombiner<"RISCVPostLegalizerCombinerImpl",
26                 [sub_to_add, combines_for_extload, redundant_and,
27                  identity_combines, shift_immed_chain,
28                  commute_constant_to_rhs, simplify_neg_minmax]> {
29}
30