1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC -----*- C++ -*-=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the PowerPC specific subclass of TargetMachine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef PPC_TARGETMACHINE_H 15 #define PPC_TARGETMACHINE_H 16 17 #include "PPCFrameInfo.h" 18 #include "PPCSubtarget.h" 19 #include "PPCJITInfo.h" 20 #include "PPCInstrInfo.h" 21 #include "PPCISelLowering.h" 22 #include "PPCSelectionDAGInfo.h" 23 #include "llvm/Target/TargetMachine.h" 24 #include "llvm/Target/TargetData.h" 25 26 namespace llvm { 27 class PassManager; 28 class GlobalValue; 29 30 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets. 31 /// 32 class PPCTargetMachine : public LLVMTargetMachine { 33 PPCSubtarget Subtarget; 34 const TargetData DataLayout; // Calculates type size & alignment 35 PPCInstrInfo InstrInfo; 36 PPCFrameInfo FrameInfo; 37 PPCJITInfo JITInfo; 38 PPCTargetLowering TLInfo; 39 PPCSelectionDAGInfo TSInfo; 40 InstrItineraryData InstrItins; 41 42 public: 43 PPCTargetMachine(const Target &T, const std::string &TT, 44 const std::string &FS, bool is64Bit); 45 46 virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; } 47 virtual const PPCFrameInfo *getFrameInfo() const { return &FrameInfo; } 48 virtual PPCJITInfo *getJITInfo() { return &JITInfo; } 49 virtual const PPCTargetLowering *getTargetLowering() const { 50 return &TLInfo; 51 } 52 virtual const PPCSelectionDAGInfo* getSelectionDAGInfo() const { 53 return &TSInfo; 54 } 55 virtual const PPCRegisterInfo *getRegisterInfo() const { 56 return &InstrInfo.getRegisterInfo(); 57 } 58 59 virtual const TargetData *getTargetData() const { return &DataLayout; } 60 virtual const PPCSubtarget *getSubtargetImpl() const { return &Subtarget; } 61 virtual const InstrItineraryData getInstrItineraryData() const { 62 return InstrItins; 63 } 64 65 // Pass Pipeline Configuration 66 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel); 67 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel); 68 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, 69 JITCodeEmitter &JCE); 70 virtual bool getEnableTailMergeDefault() const; 71 }; 72 73 /// PPC32TargetMachine - PowerPC 32-bit target machine. 74 /// 75 class PPC32TargetMachine : public PPCTargetMachine { 76 public: 77 PPC32TargetMachine(const Target &T, const std::string &TT, 78 const std::string &FS); 79 }; 80 81 /// PPC64TargetMachine - PowerPC 64-bit target machine. 82 /// 83 class PPC64TargetMachine : public PPCTargetMachine { 84 public: 85 PPC64TargetMachine(const Target &T, const std::string &TT, 86 const std::string &FS); 87 }; 88 89 } // end namespace llvm 90 91 #endif 92