xref: /llvm-project/llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp (revision 2c7ece2e8cf58d607f870ca9f02302df8aaa75d4)
1 //=== LoongArchDeadRegisterDefinitions.cpp - Replace dead defs w/ zero reg ===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===---------------------------------------------------------------------===//
8 //
9 // This pass rewrites Rd to r0 for instrs whose return values are unused.
10 //
11 //===---------------------------------------------------------------------===//
12 
13 #include "LoongArch.h"
14 #include "LoongArchSubtarget.h"
15 #include "llvm/ADT/Statistic.h"
16 #include "llvm/CodeGen/LiveDebugVariables.h"
17 #include "llvm/CodeGen/LiveIntervals.h"
18 #include "llvm/CodeGen/LiveStacks.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 
21 using namespace llvm;
22 #define DEBUG_TYPE "loongarch-dead-defs"
23 #define LoongArch_DEAD_REG_DEF_NAME "LoongArch Dead register definitions"
24 
25 STATISTIC(NumDeadDefsReplaced, "Number of dead definitions replaced");
26 
27 namespace {
28 class LoongArchDeadRegisterDefinitions : public MachineFunctionPass {
29 public:
30   static char ID;
31 
32   LoongArchDeadRegisterDefinitions() : MachineFunctionPass(ID) {}
33   bool runOnMachineFunction(MachineFunction &MF) override;
34   void getAnalysisUsage(AnalysisUsage &AU) const override {
35     AU.setPreservesCFG();
36     AU.addRequired<LiveIntervalsWrapperPass>();
37     AU.addPreserved<LiveIntervalsWrapperPass>();
38     AU.addRequired<LiveIntervalsWrapperPass>();
39     AU.addPreserved<SlotIndexesWrapperPass>();
40     AU.addPreserved<LiveDebugVariablesWrapperLegacy>();
41     AU.addPreserved<LiveStacksWrapperLegacy>();
42     MachineFunctionPass::getAnalysisUsage(AU);
43   }
44 
45   StringRef getPassName() const override { return LoongArch_DEAD_REG_DEF_NAME; }
46 };
47 } // end anonymous namespace
48 
49 char LoongArchDeadRegisterDefinitions::ID = 0;
50 INITIALIZE_PASS(LoongArchDeadRegisterDefinitions, DEBUG_TYPE,
51                 LoongArch_DEAD_REG_DEF_NAME, false, false)
52 
53 FunctionPass *llvm::createLoongArchDeadRegisterDefinitionsPass() {
54   return new LoongArchDeadRegisterDefinitions();
55 }
56 
57 bool LoongArchDeadRegisterDefinitions::runOnMachineFunction(
58     MachineFunction &MF) {
59   if (skipFunction(MF.getFunction()))
60     return false;
61 
62   const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
63   const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
64   LiveIntervals &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS();
65   LLVM_DEBUG(dbgs() << "***** LoongArchDeadRegisterDefinitions *****\n");
66 
67   bool MadeChange = false;
68   for (MachineBasicBlock &MBB : MF) {
69     for (MachineInstr &MI : MBB) {
70       // We only handle non-computational instructions.
71       const MCInstrDesc &Desc = MI.getDesc();
72       if (!Desc.mayLoad() && !Desc.mayStore() &&
73           !Desc.hasUnmodeledSideEffects())
74         continue;
75       for (int I = 0, E = Desc.getNumDefs(); I != E; ++I) {
76         MachineOperand &MO = MI.getOperand(I);
77         if (!MO.isReg() || !MO.isDef() || MO.isEarlyClobber())
78           continue;
79         // Be careful not to change the register if it's a tied operand.
80         if (MI.isRegTiedToUseOperand(I)) {
81           LLVM_DEBUG(dbgs() << "    Ignoring, def is tied operand.\n");
82           continue;
83         }
84         Register Reg = MO.getReg();
85         if (!Reg.isVirtual() || !MO.isDead())
86           continue;
87         LLVM_DEBUG(dbgs() << "    Dead def operand #" << I << " in:\n      ";
88                    MI.print(dbgs()));
89         const TargetRegisterClass *RC = TII->getRegClass(Desc, I, TRI, MF);
90         if (!(RC && RC->contains(LoongArch::R0))) {
91           LLVM_DEBUG(dbgs() << "    Ignoring, register is not a GPR.\n");
92           continue;
93         }
94         assert(LIS.hasInterval(Reg));
95         LIS.removeInterval(Reg);
96         MO.setReg(LoongArch::R0);
97         LLVM_DEBUG(dbgs() << "    Replacing with zero register. New:\n      ";
98                    MI.print(dbgs()));
99         ++NumDeadDefsReplaced;
100         MadeChange = true;
101       }
102     }
103   }
104 
105   return MadeChange;
106 }
107