1//- DXIL.td - Describe DXIL operation -------------------------*- tablegen -*-// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8/// 9/// \file 10/// This is a target description file for DXIL operations. 11/// 12//===----------------------------------------------------------------------===// 13 14include "llvm/IR/Intrinsics.td" 15 16// Abstract class to represent major and minor version values 17class Version<int major, int minor> { 18 int Major = major; 19 int Minor = minor; 20} 21 22// Valid DXIL Version records 23foreach i = 0...8 in { 24 def DXIL1_ #i : Version<1, i>; 25} 26 27class DXILOpParamType { 28 int isOverload = 0; 29} 30 31let isOverload = 1 in { 32 def OverloadTy : DXILOpParamType; 33} 34def VoidTy : DXILOpParamType; 35def Int1Ty : DXILOpParamType; 36def Int8Ty : DXILOpParamType; 37def Int16Ty : DXILOpParamType; 38def Int32Ty : DXILOpParamType; 39def Int64Ty : DXILOpParamType; 40def HalfTy : DXILOpParamType; 41def FloatTy : DXILOpParamType; 42def DoubleTy : DXILOpParamType; 43def ResRetHalfTy : DXILOpParamType; 44def ResRetFloatTy : DXILOpParamType; 45def ResRetDoubleTy : DXILOpParamType; 46def ResRetInt16Ty : DXILOpParamType; 47def ResRetInt32Ty : DXILOpParamType; 48def ResRetInt64Ty : DXILOpParamType; 49def HandleTy : DXILOpParamType; 50def ResBindTy : DXILOpParamType; 51def ResPropsTy : DXILOpParamType; 52def SplitDoubleTy : DXILOpParamType; 53 54class DXILOpClass; 55 56defset list<DXILOpClass> OpClasses = { 57 def acceptHitAndEndSearch : DXILOpClass; 58 def allocateNodeOutputRecords : DXILOpClass; 59 def allocateRayQuery : DXILOpClass; 60 def annotateHandle : DXILOpClass; 61 def annotateNodeHandle : DXILOpClass; 62 def annotateNodeRecordHandle : DXILOpClass; 63 def atomicBinOp : DXILOpClass; 64 def atomicCompareExchange : DXILOpClass; 65 def attributeAtVertex : DXILOpClass; 66 def barrier : DXILOpClass; 67 def barrierByMemoryHandle : DXILOpClass; 68 def barrierByMemoryType : DXILOpClass; 69 def barrierByNodeRecordHandle : DXILOpClass; 70 def binary : DXILOpClass; 71 def binaryWithCarryOrBorrow : DXILOpClass; 72 def binaryWithTwoOuts : DXILOpClass; 73 def bitcastF16toI16 : DXILOpClass; 74 def bitcastF32toI32 : DXILOpClass; 75 def bitcastF64toI64 : DXILOpClass; 76 def bitcastI16toF16 : DXILOpClass; 77 def bitcastI32toF32 : DXILOpClass; 78 def bitcastI64toF64 : DXILOpClass; 79 def bufferLoad : DXILOpClass; 80 def bufferStore : DXILOpClass; 81 def bufferUpdateCounter : DXILOpClass; 82 def calculateLOD : DXILOpClass; 83 def callShader : DXILOpClass; 84 def cbufferLoad : DXILOpClass; 85 def cbufferLoadLegacy : DXILOpClass; 86 def checkAccessFullyMapped : DXILOpClass; 87 def coverage : DXILOpClass; 88 def createHandle : DXILOpClass; 89 def createHandleForLib : DXILOpClass; 90 def createHandleFromBinding : DXILOpClass; 91 def createHandleFromHeap : DXILOpClass; 92 def createNodeInputRecordHandle : DXILOpClass; 93 def createNodeOutputHandle : DXILOpClass; 94 def cutStream : DXILOpClass; 95 def cycleCounterLegacy : DXILOpClass; 96 def discard : DXILOpClass; 97 def dispatchMesh : DXILOpClass; 98 def dispatchRaysDimensions : DXILOpClass; 99 def dispatchRaysIndex : DXILOpClass; 100 def domainLocation : DXILOpClass; 101 def dot2 : DXILOpClass; 102 def dot2AddHalf : DXILOpClass; 103 def dot3 : DXILOpClass; 104 def dot4 : DXILOpClass; 105 def dot4AddPacked : DXILOpClass; 106 def emitIndices : DXILOpClass; 107 def emitStream : DXILOpClass; 108 def emitThenCutStream : DXILOpClass; 109 def evalCentroid : DXILOpClass; 110 def evalSampleIndex : DXILOpClass; 111 def evalSnapped : DXILOpClass; 112 def finishedCrossGroupSharing : DXILOpClass; 113 def flattenedThreadIdInGroup : DXILOpClass; 114 def geometryIndex : DXILOpClass; 115 def getDimensions : DXILOpClass; 116 def getInputRecordCount : DXILOpClass; 117 def getMeshPayload : DXILOpClass; 118 def getNodeRecordPtr : DXILOpClass; 119 def getRemainingRecursionLevels : DXILOpClass; 120 def groupId : DXILOpClass; 121 def gsInstanceID : DXILOpClass; 122 def hitKind : DXILOpClass; 123 def ignoreHit : DXILOpClass; 124 def incrementOutputCount : DXILOpClass; 125 def indexNodeHandle : DXILOpClass; 126 def innerCoverage : DXILOpClass; 127 def instanceID : DXILOpClass; 128 def instanceIndex : DXILOpClass; 129 def isHelperLane : DXILOpClass; 130 def isSpecialFloat : DXILOpClass; 131 def legacyDoubleToFloat : DXILOpClass; 132 def legacyDoubleToSInt32 : DXILOpClass; 133 def legacyDoubleToUInt32 : DXILOpClass; 134 def legacyF16ToF32 : DXILOpClass; 135 def legacyF32ToF16 : DXILOpClass; 136 def loadInput : DXILOpClass; 137 def loadOutputControlPoint : DXILOpClass; 138 def loadPatchConstant : DXILOpClass; 139 def makeDouble : DXILOpClass; 140 def minPrecXRegLoad : DXILOpClass; 141 def minPrecXRegStore : DXILOpClass; 142 def nodeOutputIsValid : DXILOpClass; 143 def objectRayDirection : DXILOpClass; 144 def objectRayOrigin : DXILOpClass; 145 def objectToWorld : DXILOpClass; 146 def outputComplete : DXILOpClass; 147 def outputControlPointID : DXILOpClass; 148 def pack4x8 : DXILOpClass; 149 def primitiveID : DXILOpClass; 150 def primitiveIndex : DXILOpClass; 151 def quadOp : DXILOpClass; 152 def quadReadLaneAt : DXILOpClass; 153 def quadVote : DXILOpClass; 154 def quaternary : DXILOpClass; 155 def rawBufferLoad : DXILOpClass; 156 def rawBufferStore : DXILOpClass; 157 def rayFlags : DXILOpClass; 158 def rayQuery_Abort : DXILOpClass; 159 def rayQuery_CommitNonOpaqueTriangleHit : DXILOpClass; 160 def rayQuery_CommitProceduralPrimitiveHit : DXILOpClass; 161 def rayQuery_Proceed : DXILOpClass; 162 def rayQuery_StateMatrix : DXILOpClass; 163 def rayQuery_StateScalar : DXILOpClass; 164 def rayQuery_StateVector : DXILOpClass; 165 def rayQuery_TraceRayInline : DXILOpClass; 166 def rayTCurrent : DXILOpClass; 167 def rayTMin : DXILOpClass; 168 def renderTargetGetSampleCount : DXILOpClass; 169 def renderTargetGetSamplePosition : DXILOpClass; 170 def reportHit : DXILOpClass; 171 def sample : DXILOpClass; 172 def sampleBias : DXILOpClass; 173 def sampleCmp : DXILOpClass; 174 def sampleCmpBias : DXILOpClass; 175 def sampleCmpGrad : DXILOpClass; 176 def sampleCmpLevel : DXILOpClass; 177 def sampleCmpLevelZero : DXILOpClass; 178 def sampleGrad : DXILOpClass; 179 def sampleIndex : DXILOpClass; 180 def sampleLevel : DXILOpClass; 181 def setMeshOutputCounts : DXILOpClass; 182 def splitDouble : DXILOpClass; 183 def startInstanceLocation : DXILOpClass; 184 def startVertexLocation : DXILOpClass; 185 def storeOutput : DXILOpClass; 186 def storePatchConstant : DXILOpClass; 187 def storePrimitiveOutput : DXILOpClass; 188 def storeVertexOutput : DXILOpClass; 189 def tempRegLoad : DXILOpClass; 190 def tempRegStore : DXILOpClass; 191 def tertiary : DXILOpClass; 192 def texture2DMSGetSamplePosition : DXILOpClass; 193 def textureGather : DXILOpClass; 194 def textureGatherCmp : DXILOpClass; 195 def textureGatherRaw : DXILOpClass; 196 def textureLoad : DXILOpClass; 197 def textureStore : DXILOpClass; 198 def textureStoreSample : DXILOpClass; 199 def threadId : DXILOpClass; 200 def threadIdInGroup : DXILOpClass; 201 def traceRay : DXILOpClass; 202 def unary : DXILOpClass; 203 def unaryBits : DXILOpClass; 204 def unpack4x8 : DXILOpClass; 205 def viewID : DXILOpClass; 206 def waveActiveAllEqual : DXILOpClass; 207 def waveActiveBallot : DXILOpClass; 208 def waveActiveBit : DXILOpClass; 209 def waveActiveOp : DXILOpClass; 210 def waveAllOp : DXILOpClass; 211 def waveAllTrue : DXILOpClass; 212 def waveAnyTrue : DXILOpClass; 213 def waveGetLaneCount : DXILOpClass; 214 def waveGetLaneIndex : DXILOpClass; 215 def waveIsFirstLane : DXILOpClass; 216 def waveMatch : DXILOpClass; 217 def waveMatrix_Accumulate : DXILOpClass; 218 def waveMatrix_Annotate : DXILOpClass; 219 def waveMatrix_Depth : DXILOpClass; 220 def waveMatrix_Fill : DXILOpClass; 221 def waveMatrix_LoadGroupShared : DXILOpClass; 222 def waveMatrix_LoadRawBuf : DXILOpClass; 223 def waveMatrix_Multiply : DXILOpClass; 224 def waveMatrix_ScalarOp : DXILOpClass; 225 def waveMatrix_StoreGroupShared : DXILOpClass; 226 def waveMatrix_StoreRawBuf : DXILOpClass; 227 def waveMultiPrefixBitCount : DXILOpClass; 228 def waveMultiPrefixOp : DXILOpClass; 229 def wavePrefixOp : DXILOpClass; 230 def waveReadLaneAt : DXILOpClass; 231 def waveReadLaneFirst : DXILOpClass; 232 def worldRayDirection : DXILOpClass; 233 def worldRayOrigin : DXILOpClass; 234 def worldToObject : DXILOpClass; 235 def writeSamplerFeedback : DXILOpClass; 236 def writeSamplerFeedbackBias : DXILOpClass; 237 def writeSamplerFeedbackGrad : DXILOpClass; 238 def writeSamplerFeedbackLevel : DXILOpClass; 239 240 // This is a sentinel definition. Hence placed at the end here and 241 // not as part of the above alphabetically sorted valid definitions. 242 // It is never used to construct the name of DXIL Op call name. 243 // Additionally it is capitalized unlike all the others. 244 def UnknownOpClass : DXILOpClass; 245} 246 247class DXILShaderStage; 248 249def compute : DXILShaderStage; 250def domain : DXILShaderStage; 251def hull : DXILShaderStage; 252def pixel : DXILShaderStage; 253def vertex : DXILShaderStage; 254def geometry : DXILShaderStage; 255def library : DXILShaderStage; 256def amplification : DXILShaderStage; 257def mesh : DXILShaderStage; 258def node : DXILShaderStage; 259def raygeneration : DXILShaderStage; 260def intersection : DXILShaderStage; 261def anyhit : DXILShaderStage; 262def closesthit : DXILShaderStage; 263def callable : DXILShaderStage; 264def miss : DXILShaderStage; 265 266// Pseudo-stages 267// Denote DXIL Op to be supported in all stages 268def all_stages : DXILShaderStage; 269// Denote support for DXIL Op to have been removed 270def removed : DXILShaderStage; 271 272// DXIL Op attributes 273 274// A function attribute denotes that there is a corresponding LLVM function 275// attribute that will be set when building the DXIL op. The mapping is defined 276// by setDXILAttributes in DXILOpBuilder.cpp 277class DXILAttribute; 278 279def ReadNone : DXILAttribute; 280def ReadOnly : DXILAttribute; 281def NoDuplicate : DXILAttribute; 282def NoReturn : DXILAttribute; 283 284// A property is simply used to mark that a DXIL op belongs to a sub-group of 285// DXIL ops, and it is used to query if a particular op holds this property. 286// This is used for the static analysis of DXIL ops. 287class DXILProperty; 288 289def IsBarrier : DXILProperty; 290def IsGradient : DXILProperty; 291def IsFeedback : DXILProperty; 292def IsWave : DXILProperty; 293def RequiresUniformInputs : DXILProperty; 294 295class Overloads<Version ver, list<DXILOpParamType> ols> { 296 Version dxil_version = ver; 297 list<DXILOpParamType> overload_types = ols; 298} 299 300class Stages<Version ver, list<DXILShaderStage> st> { 301 Version dxil_version = ver; 302 list<DXILShaderStage> shader_stages = st; 303} 304 305class Attributes<Version ver = DXIL1_0, list<DXILAttribute> attrs> { 306 Version dxil_version = ver; 307 list<DXILAttribute> fn_attrs = attrs; 308} 309 310defvar BarrierMode_DeviceMemoryBarrier = 2; 311defvar BarrierMode_DeviceMemoryBarrierWithGroupSync = 3; 312defvar BarrierMode_GroupMemoryBarrier = 8; 313defvar BarrierMode_GroupMemoryBarrierWithGroupSync = 9; 314defvar BarrierMode_AllMemoryBarrier = 10; 315defvar BarrierMode_AllMemoryBarrierWithGroupSync = 11; 316 317defvar WaveOpKind_Sum = 0; 318defvar WaveOpKind_Product = 1; 319defvar WaveOpKind_Min = 2; 320defvar WaveOpKind_Max = 3; 321 322defvar SignedOpKind_Signed = 0; 323defvar SignedOpKind_Unsigned = 1; 324 325// Intrinsic arg selection 326class IntrinArgSelectType; 327def IntrinArgSelect_Index : IntrinArgSelectType; 328def IntrinArgSelect_I8 : IntrinArgSelectType; 329def IntrinArgSelect_I32 : IntrinArgSelectType; 330 331class IntrinArgSelect<IntrinArgSelectType type_, int value_> { 332 IntrinArgSelectType type = type_; 333 int value = value_; 334} 335 336class IntrinArgIndex<int index> : IntrinArgSelect<IntrinArgSelect_Index, index>; 337class IntrinArgI8<int value> : IntrinArgSelect<IntrinArgSelect_I8, value>; 338class IntrinArgI32<int value> : IntrinArgSelect<IntrinArgSelect_I32, value>; 339 340// Select which intrinsic to lower from for a DXILOp. 341// If the intrinsic is the only argument given to IntrinSelect, then the 342// arguments of the intrinsic will be copied in the same order. Example: 343// let intrinsics = [ 344// IntrinSelect<int_dx_my_intrinsic>, 345// IntrinSelect<int_dx_my_intrinsic2>, 346// ] 347//========================================================================================= 348// Using IntrinArgIndex<>, arguments of the intrinsic can be copied to the DXIL 349// OP in specific order: 350// let intrinsics = [ 351// IntrinSelect<int_dx_my_intrinsic, 352// [IntrinArgIndex<2>, IntrinArgIndex<1>, IntrinArgIndex<0>> ] 353// >, 354// ] 355//========================================================================================= 356// Using IntrinArgI8<> and IntrinArgI32<>, integer constants can be added 357// directly to the dxil op. This can be used in conjunction with 358// IntrinArgIndex: 359// let intrinsics = [ 360// IntrinSelect<int_dx_wave_active_usum, 361// [ IntrinArgIndex<0>, IntrinArgI8<0>, IntrinArgI8<1> ] 362// >, 363// IntrinSelect<int_dx_wave_reduce_sum, 364// [ IntrinArgIndex<0>, IntrinArgI8<0>, IntrinArgI8<0> ] 365// >, 366// ] 367// 368class IntrinSelect<Intrinsic intrinsic_, 369 list<IntrinArgSelect> arg_selects_ = []> { 370 Intrinsic intrinsic = intrinsic_; 371 list<IntrinArgSelect> arg_selects = arg_selects_; 372} 373 374// Abstraction DXIL Operation 375class DXILOp<int opcode, DXILOpClass opclass> { 376 // A short description of the operation 377 string Doc = ""; 378 379 // Opcode of DXIL Operation 380 int OpCode = opcode; 381 382 // Class of DXIL Operation. 383 DXILOpClass OpClass = opclass; 384 385 // LLVM Intrinsics DXIL Operation maps from 386 list<IntrinSelect> intrinsics = []; 387 388 // Result type of the op 389 DXILOpParamType result; 390 391 // List of argument types of the op. Default to 0 arguments. 392 list<DXILOpParamType> arguments = []; 393 394 // List of valid overload types predicated by DXIL version 395 list<Overloads> overloads = []; 396 397 // List of valid shader stages predicated by DXIL version 398 list<Stages> stages; 399 400 // Versioned attributes of operation 401 list<Attributes> attributes = []; 402 403 // List of properties. Default to no properties. 404 list<DXILProperty> properties = []; 405} 406 407// Concrete definitions of DXIL Operations 408// 409// This are sorted by ascending value of the DXIL Opcodes 410 411def Abs : DXILOp<6, unary> { 412 let Doc = "Returns the absolute value of the input."; 413 let intrinsics = [IntrinSelect<int_fabs>]; 414 let arguments = [OverloadTy]; 415 let result = OverloadTy; 416 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>]; 417 let stages = [Stages<DXIL1_0, [all_stages]>]; 418 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 419} 420 421def Saturate : DXILOp<7, unary> { 422 let Doc = "Clamps a single or double precision floating point value to " 423 "[0.0f...1.0f]."; 424 let intrinsics = [IntrinSelect<int_dx_saturate>]; 425 let arguments = [OverloadTy]; 426 let result = OverloadTy; 427 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>]; 428 let stages = [Stages<DXIL1_0, [all_stages]>]; 429 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 430} 431 432def IsInf : DXILOp<9, isSpecialFloat> { 433 let Doc = "Determines if the specified value is infinite."; 434 let intrinsics = [IntrinSelect<int_dx_isinf>]; 435 let arguments = [OverloadTy]; 436 let result = Int1Ty; 437 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 438 let stages = [Stages<DXIL1_0, [all_stages]>]; 439 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 440} 441 442def Cos : DXILOp<12, unary> { 443 let Doc = "Returns cosine(theta) for theta in radians."; 444 let intrinsics = [IntrinSelect<int_cos>]; 445 let arguments = [OverloadTy]; 446 let result = OverloadTy; 447 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 448 let stages = [Stages<DXIL1_0, [all_stages]>]; 449 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 450} 451 452def Sin : DXILOp<13, unary> { 453 let Doc = "Returns sine(theta) for theta in radians."; 454 let intrinsics = [IntrinSelect<int_sin>]; 455 let arguments = [OverloadTy]; 456 let result = OverloadTy; 457 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 458 let stages = [Stages<DXIL1_0, [all_stages]>]; 459 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 460} 461 462def Tan : DXILOp<14, unary> { 463 let Doc = "Returns tangent(theta) for theta in radians."; 464 let intrinsics = [IntrinSelect<int_tan>]; 465 let arguments = [OverloadTy]; 466 let result = OverloadTy; 467 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 468 let stages = [Stages<DXIL1_0, [all_stages]>]; 469 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 470} 471 472def ACos : DXILOp<15, unary> { 473 let Doc = "Returns the arccosine of the specified value."; 474 let intrinsics = [IntrinSelect<int_acos>]; 475 let arguments = [OverloadTy]; 476 let result = OverloadTy; 477 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 478 let stages = [Stages<DXIL1_0, [all_stages]>]; 479 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 480} 481 482def ASin : DXILOp<16, unary> { 483 let Doc = "Returns the arcsine of the specified value."; 484 let intrinsics = [IntrinSelect<int_asin>]; 485 let arguments = [OverloadTy]; 486 let result = OverloadTy; 487 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 488 let stages = [Stages<DXIL1_0, [all_stages]>]; 489 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 490} 491 492def ATan : DXILOp<17, unary> { 493 let Doc = "Returns the arctangent of the specified value."; 494 let intrinsics = [IntrinSelect<int_atan>]; 495 let arguments = [OverloadTy]; 496 let result = OverloadTy; 497 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 498 let stages = [Stages<DXIL1_0, [all_stages]>]; 499 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 500} 501 502def HCos : DXILOp<18, unary> { 503 let Doc = "Returns the hyperbolic cosine of the specified value."; 504 let intrinsics = [IntrinSelect<int_cosh>]; 505 let arguments = [OverloadTy]; 506 let result = OverloadTy; 507 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 508 let stages = [Stages<DXIL1_0, [all_stages]>]; 509 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 510} 511 512def HSin : DXILOp<19, unary> { 513 let Doc = "Returns the hyperbolic sine of the specified value."; 514 let intrinsics = [IntrinSelect<int_sinh>]; 515 let arguments = [OverloadTy]; 516 let result = OverloadTy; 517 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 518 let stages = [Stages<DXIL1_0, [all_stages]>]; 519 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 520} 521 522def HTan : DXILOp<20, unary> { 523 let Doc = "Returns the hyperbolic tan of the specified value."; 524 let intrinsics = [IntrinSelect<int_tanh>]; 525 let arguments = [OverloadTy]; 526 let result = OverloadTy; 527 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 528 let stages = [Stages<DXIL1_0, [all_stages]>]; 529 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 530} 531 532def Exp2 : DXILOp<21, unary> { 533 let Doc = "Returns the base 2 exponential, or 2**x, of the specified value. " 534 "exp2(x) = 2**x."; 535 let intrinsics = [IntrinSelect<int_exp2>]; 536 let arguments = [OverloadTy]; 537 let result = OverloadTy; 538 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 539 let stages = [Stages<DXIL1_0, [all_stages]>]; 540 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 541} 542 543def Frac : DXILOp<22, unary> { 544 let Doc = "Returns a fraction from 0 to 1 that represents the decimal part " 545 "of the input."; 546 let intrinsics = [IntrinSelect<int_dx_frac>]; 547 let arguments = [OverloadTy]; 548 let result = OverloadTy; 549 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 550 let stages = [Stages<DXIL1_0, [all_stages]>]; 551 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 552} 553 554def Log2 : DXILOp<23, unary> { 555 let Doc = "Returns the base-2 logarithm of the specified value."; 556 let intrinsics = [IntrinSelect<int_log2>]; 557 let arguments = [OverloadTy]; 558 let result = OverloadTy; 559 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 560 let stages = [Stages<DXIL1_0, [all_stages]>]; 561 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 562} 563 564def Sqrt : DXILOp<24, unary> { 565 let Doc = "Returns the square root of the specified floating-point value, " 566 "per component."; 567 let intrinsics = [IntrinSelect<int_sqrt>]; 568 let arguments = [OverloadTy]; 569 let result = OverloadTy; 570 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 571 let stages = [Stages<DXIL1_0, [all_stages]>]; 572 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 573} 574 575def RSqrt : DXILOp<25, unary> { 576 let Doc = "Returns the reciprocal of the square root of the specified value. " 577 "rsqrt(x) = 1 / sqrt(x)."; 578 let intrinsics = [IntrinSelect<int_dx_rsqrt>]; 579 let arguments = [OverloadTy]; 580 let result = OverloadTy; 581 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 582 let stages = [Stages<DXIL1_0, [all_stages]>]; 583 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 584} 585 586def Round : DXILOp<26, unary> { 587 let Doc = "Returns the input rounded to the nearest integer within a " 588 "floating-point type."; 589 let intrinsics = [IntrinSelect<int_roundeven>]; 590 let arguments = [OverloadTy]; 591 let result = OverloadTy; 592 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 593 let stages = [Stages<DXIL1_0, [all_stages]>]; 594 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 595} 596 597def Floor : DXILOp<27, unary> { 598 let Doc = 599 "Returns the largest integer that is less than or equal to the input."; 600 let intrinsics = [IntrinSelect<int_floor>]; 601 let arguments = [OverloadTy]; 602 let result = OverloadTy; 603 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 604 let stages = [Stages<DXIL1_0, [all_stages]>]; 605 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 606} 607 608def Ceil : DXILOp<28, unary> { 609 let Doc = "Returns the smallest integer that is greater than or equal to the " 610 "input."; 611 let intrinsics = [IntrinSelect<int_ceil>]; 612 let arguments = [OverloadTy]; 613 let result = OverloadTy; 614 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 615 let stages = [Stages<DXIL1_0, [all_stages]>]; 616 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 617} 618 619def Trunc : DXILOp<29, unary> { 620 let Doc = "Returns the specified value truncated to the integer component."; 621 let intrinsics = [IntrinSelect<int_trunc>]; 622 let arguments = [OverloadTy]; 623 let result = OverloadTy; 624 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 625 let stages = [Stages<DXIL1_0, [all_stages]>]; 626 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 627} 628 629def Rbits : DXILOp<30, unary> { 630 let Doc = "Returns the specified value with its bits reversed."; 631 let intrinsics = [IntrinSelect<int_bitreverse>]; 632 let arguments = [OverloadTy]; 633 let result = OverloadTy; 634 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 635 let stages = [Stages<DXIL1_0, [all_stages]>]; 636 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 637} 638 639def CountBits : DXILOp<31, unaryBits> { 640 let Doc = "Returns the number of 1 bits in the specified value."; 641 let arguments = [OverloadTy]; 642 let result = Int32Ty; 643 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 644 let stages = [Stages<DXIL1_0, [all_stages]>]; 645 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 646} 647 648def FirstbitLo : DXILOp<32, unaryBits> { 649 let Doc = "Returns the location of the first set bit starting from " 650 "the lowest order bit and working upward."; 651 let intrinsics = [IntrinSelect<int_dx_firstbitlow>]; 652 let arguments = [OverloadTy]; 653 let result = Int32Ty; 654 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 655 let stages = [Stages<DXIL1_0, [all_stages]>]; 656 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 657} 658 659def FirstbitHi : DXILOp<33, unaryBits> { 660 let Doc = "Returns the location of the first set bit starting from " 661 "the highest order bit and working downward."; 662 let intrinsics = [IntrinSelect<int_dx_firstbituhigh>]; 663 let arguments = [OverloadTy]; 664 let result = Int32Ty; 665 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 666 let stages = [Stages<DXIL1_0, [all_stages]>]; 667 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 668} 669 670def FirstbitSHi : DXILOp<34, unaryBits> { 671 let Doc = "Returns the location of the first set bit from " 672 "the highest order bit based on the sign."; 673 let intrinsics = [IntrinSelect<int_dx_firstbitshigh>]; 674 let arguments = [OverloadTy]; 675 let result = Int32Ty; 676 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 677 let stages = [Stages<DXIL1_0, [all_stages]>]; 678 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 679} 680 681def FMax : DXILOp<35, binary> { 682 let Doc = "Float maximum. FMax(a,b) = a > b ? a : b"; 683 let intrinsics = [IntrinSelect<int_maxnum>]; 684 let arguments = [OverloadTy, OverloadTy]; 685 let result = OverloadTy; 686 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>]; 687 let stages = [Stages<DXIL1_0, [all_stages]>]; 688 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 689} 690 691def FMin : DXILOp<36, binary> { 692 let Doc = "Float minimum. FMin(a,b) = a < b ? a : b"; 693 let intrinsics = [IntrinSelect<int_minnum>]; 694 let arguments = [OverloadTy, OverloadTy]; 695 let result = OverloadTy; 696 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>]; 697 let stages = [Stages<DXIL1_0, [all_stages]>]; 698 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 699} 700 701def SMax : DXILOp<37, binary> { 702 let Doc = "Signed integer maximum. SMax(a,b) = a > b ? a : b"; 703 let intrinsics = [IntrinSelect<int_smax>]; 704 let arguments = [OverloadTy, OverloadTy]; 705 let result = OverloadTy; 706 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 707 let stages = [Stages<DXIL1_0, [all_stages]>]; 708 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 709} 710 711def SMin : DXILOp<38, binary> { 712 let Doc = "Signed integer minimum. SMin(a,b) = a < b ? a : b"; 713 let intrinsics = [IntrinSelect<int_smin>]; 714 let arguments = [OverloadTy, OverloadTy]; 715 let result = OverloadTy; 716 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 717 let stages = [Stages<DXIL1_0, [all_stages]>]; 718 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 719} 720 721def UMax : DXILOp<39, binary> { 722 let Doc = "Unsigned integer maximum. UMax(a,b) = a > b ? a : b"; 723 let intrinsics = [IntrinSelect<int_umax>]; 724 let arguments = [OverloadTy, OverloadTy]; 725 let result = OverloadTy; 726 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 727 let stages = [Stages<DXIL1_0, [all_stages]>]; 728 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 729} 730 731def UMin : DXILOp<40, binary> { 732 let Doc = "Unsigned integer minimum. UMin(a,b) = a < b ? a : b"; 733 let intrinsics = [IntrinSelect<int_umin>]; 734 let arguments = [OverloadTy, OverloadTy]; 735 let result = OverloadTy; 736 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 737 let stages = [Stages<DXIL1_0, [all_stages]>]; 738 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 739} 740 741def FMad : DXILOp<46, tertiary> { 742 let Doc = "Floating point arithmetic multiply/add operation. fmad(m,a,b) = m " 743 "* a + b."; 744 let intrinsics = [IntrinSelect<int_fmuladd>]; 745 let arguments = [OverloadTy, OverloadTy, OverloadTy]; 746 let result = OverloadTy; 747 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>]; 748 let stages = [Stages<DXIL1_0, [all_stages]>]; 749 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 750} 751 752def IMad : DXILOp<48, tertiary> { 753 let Doc = "Signed integer arithmetic multiply/add operation. imad(m,a,b) = m " 754 "* a + b."; 755 let intrinsics = [IntrinSelect<int_dx_imad>]; 756 let arguments = [OverloadTy, OverloadTy, OverloadTy]; 757 let result = OverloadTy; 758 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 759 let stages = [Stages<DXIL1_0, [all_stages]>]; 760 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 761} 762 763def UMad : DXILOp<49, tertiary> { 764 let Doc = "Unsigned integer arithmetic multiply/add operation. umad(m,a, = m " 765 "* a + b."; 766 let intrinsics = [IntrinSelect<int_dx_umad>]; 767 let arguments = [OverloadTy, OverloadTy, OverloadTy]; 768 let result = OverloadTy; 769 let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>]; 770 let stages = [Stages<DXIL1_0, [all_stages]>]; 771 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 772} 773 774def Dot2 : DXILOp<54, dot2> { 775 let Doc = "dot product of two float vectors Dot(a,b) = a[0]*b[0] + ... + " 776 "a[n]*b[n] where n is 0 to 1 inclusive"; 777 let intrinsics = [IntrinSelect<int_dx_dot2>]; 778 let arguments = !listsplat(OverloadTy, 4); 779 let result = OverloadTy; 780 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 781 let stages = [Stages<DXIL1_0, [all_stages]>]; 782 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 783} 784 785def Dot3 : DXILOp<55, dot3> { 786 let Doc = "dot product of two float vectors Dot(a,b) = a[0]*b[0] + ... + " 787 "a[n]*b[n] where n is 0 to 2 inclusive"; 788 let intrinsics = [IntrinSelect<int_dx_dot3>]; 789 let arguments = !listsplat(OverloadTy, 6); 790 let result = OverloadTy; 791 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 792 let stages = [Stages<DXIL1_0, [all_stages]>]; 793 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 794} 795 796def Dot4 : DXILOp<56, dot4> { 797 let Doc = "dot product of two float vectors Dot(a,b) = a[0]*b[0] + ... + " 798 "a[n]*b[n] where n is 0 to 3 inclusive"; 799 let intrinsics = [IntrinSelect<int_dx_dot4>]; 800 let arguments = !listsplat(OverloadTy, 8); 801 let result = OverloadTy; 802 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>]; 803 let stages = [Stages<DXIL1_0, [all_stages]>]; 804 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 805} 806 807def CreateHandle : DXILOp<57, createHandle> { 808 let Doc = "creates the handle to a resource"; 809 // ResourceClass, RangeID, Index, NonUniform 810 let arguments = [Int8Ty, Int32Ty, Int32Ty, Int1Ty]; 811 let result = HandleTy; 812 let stages = [Stages<DXIL1_0, [all_stages]>, Stages<DXIL1_6, [removed]>]; 813 // NOTE: The ReadOnly attribute was set for consistency with DXC. However, it 814 // seems like ReadNone may more appropiately describe it. So noted to 815 // consider a change in the future 816 let attributes = [Attributes<DXIL1_0, [ReadOnly]>]; 817} 818 819def BufferLoad : DXILOp<68, bufferLoad> { 820 let Doc = "reads from a TypedBuffer"; 821 // Handle, Coord0, Coord1 822 let arguments = [HandleTy, Int32Ty, Int32Ty]; 823 let result = OverloadTy; 824 let overloads = 825 [Overloads<DXIL1_0, 826 [ResRetHalfTy, ResRetFloatTy, ResRetInt16Ty, ResRetInt32Ty]>]; 827 let stages = [Stages<DXIL1_0, [all_stages]>]; 828 let attributes = [Attributes<DXIL1_0, [ReadOnly]>]; 829} 830 831def BufferStore : DXILOp<69, bufferStore> { 832 let Doc = "writes to an RWTypedBuffer"; 833 // Handle, Coord0, Coord1, Val0, Val1, Val2, Val3, Mask 834 let arguments = [ 835 HandleTy, Int32Ty, Int32Ty, OverloadTy, OverloadTy, OverloadTy, OverloadTy, 836 Int8Ty 837 ]; 838 let result = VoidTy; 839 let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, Int16Ty, Int32Ty]>]; 840 let stages = [Stages<DXIL1_0, [all_stages]>]; 841} 842 843def UpdateCounter : DXILOp<70, bufferUpdateCounter> { 844 let Doc = "increments/decrements a buffer counter"; 845 let arguments = [HandleTy, Int8Ty]; 846 let result = Int32Ty; 847 let stages = [Stages<DXIL1_0, [all_stages]>]; 848} 849 850def CheckAccessFullyMapped : DXILOp<71, checkAccessFullyMapped> { 851 let Doc = "checks whether a Sample, Gather, or Load operation " 852 "accessed mapped tiles in a tiled resource"; 853 let arguments = [OverloadTy]; 854 let result = Int1Ty; 855 let overloads = [Overloads<DXIL1_0, [Int32Ty]>]; 856 let stages = [Stages<DXIL1_0, [all_stages]>]; 857 let attributes = [Attributes<DXIL1_0, [ReadOnly]>]; 858} 859 860def Barrier : DXILOp<80, barrier> { 861 let Doc = "inserts a memory barrier in the shader"; 862 let intrinsics = [ 863 IntrinSelect<int_dx_group_memory_barrier_with_group_sync, 864 [IntrinArgI32<BarrierMode_GroupMemoryBarrierWithGroupSync>]>, 865 ]; 866 867 let arguments = [Int32Ty]; 868 let result = VoidTy; 869 let stages = [Stages<DXIL1_0, [compute, library]>]; 870 let attributes = [Attributes<DXIL1_0, []>]; 871 let properties = [IsBarrier]; 872} 873 874def Discard : DXILOp<82, discard> { 875 let Doc = "discard the current pixel"; 876 let intrinsics = [IntrinSelect<int_dx_discard>]; 877 let arguments = [Int1Ty]; 878 let result = VoidTy; 879 let stages = [Stages<DXIL1_0, [pixel]>]; 880} 881 882def ThreadId : DXILOp<93, threadId> { 883 let Doc = "Reads the thread ID"; 884 let intrinsics = [IntrinSelect<int_dx_thread_id>]; 885 let arguments = [OverloadTy]; 886 let result = OverloadTy; 887 let overloads = [Overloads<DXIL1_0, [Int32Ty]>]; 888 let stages = [Stages<DXIL1_0, [compute, mesh, amplification, node]>]; 889 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 890} 891 892def GroupId : DXILOp<94, groupId> { 893 let Doc = "Reads the group ID (SV_GroupID)"; 894 let intrinsics = [IntrinSelect<int_dx_group_id>]; 895 let arguments = [OverloadTy]; 896 let result = OverloadTy; 897 let overloads = [Overloads<DXIL1_0, [Int32Ty]>]; 898 let stages = [Stages<DXIL1_0, [compute, mesh, amplification, node]>]; 899 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 900} 901 902def ThreadIdInGroup : DXILOp<95, threadIdInGroup> { 903 let Doc = "Reads the thread ID within the group (SV_GroupThreadID)"; 904 let intrinsics = [IntrinSelect<int_dx_thread_id_in_group>]; 905 let arguments = [OverloadTy]; 906 let result = OverloadTy; 907 let overloads = [Overloads<DXIL1_0, [Int32Ty]>]; 908 let stages = [Stages<DXIL1_0, [compute, mesh, amplification, node]>]; 909 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 910} 911 912def FlattenedThreadIdInGroup : DXILOp<96, flattenedThreadIdInGroup> { 913 let Doc = "Provides a flattened index for a given thread within a given " 914 "group (SV_GroupIndex)"; 915 let intrinsics = [IntrinSelect<int_dx_flattened_thread_id_in_group>]; 916 let result = OverloadTy; 917 let overloads = [Overloads<DXIL1_0, [Int32Ty]>]; 918 let stages = [Stages<DXIL1_0, [compute, mesh, amplification, node]>]; 919 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 920} 921 922def MakeDouble : DXILOp<101, makeDouble> { 923 let Doc = "creates a double value"; 924 let intrinsics = [IntrinSelect<int_dx_asdouble>]; 925 let arguments = [Int32Ty, Int32Ty]; 926 let result = DoubleTy; 927 let stages = [Stages<DXIL1_0, [all_stages]>]; 928 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 929} 930 931def SplitDouble : DXILOp<102, splitDouble> { 932 let Doc = "Splits a double into 2 uints"; 933 let arguments = [OverloadTy]; 934 let result = SplitDoubleTy; 935 let overloads = [Overloads<DXIL1_0, [DoubleTy]>]; 936 let stages = [Stages<DXIL1_0, [all_stages]>]; 937 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 938} 939 940def WaveIsFirstLane : DXILOp<110, waveIsFirstLane> { 941 let Doc = "returns 1 for the first lane in the wave"; 942 let intrinsics = [IntrinSelect<int_dx_wave_is_first_lane>]; 943 let arguments = []; 944 let result = Int1Ty; 945 let stages = [Stages<DXIL1_0, [all_stages]>]; 946 let properties = [IsWave]; 947} 948 949def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> { 950 let Doc = "returns the index of the current lane in the wave"; 951 let intrinsics = [IntrinSelect<int_dx_wave_getlaneindex>]; 952 let arguments = []; 953 let result = Int32Ty; 954 let stages = [Stages<DXIL1_0, [all_stages]>]; 955 let attributes = [Attributes<DXIL1_0, [ReadOnly]>]; 956 let properties = [IsWave]; 957} 958 959def WaveActiveAnyTrue : DXILOp<113, waveAnyTrue> { 960 let Doc = "returns true if the expression is true in any of the active lanes " 961 "in the current wave"; 962 let intrinsics = [IntrinSelect<int_dx_wave_any>]; 963 let arguments = [Int1Ty]; 964 let result = Int1Ty; 965 let stages = [Stages<DXIL1_0, [all_stages]>]; 966 let properties = [IsWave]; 967} 968 969def WaveActiveAllTrue : DXILOp<114, waveAllTrue> { 970 let Doc = "returns true if the expression is true in all of the active lanes " 971 "in the current wave"; 972 let intrinsics = [IntrinSelect<int_dx_wave_all>]; 973 let arguments = [Int1Ty]; 974 let result = Int1Ty; 975 let stages = [Stages<DXIL1_0, [all_stages]>]; 976 let properties = [IsWave]; 977} 978 979def WaveReadLaneAt : DXILOp<117, waveReadLaneAt> { 980 let Doc = "returns the value from the specified lane"; 981 let intrinsics = [IntrinSelect<int_dx_wave_readlane>]; 982 let arguments = [OverloadTy, Int32Ty]; 983 let result = OverloadTy; 984 let overloads = [Overloads< 985 DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int1Ty, Int16Ty, Int32Ty, Int64Ty]>]; 986 let stages = [Stages<DXIL1_0, [all_stages]>]; 987 let properties = [IsWave]; 988} 989 990def WaveActiveOp : DXILOp<119, waveActiveOp> { 991 let Doc = "returns the result of the operation across waves"; 992 let intrinsics = [ 993 IntrinSelect<int_dx_wave_reduce_sum, 994 [ 995 IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>, 996 IntrinArgI8<SignedOpKind_Signed> 997 ]>, 998 IntrinSelect<int_dx_wave_reduce_usum, 999 [ 1000 IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>, 1001 IntrinArgI8<SignedOpKind_Unsigned> 1002 ]>, 1003 IntrinSelect<int_dx_wave_reduce_max, 1004 [ 1005 IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Max>, 1006 IntrinArgI8<SignedOpKind_Signed> 1007 ]>, 1008 IntrinSelect<int_dx_wave_reduce_umax, 1009 [ 1010 IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Max>, 1011 IntrinArgI8<SignedOpKind_Unsigned> 1012 ]>, 1013 ]; 1014 1015 let arguments = [OverloadTy, Int8Ty, Int8Ty]; 1016 let result = OverloadTy; 1017 let overloads = [ 1018 Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int16Ty, Int32Ty, Int64Ty]> 1019 ]; 1020 let stages = [Stages<DXIL1_0, [all_stages]>]; 1021 let attributes = [Attributes<DXIL1_0, []>]; 1022} 1023 1024def WaveAllBitCount : DXILOp<135, waveAllOp> { 1025 let Doc = "returns the count of bits set to 1 across the wave"; 1026 let intrinsics = [IntrinSelect<int_dx_wave_active_countbits>]; 1027 let arguments = [Int1Ty]; 1028 let result = Int32Ty; 1029 let stages = [Stages<DXIL1_0, [all_stages]>]; 1030 let properties = [IsWave]; 1031} 1032 1033def RawBufferLoad : DXILOp<139, rawBufferLoad> { 1034 let Doc = "reads from a raw buffer and structured buffer"; 1035 // Handle, Coord0, Coord1, Mask, Alignment 1036 let arguments = [HandleTy, Int32Ty, Int32Ty, Int8Ty, Int32Ty]; 1037 let result = OverloadTy; 1038 let overloads = [ 1039 Overloads<DXIL1_2, 1040 [ResRetHalfTy, ResRetFloatTy, ResRetInt16Ty, ResRetInt32Ty]>, 1041 Overloads<DXIL1_3, 1042 [ 1043 ResRetHalfTy, ResRetFloatTy, ResRetDoubleTy, ResRetInt16Ty, 1044 ResRetInt32Ty, ResRetInt64Ty 1045 ]> 1046 ]; 1047 let stages = [Stages<DXIL1_2, [all_stages]>]; 1048} 1049 1050def RawBufferStore : DXILOp<140, rawBufferStore> { 1051 let Doc = "writes to a RWByteAddressBuffer or RWStructuredBuffer"; 1052 // Handle, Coord0, Coord1, Val0, Val1, Val2, Val3, Mask, Alignment 1053 let arguments = [ 1054 HandleTy, Int32Ty, Int32Ty, OverloadTy, OverloadTy, OverloadTy, OverloadTy, 1055 Int8Ty, Int32Ty 1056 ]; 1057 let result = VoidTy; 1058 let overloads = [ 1059 Overloads<DXIL1_2, 1060 [ResRetHalfTy, ResRetFloatTy, ResRetInt16Ty, ResRetInt32Ty]>, 1061 Overloads<DXIL1_3, 1062 [ 1063 ResRetHalfTy, ResRetFloatTy, ResRetDoubleTy, ResRetInt16Ty, 1064 ResRetInt32Ty, ResRetInt64Ty 1065 ]> 1066 ]; 1067 let stages = [Stages<DXIL1_2, [all_stages]>]; 1068} 1069 1070def Dot4AddI8Packed : DXILOp<163, dot4AddPacked> { 1071 let Doc = "signed dot product of 4 x i8 vectors packed into i32, with " 1072 "accumulate to i32"; 1073 let intrinsics = [IntrinSelect<int_dx_dot4add_i8packed>]; 1074 let arguments = [Int32Ty, Int32Ty, Int32Ty]; 1075 let result = Int32Ty; 1076 let stages = [Stages<DXIL1_0, [all_stages]>]; 1077 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 1078} 1079 1080def Dot4AddU8Packed : DXILOp<164, dot4AddPacked> { 1081 let Doc = "unsigned dot product of 4 x i8 vectors packed into i32, with " 1082 "accumulate to i32"; 1083 let intrinsics = [IntrinSelect<int_dx_dot4add_u8packed>]; 1084 let arguments = [Int32Ty, Int32Ty, Int32Ty]; 1085 let result = Int32Ty; 1086 let stages = [Stages<DXIL1_0, [all_stages]>]; 1087 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 1088} 1089 1090def AnnotateHandle : DXILOp<216, annotateHandle> { 1091 let Doc = "annotate handle with resource properties"; 1092 let arguments = [HandleTy, ResPropsTy]; 1093 let result = HandleTy; 1094 let stages = [Stages<DXIL1_6, [all_stages]>]; 1095 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 1096} 1097 1098def CreateHandleFromBinding : DXILOp<217, createHandleFromBinding> { 1099 let Doc = "create resource handle from binding"; 1100 let arguments = [ResBindTy, Int32Ty, Int1Ty]; 1101 let result = HandleTy; 1102 let stages = [Stages<DXIL1_6, [all_stages]>]; 1103 let attributes = [Attributes<DXIL1_0, [ReadNone]>]; 1104} 1105