1 //===- ARCTargetMachine.cpp - Define TargetMachine for ARC ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // 10 //===----------------------------------------------------------------------===// 11 12 #include "ARCTargetMachine.h" 13 #include "ARC.h" 14 #include "ARCMachineFunctionInfo.h" 15 #include "ARCTargetTransformInfo.h" 16 #include "TargetInfo/ARCTargetInfo.h" 17 #include "llvm/CodeGen/Passes.h" 18 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 19 #include "llvm/CodeGen/TargetPassConfig.h" 20 #include "llvm/MC/TargetRegistry.h" 21 #include <optional> 22 23 using namespace llvm; 24 25 static Reloc::Model getRelocModel(std::optional<Reloc::Model> RM) { 26 return RM.value_or(Reloc::Static); 27 } 28 29 /// ARCTargetMachine ctor - Create an ILP32 architecture model 30 ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT, 31 StringRef CPU, StringRef FS, 32 const TargetOptions &Options, 33 std::optional<Reloc::Model> RM, 34 std::optional<CodeModel::Model> CM, 35 CodeGenOptLevel OL, bool JIT) 36 : CodeGenTargetMachineImpl( 37 T, 38 "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 39 "f32:32:32-i64:32-f64:32-a:0:32-n32", 40 TT, CPU, FS, Options, getRelocModel(RM), 41 getEffectiveCodeModel(CM, CodeModel::Small), OL), 42 TLOF(std::make_unique<TargetLoweringObjectFileELF>()), 43 Subtarget(TT, std::string(CPU), std::string(FS), *this) { 44 initAsmInfo(); 45 } 46 47 ARCTargetMachine::~ARCTargetMachine() = default; 48 49 namespace { 50 51 /// ARC Code Generator Pass Configuration Options. 52 class ARCPassConfig : public TargetPassConfig { 53 public: 54 ARCPassConfig(ARCTargetMachine &TM, PassManagerBase &PM) 55 : TargetPassConfig(TM, PM) {} 56 57 ARCTargetMachine &getARCTargetMachine() const { 58 return getTM<ARCTargetMachine>(); 59 } 60 61 void addIRPasses() override; 62 bool addInstSelector() override; 63 void addPreEmitPass() override; 64 void addPreRegAlloc() override; 65 }; 66 67 } // end anonymous namespace 68 69 TargetPassConfig *ARCTargetMachine::createPassConfig(PassManagerBase &PM) { 70 return new ARCPassConfig(*this, PM); 71 } 72 73 void ARCPassConfig::addIRPasses() { 74 addPass(createAtomicExpandLegacyPass()); 75 76 TargetPassConfig::addIRPasses(); 77 } 78 79 bool ARCPassConfig::addInstSelector() { 80 addPass(createARCISelDag(getARCTargetMachine(), getOptLevel())); 81 return false; 82 } 83 84 void ARCPassConfig::addPreEmitPass() { addPass(createARCBranchFinalizePass()); } 85 86 void ARCPassConfig::addPreRegAlloc() { 87 addPass(createARCExpandPseudosPass()); 88 addPass(createARCOptAddrMode()); 89 } 90 91 MachineFunctionInfo *ARCTargetMachine::createMachineFunctionInfo( 92 BumpPtrAllocator &Allocator, const Function &F, 93 const TargetSubtargetInfo *STI) const { 94 return ARCFunctionInfo::create<ARCFunctionInfo>(Allocator, F, STI); 95 } 96 97 // Force static initialization. 98 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTarget() { 99 RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget()); 100 PassRegistry &PR = *PassRegistry::getPassRegistry(); 101 initializeARCDAGToDAGISelLegacyPass(PR); 102 } 103 104 TargetTransformInfo 105 ARCTargetMachine::getTargetTransformInfo(const Function &F) const { 106 return TargetTransformInfo(ARCTTIImpl(this, F)); 107 } 108