xref: /llvm-project/llvm/lib/Target/AMDGPU/CMakeLists.txt (revision 0ee037b861f94604907d95d0ff0ff87805b52428) 
1add_llvm_component_group(AMDGPU)
2
3set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
4
5tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
6tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
7tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
8tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
9tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
10tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
11tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
12tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
13tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
14tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
15tablegen(LLVM AMDGPUGenSearchableTables.inc -gen-searchable-tables)
16tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
17
18set(LLVM_TARGET_DEFINITIONS AMDGPUGISel.td)
19tablegen(LLVM AMDGPUGenGlobalISel.inc -gen-global-isel)
20tablegen(LLVM AMDGPUGenPreLegalizeGICombiner.inc -gen-global-isel-combiner
21              -combiners="AMDGPUPreLegalizerCombiner")
22tablegen(LLVM AMDGPUGenPostLegalizeGICombiner.inc -gen-global-isel-combiner
23              -combiners="AMDGPUPostLegalizerCombiner")
24tablegen(LLVM AMDGPUGenRegBankGICombiner.inc -gen-global-isel-combiner
25              -combiners="AMDGPURegBankCombiner")
26
27set(LLVM_TARGET_DEFINITIONS R600.td)
28tablegen(LLVM R600GenAsmWriter.inc -gen-asm-writer)
29tablegen(LLVM R600GenCallingConv.inc -gen-callingconv)
30tablegen(LLVM R600GenDAGISel.inc -gen-dag-isel)
31tablegen(LLVM R600GenDFAPacketizer.inc -gen-dfa-packetizer)
32tablegen(LLVM R600GenInstrInfo.inc -gen-instr-info)
33tablegen(LLVM R600GenMCCodeEmitter.inc -gen-emitter)
34tablegen(LLVM R600GenRegisterInfo.inc -gen-register-info)
35tablegen(LLVM R600GenSubtargetInfo.inc -gen-subtarget)
36
37add_public_tablegen_target(AMDGPUCommonTableGen)
38
39set(LLVM_TARGET_DEFINITIONS InstCombineTables.td)
40tablegen(LLVM InstCombineTables.inc -gen-searchable-tables)
41add_public_tablegen_target(InstCombineTableGen)
42
43add_llvm_target(AMDGPUCodeGen
44  AMDGPUAliasAnalysis.cpp
45  AMDGPUAlwaysInlinePass.cpp
46  AMDGPUAnnotateKernelFeatures.cpp
47  AMDGPUAnnotateUniformValues.cpp
48  AMDGPUArgumentUsageInfo.cpp
49  AMDGPUAsanInstrumentation.cpp
50  AMDGPUAsmPrinter.cpp
51  AMDGPUAtomicOptimizer.cpp
52  AMDGPUAttributor.cpp
53  AMDGPUCallLowering.cpp
54  AMDGPUCodeGenPrepare.cpp
55  AMDGPUCombinerHelper.cpp
56  AMDGPUCtorDtorLowering.cpp
57  AMDGPUExportClustering.cpp
58  AMDGPUFrameLowering.cpp
59  AMDGPUGlobalISelDivergenceLowering.cpp
60  AMDGPUGlobalISelUtils.cpp
61  AMDGPUHSAMetadataStreamer.cpp
62  AMDGPUInsertDelayAlu.cpp
63  AMDGPUInstCombineIntrinsic.cpp
64  AMDGPUInstrInfo.cpp
65  AMDGPUInstructionSelector.cpp
66  AMDGPUISelDAGToDAG.cpp
67  AMDGPUISelLowering.cpp
68  AMDGPULateCodeGenPrepare.cpp
69  AMDGPULegalizerInfo.cpp
70  AMDGPULibCalls.cpp
71  AMDGPUImageIntrinsicOptimizer.cpp
72  AMDGPULibFunc.cpp
73  AMDGPULowerBufferFatPointers.cpp
74  AMDGPULowerKernelArguments.cpp
75  AMDGPULowerKernelAttributes.cpp
76  AMDGPULowerModuleLDSPass.cpp
77  AMDGPUSwLowerLDS.cpp
78  AMDGPUMachineFunction.cpp
79  AMDGPUMachineModuleInfo.cpp
80  AMDGPUMacroFusion.cpp
81  AMDGPUMCInstLower.cpp
82  AMDGPUMemoryUtils.cpp
83  AMDGPUIGroupLP.cpp
84  AMDGPUMCResourceInfo.cpp
85  AMDGPUMarkLastScratchLoad.cpp
86  AMDGPUMIRFormatter.cpp
87  AMDGPUOpenCLEnqueuedBlockLowering.cpp
88  AMDGPUPerfHintAnalysis.cpp
89  AMDGPUPostLegalizerCombiner.cpp
90  AMDGPUPreLegalizerCombiner.cpp
91  AMDGPUPreloadKernArgProlog.cpp
92  AMDGPUPrintfRuntimeBinding.cpp
93  AMDGPUPromoteAlloca.cpp
94  AMDGPUPromoteKernelArguments.cpp
95  AMDGPURegBankCombiner.cpp
96  AMDGPURegBankLegalize.cpp
97  AMDGPURegBankLegalizeHelper.cpp
98  AMDGPURegBankLegalizeRules.cpp
99  AMDGPURegBankSelect.cpp
100  AMDGPURegisterBankInfo.cpp
101  AMDGPURemoveIncompatibleFunctions.cpp
102  AMDGPUReserveWWMRegs.cpp
103  AMDGPUResourceUsageAnalysis.cpp
104  AMDGPURewriteOutArguments.cpp
105  AMDGPURewriteUndefForPHI.cpp
106  AMDGPUSelectionDAGInfo.cpp
107  AMDGPUSetWavePriority.cpp
108  AMDGPUSplitModule.cpp
109  AMDGPUSubtarget.cpp
110  AMDGPUTargetMachine.cpp
111  AMDGPUTargetObjectFile.cpp
112  AMDGPUTargetTransformInfo.cpp
113  AMDGPUUnifyDivergentExitNodes.cpp
114  AMDGPUUnifyMetadata.cpp
115  R600MachineCFGStructurizer.cpp
116  GCNCreateVOPD.cpp
117  GCNDPPCombine.cpp
118  GCNHazardRecognizer.cpp
119  GCNILPSched.cpp
120  GCNIterativeScheduler.cpp
121  GCNMinRegStrategy.cpp
122  GCNNSAReassign.cpp
123  GCNPreRAOptimizations.cpp
124  GCNPreRALongBranchReg.cpp
125  GCNRegPressure.cpp
126  GCNRewritePartialRegUses.cpp
127  GCNSchedStrategy.cpp
128  GCNSubtarget.cpp
129  GCNVOPDUtils.cpp
130  R600AsmPrinter.cpp
131  R600ClauseMergePass.cpp
132  R600ControlFlowFinalizer.cpp
133  R600EmitClauseMarkers.cpp
134  R600ExpandSpecialInstrs.cpp
135  R600FrameLowering.cpp
136  R600InstrInfo.cpp
137  R600ISelDAGToDAG.cpp
138  R600ISelLowering.cpp
139  R600MachineFunctionInfo.cpp
140  R600MachineScheduler.cpp
141  R600MCInstLower.cpp
142  R600OpenCLImageTypeLoweringPass.cpp
143  R600OptimizeVectorRegisters.cpp
144  R600Packetizer.cpp
145  R600RegisterInfo.cpp
146  R600Subtarget.cpp
147  R600TargetMachine.cpp
148  R600TargetTransformInfo.cpp
149  SIAnnotateControlFlow.cpp
150  SIFixSGPRCopies.cpp
151  SIFixVGPRCopies.cpp
152  SIFoldOperands.cpp
153  SIFormMemoryClauses.cpp
154  SIFrameLowering.cpp
155  SIInsertHardClauses.cpp
156  SIInsertWaitcnts.cpp
157  SIInstrInfo.cpp
158  SIISelLowering.cpp
159  SILateBranchLowering.cpp
160  SILoadStoreOptimizer.cpp
161  SILowerControlFlow.cpp
162  SILowerI1Copies.cpp
163  SILowerWWMCopies.cpp
164  SILowerSGPRSpills.cpp
165  SIMachineFunctionInfo.cpp
166  SIMachineScheduler.cpp
167  SIMemoryLegalizer.cpp
168  SIModeRegister.cpp
169  SIModeRegisterDefaults.cpp
170  SIOptimizeExecMasking.cpp
171  SIOptimizeExecMaskingPreRA.cpp
172  SIOptimizeVGPRLiveRange.cpp
173  SIPeepholeSDWA.cpp
174  SIPostRABundler.cpp
175  SIPreAllocateWWMRegs.cpp
176  SIPreEmitPeephole.cpp
177  SIProgramInfo.cpp
178  SIRegisterInfo.cpp
179  SIShrinkInstructions.cpp
180  SIWholeQuadMode.cpp
181
182  LINK_COMPONENTS
183  AMDGPUDesc
184  AMDGPUInfo
185  AMDGPUUtils
186  Analysis
187  AsmPrinter
188  BinaryFormat
189  CodeGen
190  CodeGenTypes
191  Core
192  GlobalISel
193  HipStdPar
194  IPO
195  IRPrinter
196  Instrumentation
197  MC
198  MIRParser
199  Passes
200  Scalar
201  SelectionDAG
202  Support
203  Target
204  TargetParser
205  TransformUtils
206  Vectorize
207
208  ADD_TO_COMPONENT
209  AMDGPU
210  )
211
212add_subdirectory(AsmParser)
213add_subdirectory(Disassembler)
214add_subdirectory(MCA)
215add_subdirectory(MCTargetDesc)
216add_subdirectory(TargetInfo)
217add_subdirectory(Utils)
218