xref: /llvm-project/llvm/lib/CodeGen/StackMaps.cpp (revision 73a7fcc6e1c256c5f7ca9733b8b1b8b2b93333bd) 
1 //===---------------------------- StackMaps.cpp ---------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #define DEBUG_TYPE "stackmaps"
11 
12 #include "llvm/CodeGen/StackMaps.h"
13 #include "llvm/CodeGen/AsmPrinter.h"
14 #include "llvm/CodeGen/MachineFunction.h"
15 #include "llvm/CodeGen/MachineFrameInfo.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/IR/DataLayout.h"
18 #include "llvm/MC/MCContext.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/MC/MCObjectFileInfo.h"
21 #include "llvm/MC/MCSectionMachO.h"
22 #include "llvm/MC/MCStreamer.h"
23 #include "llvm/Support/Debug.h"
24 #include "llvm/Support/raw_ostream.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetOpcodes.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include <iterator>
29 
30 using namespace llvm;
31 
32 PatchPointOpers::PatchPointOpers(const MachineInstr *MI)
33   : MI(MI),
34     HasDef(MI->getOperand(0).isReg() && MI->getOperand(0).isDef() &&
35            !MI->getOperand(0).isImplicit()),
36     IsAnyReg(MI->getOperand(getMetaIdx(CCPos)).getImm() == CallingConv::AnyReg)
37 {
38 #ifndef NDEBUG
39   unsigned CheckStartIdx = 0, e = MI->getNumOperands();
40   while (CheckStartIdx < e && MI->getOperand(CheckStartIdx).isReg() &&
41          MI->getOperand(CheckStartIdx).isDef() &&
42          !MI->getOperand(CheckStartIdx).isImplicit())
43     ++CheckStartIdx;
44 
45   assert(getMetaIdx() == CheckStartIdx &&
46          "Unexpected additional definition in Patchpoint intrinsic.");
47 #endif
48 }
49 
50 unsigned PatchPointOpers::getNextScratchIdx(unsigned StartIdx) const {
51   if (!StartIdx)
52     StartIdx = getVarIdx();
53 
54   // Find the next scratch register (implicit def and early clobber)
55   unsigned ScratchIdx = StartIdx, e = MI->getNumOperands();
56   while (ScratchIdx < e &&
57          !(MI->getOperand(ScratchIdx).isReg() &&
58            MI->getOperand(ScratchIdx).isDef() &&
59            MI->getOperand(ScratchIdx).isImplicit() &&
60            MI->getOperand(ScratchIdx).isEarlyClobber()))
61     ++ScratchIdx;
62 
63   assert(ScratchIdx != e && "No scratch register available");
64   return ScratchIdx;
65 }
66 
67 MachineInstr::const_mop_iterator
68 StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI,
69                         MachineInstr::const_mop_iterator MOE,
70                         LocationVec &Locs, LiveOutVec &LiveOuts) const {
71   if (MOI->isImm()) {
72     switch (MOI->getImm()) {
73     default: llvm_unreachable("Unrecognized operand type.");
74     case StackMaps::DirectMemRefOp: {
75       unsigned Size = AP.TM.getDataLayout()->getPointerSizeInBits();
76       assert((Size % 8) == 0 && "Need pointer size in bytes.");
77       Size /= 8;
78       unsigned Reg = (++MOI)->getReg();
79       int64_t Imm = (++MOI)->getImm();
80       Locs.push_back(Location(StackMaps::Location::Direct, Size, Reg, Imm));
81       break;
82     }
83     case StackMaps::IndirectMemRefOp: {
84       int64_t Size = (++MOI)->getImm();
85       assert(Size > 0 && "Need a valid size for indirect memory locations.");
86       unsigned Reg = (++MOI)->getReg();
87       int64_t Imm = (++MOI)->getImm();
88       Locs.push_back(Location(StackMaps::Location::Indirect, Size, Reg, Imm));
89       break;
90     }
91     case StackMaps::ConstantOp: {
92       ++MOI;
93       assert(MOI->isImm() && "Expected constant operand.");
94       int64_t Imm = MOI->getImm();
95       Locs.push_back(Location(Location::Constant, sizeof(int64_t), 0, Imm));
96       break;
97     }
98     }
99     return ++MOI;
100   }
101 
102   // The physical register number will ultimately be encoded as a DWARF regno.
103   // The stack map also records the size of a spill slot that can hold the
104   // register content. (The runtime can track the actual size of the data type
105   // if it needs to.)
106   if (MOI->isReg()) {
107     // Skip implicit registers (this includes our scratch registers)
108     if (MOI->isImplicit())
109       return ++MOI;
110 
111     assert(TargetRegisterInfo::isPhysicalRegister(MOI->getReg()) &&
112            "Virtreg operands should have been rewritten before now.");
113     const TargetRegisterClass *RC =
114       AP.TM.getRegisterInfo()->getMinimalPhysRegClass(MOI->getReg());
115     assert(!MOI->getSubReg() && "Physical subreg still around.");
116     Locs.push_back(
117       Location(Location::Register, RC->getSize(), MOI->getReg(), 0));
118     return ++MOI;
119   }
120 
121   if (MOI->isRegLiveOut())
122     LiveOuts = parseRegisterLiveOutMask(MOI->getRegLiveOut());
123 
124   return ++MOI;
125 }
126 
127 /// Go up the super-register chain until we hit a valid dwarf register number.
128 static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) {
129   int RegNo = TRI->getDwarfRegNum(Reg, false);
130   for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNo < 0; ++SR)
131     RegNo = TRI->getDwarfRegNum(*SR, false);
132 
133   assert(RegNo >= 0 && "Invalid Dwarf register number.");
134   return (unsigned) RegNo;
135 }
136 
137 /// Create a live-out register record for the given register Reg.
138 StackMaps::LiveOutReg
139 StackMaps::createLiveOutReg(unsigned Reg, const TargetRegisterInfo *TRI) const {
140   unsigned RegNo = getDwarfRegNum(Reg, TRI);
141   unsigned Size = TRI->getMinimalPhysRegClass(Reg)->getSize();
142   return LiveOutReg(Reg, RegNo, Size);
143 }
144 
145 /// Parse the register live-out mask and return a vector of live-out registers
146 /// that need to be recorded in the stackmap.
147 StackMaps::LiveOutVec
148 StackMaps::parseRegisterLiveOutMask(const uint32_t *Mask) const {
149   assert(Mask && "No register mask specified");
150   const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo();
151   LiveOutVec LiveOuts;
152 
153   // Create a LiveOutReg for each bit that is set in the register mask.
154   for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg)
155     if ((Mask[Reg / 32] >> Reg % 32) & 1)
156       LiveOuts.push_back(createLiveOutReg(Reg, TRI));
157 
158   // We don't need to keep track of a register if its super-register is already
159   // in the list. Merge entries that refer to the same dwarf register and use
160   // the maximum size that needs to be spilled.
161   std::sort(LiveOuts.begin(), LiveOuts.end());
162   for (LiveOutVec::iterator I = LiveOuts.begin(), E = LiveOuts.end();
163        I != E; ++I) {
164     for (LiveOutVec::iterator II = next(I); II != E; ++II) {
165       if (I->RegNo != II->RegNo) {
166         // Skip all the now invalid entries.
167         I = --II;
168         break;
169       }
170       I->Size = std::max(I->Size, II->Size);
171       if (TRI->isSuperRegister(I->Reg, II->Reg))
172         I->Reg = II->Reg;
173       II->MarkInvalid();
174     }
175   }
176   LiveOuts.erase(std::remove_if(LiveOuts.begin(), LiveOuts.end(),
177                                 LiveOutReg::IsInvalid), LiveOuts.end());
178   return LiveOuts;
179 }
180 
181 void StackMaps::recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
182                                     MachineInstr::const_mop_iterator MOI,
183                                     MachineInstr::const_mop_iterator MOE,
184                                     bool recordResult) {
185 
186   MCContext &OutContext = AP.OutStreamer.getContext();
187   MCSymbol *MILabel = OutContext.CreateTempSymbol();
188   AP.OutStreamer.EmitLabel(MILabel);
189 
190   LocationVec Locations;
191   LiveOutVec LiveOuts;
192 
193   if (recordResult) {
194     assert(PatchPointOpers(&MI).hasDef() && "Stackmap has no return value.");
195     parseOperand(MI.operands_begin(), llvm::next(MI.operands_begin()),
196                  Locations, LiveOuts);
197   }
198 
199   // Parse operands.
200   while (MOI != MOE) {
201     MOI = parseOperand(MOI, MOE, Locations, LiveOuts);
202   }
203 
204   // Move large constants into the constant pool.
205   for (LocationVec::iterator I = Locations.begin(), E = Locations.end();
206        I != E; ++I) {
207     // Constants are encoded as sign-extended integers.
208     // -1 is directly encoded as .long 0xFFFFFFFF with no constant pool.
209     if (I->LocType == Location::Constant &&
210         ((I->Offset + (int64_t(1)<<31)) >> 32) != 0) {
211       I->LocType = Location::ConstantIndex;
212       I->Offset = ConstPool.getConstantIndex(I->Offset);
213     }
214   }
215 
216   // Create an expression to calculate the offset of the callsite from function
217   // entry.
218   const MCExpr *CSOffsetExpr = MCBinaryExpr::CreateSub(
219     MCSymbolRefExpr::Create(MILabel, OutContext),
220     MCSymbolRefExpr::Create(AP.CurrentFnSym, OutContext),
221     OutContext);
222 
223   CSInfos.push_back(CallsiteInfo(CSOffsetExpr, ID, Locations, LiveOuts));
224 
225   // Record the stack size of the current function.
226   const MachineFrameInfo *MFI = AP.MF->getFrameInfo();
227   FnStackSize[AP.CurrentFnSym] =
228     MFI->hasVarSizedObjects() ? ~0U : MFI->getStackSize();
229 }
230 
231 void StackMaps::recordStackMap(const MachineInstr &MI) {
232   assert(MI.getOpcode() == TargetOpcode::STACKMAP && "expected stackmap");
233 
234   int64_t ID = MI.getOperand(0).getImm();
235   recordStackMapOpers(MI, ID, llvm::next(MI.operands_begin(), 2),
236                       MI.operands_end());
237 }
238 
239 void StackMaps::recordPatchPoint(const MachineInstr &MI) {
240   assert(MI.getOpcode() == TargetOpcode::PATCHPOINT && "expected patchpoint");
241 
242   PatchPointOpers opers(&MI);
243   int64_t ID = opers.getMetaOper(PatchPointOpers::IDPos).getImm();
244 
245   MachineInstr::const_mop_iterator MOI =
246     llvm::next(MI.operands_begin(), opers.getStackMapStartIdx());
247   recordStackMapOpers(MI, ID, MOI, MI.operands_end(),
248                       opers.isAnyReg() && opers.hasDef());
249 
250 #ifndef NDEBUG
251   // verify anyregcc
252   LocationVec &Locations = CSInfos.back().Locations;
253   if (opers.isAnyReg()) {
254     unsigned NArgs = opers.getMetaOper(PatchPointOpers::NArgPos).getImm();
255     for (unsigned i = 0, e = (opers.hasDef() ? NArgs+1 : NArgs); i != e; ++i)
256       assert(Locations[i].LocType == Location::Register &&
257              "anyreg arg must be in reg.");
258   }
259 #endif
260 }
261 
262 /// serializeToStackMapSection conceptually populates the following fields:
263 ///
264 /// uint32 : Reserved (header)
265 /// uint32 : NumFunctions
266 /// StkSizeRecord[NumFunctions] {
267 ///   uint32 : Function Offset
268 ///   uint32 : Stack Size
269 /// }
270 /// uint32 : NumConstants
271 /// int64  : Constants[NumConstants]
272 /// uint32 : NumRecords
273 /// StkMapRecord[NumRecords] {
274 ///   uint64 : PatchPoint ID
275 ///   uint32 : Instruction Offset
276 ///   uint16 : Reserved (record flags)
277 ///   uint16 : NumLocations
278 ///   Location[NumLocations] {
279 ///     uint8  : Register | Direct | Indirect | Constant | ConstantIndex
280 ///     uint8  : Size in Bytes
281 ///     uint16 : Dwarf RegNum
282 ///     int32  : Offset
283 ///   }
284 ///   uint16 : NumLiveOuts
285 ///   LiveOuts[NumLiveOuts]
286 ///     uint16 : Dwarf RegNum
287 ///     uint8  : Reserved
288 ///     uint8  : Size in Bytes
289 /// }
290 ///
291 /// Location Encoding, Type, Value:
292 ///   0x1, Register, Reg                 (value in register)
293 ///   0x2, Direct, Reg + Offset          (frame index)
294 ///   0x3, Indirect, [Reg + Offset]      (spilled value)
295 ///   0x4, Constant, Offset              (small constant)
296 ///   0x5, ConstIndex, Constants[Offset] (large constant)
297 ///
298 void StackMaps::serializeToStackMapSection() {
299   // Bail out if there's no stack map data.
300   if (CSInfos.empty())
301     return;
302 
303   MCContext &OutContext = AP.OutStreamer.getContext();
304   const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo();
305 
306   // Create the section.
307   const MCSection *StackMapSection =
308     OutContext.getObjectFileInfo()->getStackMapSection();
309   AP.OutStreamer.SwitchSection(StackMapSection);
310 
311   // Emit a dummy symbol to force section inclusion.
312   AP.OutStreamer.EmitLabel(
313     OutContext.GetOrCreateSymbol(Twine("__LLVM_StackMaps")));
314 
315   // Serialize data.
316   const char *WSMP = "Stack Maps: ";
317   (void)WSMP;
318 
319   DEBUG(dbgs() << "********** Stack Map Output **********\n");
320 
321   // Header.
322   AP.OutStreamer.EmitIntValue(0, 4);
323 
324   // Num functions.
325   AP.OutStreamer.EmitIntValue(FnStackSize.size(), 4);
326 
327   // Stack size entries.
328   for (FnStackSizeMap::iterator I = FnStackSize.begin(), E = FnStackSize.end();
329        I != E; ++I) {
330     AP.OutStreamer.EmitSymbolValue(I->first, 4);
331     AP.OutStreamer.EmitIntValue(I->second, 4);
332   }
333 
334   // Num constants.
335   AP.OutStreamer.EmitIntValue(ConstPool.getNumConstants(), 4);
336 
337   // Constant pool entries.
338   for (unsigned i = 0; i < ConstPool.getNumConstants(); ++i)
339     AP.OutStreamer.EmitIntValue(ConstPool.getConstant(i), 8);
340 
341   DEBUG(dbgs() << WSMP << "#callsites = " << CSInfos.size() << "\n");
342   AP.OutStreamer.EmitIntValue(CSInfos.size(), 4);
343 
344   for (CallsiteInfoList::const_iterator CSII = CSInfos.begin(),
345                                         CSIE = CSInfos.end();
346        CSII != CSIE; ++CSII) {
347 
348     uint64_t CallsiteID = CSII->ID;
349     const LocationVec &CSLocs = CSII->Locations;
350     const LiveOutVec &LiveOuts = CSII->LiveOuts;
351 
352     DEBUG(dbgs() << WSMP << "callsite " << CallsiteID << "\n");
353 
354     // Verify stack map entry. It's better to communicate a problem to the
355     // runtime than crash in case of in-process compilation. Currently, we do
356     // simple overflow checks, but we may eventually communicate other
357     // compilation errors this way.
358     if (CSLocs.size() > UINT16_MAX || LiveOuts.size() > UINT16_MAX) {
359       AP.OutStreamer.EmitIntValue(UINT64_MAX, 8); // Invalid ID.
360       AP.OutStreamer.EmitValue(CSII->CSOffsetExpr, 4);
361       AP.OutStreamer.EmitIntValue(0, 2); // Reserved.
362       AP.OutStreamer.EmitIntValue(0, 2); // 0 locations.
363       AP.OutStreamer.EmitIntValue(0, 2); // 0 live-out registers.
364       continue;
365     }
366 
367     AP.OutStreamer.EmitIntValue(CallsiteID, 8);
368     AP.OutStreamer.EmitValue(CSII->CSOffsetExpr, 4);
369 
370     // Reserved for flags.
371     AP.OutStreamer.EmitIntValue(0, 2);
372 
373     DEBUG(dbgs() << WSMP << "  has " << CSLocs.size() << " locations\n");
374 
375     AP.OutStreamer.EmitIntValue(CSLocs.size(), 2);
376 
377     unsigned operIdx = 0;
378     for (LocationVec::const_iterator LocI = CSLocs.begin(), LocE = CSLocs.end();
379          LocI != LocE; ++LocI, ++operIdx) {
380       const Location &Loc = *LocI;
381       unsigned RegNo = 0;
382       int Offset = Loc.Offset;
383       if(Loc.Reg) {
384         RegNo = getDwarfRegNum(Loc.Reg, TRI);
385 
386         // If this is a register location, put the subregister byte offset in
387         // the location offset.
388         if (Loc.LocType == Location::Register) {
389           assert(!Loc.Offset && "Register location should have zero offset");
390           unsigned LLVMRegNo = TRI->getLLVMRegNum(RegNo, false);
391           unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNo, Loc.Reg);
392           if (SubRegIdx)
393             Offset = TRI->getSubRegIdxOffset(SubRegIdx);
394         }
395       }
396       else {
397         assert(Loc.LocType != Location::Register &&
398                "Missing location register");
399       }
400 
401       DEBUG(
402         dbgs() << WSMP << "  Loc " << operIdx << ": ";
403         switch (Loc.LocType) {
404         case Location::Unprocessed:
405           dbgs() << "<Unprocessed operand>";
406           break;
407         case Location::Register:
408           dbgs() << "Register " << TRI->getName(Loc.Reg);
409           break;
410         case Location::Direct:
411           dbgs() << "Direct " << TRI->getName(Loc.Reg);
412           if (Loc.Offset)
413             dbgs() << " + " << Loc.Offset;
414           break;
415         case Location::Indirect:
416           dbgs() << "Indirect " << TRI->getName(Loc.Reg)
417                  << " + " << Loc.Offset;
418           break;
419         case Location::Constant:
420           dbgs() << "Constant " << Loc.Offset;
421           break;
422         case Location::ConstantIndex:
423           dbgs() << "Constant Index " << Loc.Offset;
424           break;
425         }
426         dbgs() << "     [encoding: .byte " << Loc.LocType
427                << ", .byte " << Loc.Size
428                << ", .short " << RegNo
429                << ", .int " << Offset << "]\n";
430       );
431 
432       AP.OutStreamer.EmitIntValue(Loc.LocType, 1);
433       AP.OutStreamer.EmitIntValue(Loc.Size, 1);
434       AP.OutStreamer.EmitIntValue(RegNo, 2);
435       AP.OutStreamer.EmitIntValue(Offset, 4);
436     }
437 
438     DEBUG(dbgs() << WSMP << "  has " << LiveOuts.size()
439                  << " live-out registers\n");
440 
441     AP.OutStreamer.EmitIntValue(LiveOuts.size(), 2);
442 
443     operIdx = 0;
444     for (LiveOutVec::const_iterator LI = LiveOuts.begin(), LE = LiveOuts.end();
445          LI != LE; ++LI, ++operIdx) {
446       DEBUG(dbgs() << WSMP << "  LO " << operIdx << ": "
447                    << TRI->getName(LI->Reg)
448                    << "     [encoding: .short " << LI->RegNo
449                    << ", .byte 0, .byte " << LI->Size << "]\n");
450 
451       AP.OutStreamer.EmitIntValue(LI->RegNo, 2);
452       AP.OutStreamer.EmitIntValue(0, 1);
453       AP.OutStreamer.EmitIntValue(LI->Size, 1);
454     }
455   }
456 
457   AP.OutStreamer.AddBlankLine();
458 
459   CSInfos.clear();
460 }
461