1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This implements the SelectionDAG::dump method and friends. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "SDNodeDbgValue.h" 14 #include "llvm/ADT/APFloat.h" 15 #include "llvm/ADT/APInt.h" 16 #include "llvm/ADT/SmallPtrSet.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/CodeGen/ISDOpcodes.h" 19 #include "llvm/CodeGen/MachineBasicBlock.h" 20 #include "llvm/CodeGen/MachineConstantPool.h" 21 #include "llvm/CodeGen/MachineMemOperand.h" 22 #include "llvm/CodeGen/SelectionDAG.h" 23 #include "llvm/CodeGen/SelectionDAGNodes.h" 24 #include "llvm/CodeGen/TargetInstrInfo.h" 25 #include "llvm/CodeGen/TargetLowering.h" 26 #include "llvm/CodeGen/TargetRegisterInfo.h" 27 #include "llvm/CodeGen/TargetSubtargetInfo.h" 28 #include "llvm/CodeGen/ValueTypes.h" 29 #include "llvm/CodeGenTypes/MachineValueType.h" 30 #include "llvm/Config/llvm-config.h" 31 #include "llvm/IR/BasicBlock.h" 32 #include "llvm/IR/Constants.h" 33 #include "llvm/IR/DebugInfoMetadata.h" 34 #include "llvm/IR/DebugLoc.h" 35 #include "llvm/IR/Function.h" 36 #include "llvm/IR/Intrinsics.h" 37 #include "llvm/IR/ModuleSlotTracker.h" 38 #include "llvm/IR/Value.h" 39 #include "llvm/Support/Casting.h" 40 #include "llvm/Support/CommandLine.h" 41 #include "llvm/Support/Compiler.h" 42 #include "llvm/Support/Debug.h" 43 #include "llvm/Support/ErrorHandling.h" 44 #include "llvm/Support/Printable.h" 45 #include "llvm/Support/raw_ostream.h" 46 #include "llvm/Target/TargetIntrinsicInfo.h" 47 #include "llvm/Target/TargetMachine.h" 48 #include <cstdint> 49 #include <iterator> 50 51 using namespace llvm; 52 53 static cl::opt<bool> 54 VerboseDAGDumping("dag-dump-verbose", cl::Hidden, 55 cl::desc("Display more information when dumping selection " 56 "DAG nodes.")); 57 58 std::string SDNode::getOperationName(const SelectionDAG *G) const { 59 switch (getOpcode()) { 60 default: 61 if (getOpcode() < ISD::BUILTIN_OP_END) 62 return "<<Unknown DAG Node>>"; 63 if (isMachineOpcode()) { 64 if (G) 65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo()) 66 if (getMachineOpcode() < TII->getNumOpcodes()) 67 return std::string(TII->getName(getMachineOpcode())); 68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 69 } 70 if (G) { 71 const TargetLowering &TLI = G->getTargetLoweringInfo(); 72 const char *Name = TLI.getTargetNodeName(getOpcode()); 73 if (Name) return Name; 74 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 75 } 76 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 77 78 // clang-format off 79 #ifndef NDEBUG 80 case ISD::DELETED_NODE: return "<<Deleted Node!>>"; 81 #endif 82 case ISD::PREFETCH: return "Prefetch"; 83 case ISD::MEMBARRIER: return "MemBarrier"; 84 case ISD::ATOMIC_FENCE: return "AtomicFence"; 85 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 86 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess"; 87 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 88 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 89 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 90 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 91 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr"; 92 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 93 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 94 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 95 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 96 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 97 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 98 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 99 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd"; 100 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub"; 101 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin"; 102 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax"; 103 case ISD::ATOMIC_LOAD_UINC_WRAP: 104 return "AtomicLoadUIncWrap"; 105 case ISD::ATOMIC_LOAD_UDEC_WRAP: 106 return "AtomicLoadUDecWrap"; 107 case ISD::ATOMIC_LOAD_USUB_COND: 108 return "AtomicLoadUSubCond"; 109 case ISD::ATOMIC_LOAD_USUB_SAT: 110 return "AtomicLoadUSubSat"; 111 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 112 case ISD::ATOMIC_STORE: return "AtomicStore"; 113 case ISD::PCMARKER: return "PCMarker"; 114 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 115 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter"; 116 case ISD::SRCVALUE: return "SrcValue"; 117 case ISD::MDNODE_SDNODE: return "MDNode"; 118 case ISD::EntryToken: return "EntryToken"; 119 case ISD::TokenFactor: return "TokenFactor"; 120 case ISD::AssertSext: return "AssertSext"; 121 case ISD::AssertZext: return "AssertZext"; 122 case ISD::AssertAlign: return "AssertAlign"; 123 124 case ISD::BasicBlock: return "BasicBlock"; 125 case ISD::VALUETYPE: return "ValueType"; 126 case ISD::Register: return "Register"; 127 case ISD::RegisterMask: return "RegisterMask"; 128 case ISD::Constant: 129 if (cast<ConstantSDNode>(this)->isOpaque()) 130 return "OpaqueConstant"; 131 return "Constant"; 132 case ISD::ConstantFP: return "ConstantFP"; 133 case ISD::GlobalAddress: return "GlobalAddress"; 134 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 135 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress"; 136 case ISD::FrameIndex: return "FrameIndex"; 137 case ISD::JumpTable: return "JumpTable"; 138 case ISD::JUMP_TABLE_DEBUG_INFO: 139 return "JUMP_TABLE_DEBUG_INFO"; 140 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 141 case ISD::RETURNADDR: return "RETURNADDR"; 142 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR"; 143 case ISD::FRAMEADDR: return "FRAMEADDR"; 144 case ISD::SPONENTRY: return "SPONENTRY"; 145 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER"; 146 case ISD::READ_REGISTER: return "READ_REGISTER"; 147 case ISD::WRITE_REGISTER: return "WRITE_REGISTER"; 148 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 149 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA"; 150 case ISD::EH_RETURN: return "EH_RETURN"; 151 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 152 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 153 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH"; 154 case ISD::ConstantPool: return "ConstantPool"; 155 case ISD::TargetIndex: return "TargetIndex"; 156 case ISD::ExternalSymbol: return "ExternalSymbol"; 157 case ISD::BlockAddress: return "BlockAddress"; 158 case ISD::INTRINSIC_WO_CHAIN: 159 case ISD::INTRINSIC_VOID: 160 case ISD::INTRINSIC_W_CHAIN: { 161 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 162 unsigned IID = getOperand(OpNo)->getAsZExtVal(); 163 if (IID < Intrinsic::num_intrinsics) 164 return Intrinsic::getBaseName((Intrinsic::ID)IID).str(); 165 if (!G) 166 return "Unknown intrinsic"; 167 if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 168 return TII->getName(IID); 169 llvm_unreachable("Invalid intrinsic ID"); 170 } 171 172 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 173 case ISD::TargetConstant: 174 if (cast<ConstantSDNode>(this)->isOpaque()) 175 return "OpaqueTargetConstant"; 176 return "TargetConstant"; 177 178 case ISD::TargetConstantFP: return "TargetConstantFP"; 179 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 180 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 181 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 182 case ISD::TargetJumpTable: return "TargetJumpTable"; 183 case ISD::TargetConstantPool: return "TargetConstantPool"; 184 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 185 case ISD::MCSymbol: return "MCSymbol"; 186 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 187 188 case ISD::CopyToReg: return "CopyToReg"; 189 case ISD::CopyFromReg: return "CopyFromReg"; 190 case ISD::UNDEF: return "undef"; 191 case ISD::VSCALE: return "vscale"; 192 case ISD::MERGE_VALUES: return "merge_values"; 193 case ISD::INLINEASM: return "inlineasm"; 194 case ISD::INLINEASM_BR: return "inlineasm_br"; 195 case ISD::EH_LABEL: return "eh_label"; 196 case ISD::ANNOTATION_LABEL: return "annotation_label"; 197 case ISD::HANDLENODE: return "handlenode"; 198 199 // Unary operators 200 case ISD::FABS: return "fabs"; 201 case ISD::FMINNUM: return "fminnum"; 202 case ISD::STRICT_FMINNUM: return "strict_fminnum"; 203 case ISD::FMAXNUM: return "fmaxnum"; 204 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum"; 205 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; 206 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee"; 207 case ISD::FMINIMUM: return "fminimum"; 208 case ISD::STRICT_FMINIMUM: return "strict_fminimum"; 209 case ISD::FMAXIMUM: return "fmaximum"; 210 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum"; 211 case ISD::FMINIMUMNUM: return "fminimumnum"; 212 case ISD::FMAXIMUMNUM: return "fmaximumnum"; 213 case ISD::FNEG: return "fneg"; 214 case ISD::FSQRT: return "fsqrt"; 215 case ISD::STRICT_FSQRT: return "strict_fsqrt"; 216 case ISD::FCBRT: return "fcbrt"; 217 case ISD::FSIN: return "fsin"; 218 case ISD::STRICT_FSIN: return "strict_fsin"; 219 case ISD::FCOS: return "fcos"; 220 case ISD::STRICT_FCOS: return "strict_fcos"; 221 case ISD::FSINCOS: return "fsincos"; 222 case ISD::FTAN: return "ftan"; 223 case ISD::STRICT_FTAN: return "strict_ftan"; 224 case ISD::FASIN: return "fasin"; 225 case ISD::STRICT_FASIN: return "strict_fasin"; 226 case ISD::FACOS: return "facos"; 227 case ISD::STRICT_FACOS: return "strict_facos"; 228 case ISD::FATAN: return "fatan"; 229 case ISD::STRICT_FATAN: return "strict_fatan"; 230 case ISD::FATAN2: return "fatan2"; 231 case ISD::STRICT_FATAN2: return "strict_fatan2"; 232 case ISD::FSINH: return "fsinh"; 233 case ISD::STRICT_FSINH: return "strict_fsinh"; 234 case ISD::FCOSH: return "fcosh"; 235 case ISD::STRICT_FCOSH: return "strict_fcosh"; 236 case ISD::FTANH: return "ftanh"; 237 case ISD::STRICT_FTANH: return "strict_ftanh"; 238 case ISD::FTRUNC: return "ftrunc"; 239 case ISD::STRICT_FTRUNC: return "strict_ftrunc"; 240 case ISD::FFLOOR: return "ffloor"; 241 case ISD::STRICT_FFLOOR: return "strict_ffloor"; 242 case ISD::FCEIL: return "fceil"; 243 case ISD::STRICT_FCEIL: return "strict_fceil"; 244 case ISD::FRINT: return "frint"; 245 case ISD::STRICT_FRINT: return "strict_frint"; 246 case ISD::FNEARBYINT: return "fnearbyint"; 247 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint"; 248 case ISD::FROUND: return "fround"; 249 case ISD::STRICT_FROUND: return "strict_fround"; 250 case ISD::FROUNDEVEN: return "froundeven"; 251 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven"; 252 case ISD::FEXP: return "fexp"; 253 case ISD::STRICT_FEXP: return "strict_fexp"; 254 case ISD::FEXP2: return "fexp2"; 255 case ISD::STRICT_FEXP2: return "strict_fexp2"; 256 case ISD::FEXP10: return "fexp10"; 257 case ISD::FLOG: return "flog"; 258 case ISD::STRICT_FLOG: return "strict_flog"; 259 case ISD::FLOG2: return "flog2"; 260 case ISD::STRICT_FLOG2: return "strict_flog2"; 261 case ISD::FLOG10: return "flog10"; 262 case ISD::STRICT_FLOG10: return "strict_flog10"; 263 264 // Binary operators 265 case ISD::ADD: return "add"; 266 case ISD::SUB: return "sub"; 267 case ISD::MUL: return "mul"; 268 case ISD::MULHU: return "mulhu"; 269 case ISD::MULHS: return "mulhs"; 270 case ISD::AVGFLOORU: return "avgflooru"; 271 case ISD::AVGFLOORS: return "avgfloors"; 272 case ISD::AVGCEILU: return "avgceilu"; 273 case ISD::AVGCEILS: return "avgceils"; 274 case ISD::ABDS: return "abds"; 275 case ISD::ABDU: return "abdu"; 276 case ISD::SDIV: return "sdiv"; 277 case ISD::UDIV: return "udiv"; 278 case ISD::SREM: return "srem"; 279 case ISD::UREM: return "urem"; 280 case ISD::SMUL_LOHI: return "smul_lohi"; 281 case ISD::UMUL_LOHI: return "umul_lohi"; 282 case ISD::SDIVREM: return "sdivrem"; 283 case ISD::UDIVREM: return "udivrem"; 284 case ISD::AND: return "and"; 285 case ISD::OR: return "or"; 286 case ISD::XOR: return "xor"; 287 case ISD::SHL: return "shl"; 288 case ISD::SRA: return "sra"; 289 case ISD::SRL: return "srl"; 290 case ISD::ROTL: return "rotl"; 291 case ISD::ROTR: return "rotr"; 292 case ISD::FSHL: return "fshl"; 293 case ISD::FSHR: return "fshr"; 294 case ISD::FADD: return "fadd"; 295 case ISD::STRICT_FADD: return "strict_fadd"; 296 case ISD::FSUB: return "fsub"; 297 case ISD::STRICT_FSUB: return "strict_fsub"; 298 case ISD::FMUL: return "fmul"; 299 case ISD::STRICT_FMUL: return "strict_fmul"; 300 case ISD::FDIV: return "fdiv"; 301 case ISD::STRICT_FDIV: return "strict_fdiv"; 302 case ISD::FMA: return "fma"; 303 case ISD::STRICT_FMA: return "strict_fma"; 304 case ISD::FMAD: return "fmad"; 305 case ISD::FREM: return "frem"; 306 case ISD::STRICT_FREM: return "strict_frem"; 307 case ISD::FCOPYSIGN: return "fcopysign"; 308 case ISD::FGETSIGN: return "fgetsign"; 309 case ISD::FCANONICALIZE: return "fcanonicalize"; 310 case ISD::IS_FPCLASS: return "is_fpclass"; 311 case ISD::FPOW: return "fpow"; 312 case ISD::STRICT_FPOW: return "strict_fpow"; 313 case ISD::SMIN: return "smin"; 314 case ISD::SMAX: return "smax"; 315 case ISD::UMIN: return "umin"; 316 case ISD::UMAX: return "umax"; 317 case ISD::SCMP: return "scmp"; 318 case ISD::UCMP: return "ucmp"; 319 320 case ISD::FLDEXP: return "fldexp"; 321 case ISD::STRICT_FLDEXP: return "strict_fldexp"; 322 case ISD::FFREXP: return "ffrexp"; 323 case ISD::FPOWI: return "fpowi"; 324 case ISD::STRICT_FPOWI: return "strict_fpowi"; 325 case ISD::SETCC: return "setcc"; 326 case ISD::SETCCCARRY: return "setcccarry"; 327 case ISD::STRICT_FSETCC: return "strict_fsetcc"; 328 case ISD::STRICT_FSETCCS: return "strict_fsetccs"; 329 case ISD::FPTRUNC_ROUND: return "fptrunc_round"; 330 case ISD::SELECT: return "select"; 331 case ISD::VSELECT: return "vselect"; 332 case ISD::SELECT_CC: return "select_cc"; 333 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 334 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 335 case ISD::CONCAT_VECTORS: return "concat_vectors"; 336 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 337 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 338 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave"; 339 case ISD::VECTOR_INTERLEAVE: return "vector_interleave"; 340 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 341 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 342 case ISD::VECTOR_SPLICE: return "vector_splice"; 343 case ISD::SPLAT_VECTOR: return "splat_vector"; 344 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts"; 345 case ISD::VECTOR_REVERSE: return "vector_reverse"; 346 case ISD::STEP_VECTOR: return "step_vector"; 347 case ISD::CARRY_FALSE: return "carry_false"; 348 case ISD::ADDC: return "addc"; 349 case ISD::ADDE: return "adde"; 350 case ISD::UADDO_CARRY: return "uaddo_carry"; 351 case ISD::SADDO_CARRY: return "saddo_carry"; 352 case ISD::SADDO: return "saddo"; 353 case ISD::UADDO: return "uaddo"; 354 case ISD::SSUBO: return "ssubo"; 355 case ISD::USUBO: return "usubo"; 356 case ISD::SMULO: return "smulo"; 357 case ISD::UMULO: return "umulo"; 358 case ISD::SUBC: return "subc"; 359 case ISD::SUBE: return "sube"; 360 case ISD::USUBO_CARRY: return "usubo_carry"; 361 case ISD::SSUBO_CARRY: return "ssubo_carry"; 362 case ISD::SHL_PARTS: return "shl_parts"; 363 case ISD::SRA_PARTS: return "sra_parts"; 364 case ISD::SRL_PARTS: return "srl_parts"; 365 366 case ISD::SADDSAT: return "saddsat"; 367 case ISD::UADDSAT: return "uaddsat"; 368 case ISD::SSUBSAT: return "ssubsat"; 369 case ISD::USUBSAT: return "usubsat"; 370 case ISD::SSHLSAT: return "sshlsat"; 371 case ISD::USHLSAT: return "ushlsat"; 372 373 case ISD::SMULFIX: return "smulfix"; 374 case ISD::SMULFIXSAT: return "smulfixsat"; 375 case ISD::UMULFIX: return "umulfix"; 376 case ISD::UMULFIXSAT: return "umulfixsat"; 377 378 case ISD::SDIVFIX: return "sdivfix"; 379 case ISD::SDIVFIXSAT: return "sdivfixsat"; 380 case ISD::UDIVFIX: return "udivfix"; 381 case ISD::UDIVFIXSAT: return "udivfixsat"; 382 383 // Conversion operators. 384 case ISD::SIGN_EXTEND: return "sign_extend"; 385 case ISD::ZERO_EXTEND: return "zero_extend"; 386 case ISD::ANY_EXTEND: return "any_extend"; 387 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 388 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg"; 389 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg"; 390 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg"; 391 case ISD::TRUNCATE: return "truncate"; 392 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s"; 393 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u"; 394 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u"; 395 case ISD::FP_ROUND: return "fp_round"; 396 case ISD::STRICT_FP_ROUND: return "strict_fp_round"; 397 case ISD::FP_EXTEND: return "fp_extend"; 398 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend"; 399 400 case ISD::SINT_TO_FP: return "sint_to_fp"; 401 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp"; 402 case ISD::UINT_TO_FP: return "uint_to_fp"; 403 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp"; 404 case ISD::FP_TO_SINT: return "fp_to_sint"; 405 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint"; 406 case ISD::FP_TO_UINT: return "fp_to_uint"; 407 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint"; 408 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat"; 409 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat"; 410 case ISD::BITCAST: return "bitcast"; 411 case ISD::ADDRSPACECAST: return "addrspacecast"; 412 case ISD::FP16_TO_FP: return "fp16_to_fp"; 413 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp"; 414 case ISD::FP_TO_FP16: return "fp_to_fp16"; 415 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16"; 416 case ISD::BF16_TO_FP: return "bf16_to_fp"; 417 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp"; 418 case ISD::FP_TO_BF16: return "fp_to_bf16"; 419 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16"; 420 case ISD::LROUND: return "lround"; 421 case ISD::STRICT_LROUND: return "strict_lround"; 422 case ISD::LLROUND: return "llround"; 423 case ISD::STRICT_LLROUND: return "strict_llround"; 424 case ISD::LRINT: return "lrint"; 425 case ISD::STRICT_LRINT: return "strict_lrint"; 426 case ISD::LLRINT: return "llrint"; 427 case ISD::STRICT_LLRINT: return "strict_llrint"; 428 429 // Control flow instructions 430 case ISD::BR: return "br"; 431 case ISD::BRIND: return "brind"; 432 case ISD::BR_JT: return "br_jt"; 433 case ISD::BRCOND: return "brcond"; 434 case ISD::BR_CC: return "br_cc"; 435 case ISD::CALLSEQ_START: return "callseq_start"; 436 case ISD::CALLSEQ_END: return "callseq_end"; 437 438 // EH instructions 439 case ISD::CATCHRET: return "catchret"; 440 case ISD::CLEANUPRET: return "cleanupret"; 441 442 // Other operators 443 case ISD::LOAD: return "load"; 444 case ISD::STORE: return "store"; 445 case ISD::MLOAD: return "masked_load"; 446 case ISD::MSTORE: return "masked_store"; 447 case ISD::MGATHER: return "masked_gather"; 448 case ISD::MSCATTER: return "masked_scatter"; 449 case ISD::VECTOR_COMPRESS: return "vector_compress"; 450 case ISD::VAARG: return "vaarg"; 451 case ISD::VACOPY: return "vacopy"; 452 case ISD::VAEND: return "vaend"; 453 case ISD::VASTART: return "vastart"; 454 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 455 case ISD::EXTRACT_ELEMENT: return "extract_element"; 456 case ISD::BUILD_PAIR: return "build_pair"; 457 case ISD::STACKSAVE: return "stacksave"; 458 case ISD::STACKRESTORE: return "stackrestore"; 459 case ISD::TRAP: return "trap"; 460 case ISD::DEBUGTRAP: return "debugtrap"; 461 case ISD::UBSANTRAP: return "ubsantrap"; 462 case ISD::LIFETIME_START: return "lifetime.start"; 463 case ISD::LIFETIME_END: return "lifetime.end"; 464 case ISD::FAKE_USE: 465 return "fake_use"; 466 case ISD::PSEUDO_PROBE: 467 return "pseudoprobe"; 468 case ISD::GC_TRANSITION_START: return "gc_transition.start"; 469 case ISD::GC_TRANSITION_END: return "gc_transition.end"; 470 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset"; 471 case ISD::FREEZE: return "freeze"; 472 case ISD::PREALLOCATED_SETUP: 473 return "call_setup"; 474 case ISD::PREALLOCATED_ARG: 475 return "call_alloc"; 476 477 // Floating point environment manipulation 478 case ISD::GET_ROUNDING: return "get_rounding"; 479 case ISD::SET_ROUNDING: return "set_rounding"; 480 case ISD::GET_FPENV: return "get_fpenv"; 481 case ISD::SET_FPENV: return "set_fpenv"; 482 case ISD::RESET_FPENV: return "reset_fpenv"; 483 case ISD::GET_FPENV_MEM: return "get_fpenv_mem"; 484 case ISD::SET_FPENV_MEM: return "set_fpenv_mem"; 485 case ISD::GET_FPMODE: return "get_fpmode"; 486 case ISD::SET_FPMODE: return "set_fpmode"; 487 case ISD::RESET_FPMODE: return "reset_fpmode"; 488 489 // Convergence control instructions 490 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor"; 491 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry"; 492 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop"; 493 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue"; 494 495 // Bit manipulation 496 case ISD::ABS: return "abs"; 497 case ISD::BITREVERSE: return "bitreverse"; 498 case ISD::BSWAP: return "bswap"; 499 case ISD::CTPOP: return "ctpop"; 500 case ISD::CTTZ: return "cttz"; 501 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; 502 case ISD::CTLZ: return "ctlz"; 503 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; 504 case ISD::PARITY: return "parity"; 505 506 // Trampolines 507 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 508 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 509 510 // clang-format on 511 512 case ISD::CONDCODE: 513 switch (cast<CondCodeSDNode>(this)->get()) { 514 default: llvm_unreachable("Unknown setcc condition!"); 515 case ISD::SETOEQ: return "setoeq"; 516 case ISD::SETOGT: return "setogt"; 517 case ISD::SETOGE: return "setoge"; 518 case ISD::SETOLT: return "setolt"; 519 case ISD::SETOLE: return "setole"; 520 case ISD::SETONE: return "setone"; 521 522 case ISD::SETO: return "seto"; 523 case ISD::SETUO: return "setuo"; 524 case ISD::SETUEQ: return "setueq"; 525 case ISD::SETUGT: return "setugt"; 526 case ISD::SETUGE: return "setuge"; 527 case ISD::SETULT: return "setult"; 528 case ISD::SETULE: return "setule"; 529 case ISD::SETUNE: return "setune"; 530 531 case ISD::SETEQ: return "seteq"; 532 case ISD::SETGT: return "setgt"; 533 case ISD::SETGE: return "setge"; 534 case ISD::SETLT: return "setlt"; 535 case ISD::SETLE: return "setle"; 536 case ISD::SETNE: return "setne"; 537 538 case ISD::SETTRUE: return "settrue"; 539 case ISD::SETTRUE2: return "settrue2"; 540 case ISD::SETFALSE: return "setfalse"; 541 case ISD::SETFALSE2: return "setfalse2"; 542 } 543 case ISD::VECREDUCE_FADD: return "vecreduce_fadd"; 544 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd"; 545 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul"; 546 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul"; 547 case ISD::VECREDUCE_ADD: return "vecreduce_add"; 548 case ISD::VECREDUCE_MUL: return "vecreduce_mul"; 549 case ISD::VECREDUCE_AND: return "vecreduce_and"; 550 case ISD::VECREDUCE_OR: return "vecreduce_or"; 551 case ISD::VECREDUCE_XOR: return "vecreduce_xor"; 552 case ISD::VECREDUCE_SMAX: return "vecreduce_smax"; 553 case ISD::VECREDUCE_SMIN: return "vecreduce_smin"; 554 case ISD::VECREDUCE_UMAX: return "vecreduce_umax"; 555 case ISD::VECREDUCE_UMIN: return "vecreduce_umin"; 556 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax"; 557 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin"; 558 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum"; 559 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum"; 560 case ISD::STACKMAP: 561 return "stackmap"; 562 case ISD::PATCHPOINT: 563 return "patchpoint"; 564 case ISD::CLEAR_CACHE: 565 return "clear_cache"; 566 567 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM: 568 return "histogram"; 569 570 case ISD::VECTOR_FIND_LAST_ACTIVE: 571 return "find_last_active"; 572 573 // Vector Predication 574 #define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \ 575 case ISD::SDID: \ 576 return #NAME; 577 #include "llvm/IR/VPIntrinsics.def" 578 } 579 } 580 581 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 582 switch (AM) { 583 default: return ""; 584 case ISD::PRE_INC: return "<pre-inc>"; 585 case ISD::PRE_DEC: return "<pre-dec>"; 586 case ISD::POST_INC: return "<post-inc>"; 587 case ISD::POST_DEC: return "<post-dec>"; 588 } 589 } 590 591 static Printable PrintNodeId(const SDNode &Node) { 592 return Printable([&Node](raw_ostream &OS) { 593 #ifndef NDEBUG 594 OS << 't' << Node.PersistentId; 595 #else 596 OS << (const void*)&Node; 597 #endif 598 }); 599 } 600 601 // Print the MMO with more information from the SelectionDAG. 602 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 603 const MachineFunction *MF, const Module *M, 604 const MachineFrameInfo *MFI, 605 const TargetInstrInfo *TII, LLVMContext &Ctx) { 606 ModuleSlotTracker MST(M); 607 if (MF) 608 MST.incorporateFunction(MF->getFunction()); 609 SmallVector<StringRef, 0> SSNs; 610 MMO.print(OS, MST, SSNs, Ctx, MFI, TII); 611 } 612 613 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 614 const SelectionDAG *G) { 615 if (G) { 616 const MachineFunction *MF = &G->getMachineFunction(); 617 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(), 618 &MF->getFrameInfo(), 619 G->getSubtarget().getInstrInfo(), *G->getContext()); 620 } 621 622 LLVMContext Ctx; 623 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr, 624 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx); 625 } 626 627 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 628 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); } 629 630 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const { 631 print(dbgs(), G); 632 dbgs() << '\n'; 633 } 634 #endif 635 636 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 637 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 638 if (i) OS << ","; 639 if (getValueType(i) == MVT::Other) 640 OS << "ch"; 641 else 642 OS << getValueType(i).getEVTString(); 643 } 644 } 645 646 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 647 if (getFlags().hasNoUnsignedWrap()) 648 OS << " nuw"; 649 650 if (getFlags().hasNoSignedWrap()) 651 OS << " nsw"; 652 653 if (getFlags().hasExact()) 654 OS << " exact"; 655 656 if (getFlags().hasDisjoint()) 657 OS << " disjoint"; 658 659 if (getFlags().hasSameSign()) 660 OS << " samesign"; 661 662 if (getFlags().hasNonNeg()) 663 OS << " nneg"; 664 665 if (getFlags().hasNoNaNs()) 666 OS << " nnan"; 667 668 if (getFlags().hasNoInfs()) 669 OS << " ninf"; 670 671 if (getFlags().hasNoSignedZeros()) 672 OS << " nsz"; 673 674 if (getFlags().hasAllowReciprocal()) 675 OS << " arcp"; 676 677 if (getFlags().hasAllowContract()) 678 OS << " contract"; 679 680 if (getFlags().hasApproximateFuncs()) 681 OS << " afn"; 682 683 if (getFlags().hasAllowReassociation()) 684 OS << " reassoc"; 685 686 if (getFlags().hasNoFPExcept()) 687 OS << " nofpexcept"; 688 689 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 690 if (!MN->memoperands_empty()) { 691 OS << "<"; 692 OS << "Mem:"; 693 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 694 e = MN->memoperands_end(); i != e; ++i) { 695 printMemOperand(OS, **i, G); 696 if (std::next(i) != e) 697 OS << " "; 698 } 699 OS << ">"; 700 } 701 } else if (const ShuffleVectorSDNode *SVN = 702 dyn_cast<ShuffleVectorSDNode>(this)) { 703 OS << "<"; 704 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 705 int Idx = SVN->getMaskElt(i); 706 if (i) OS << ","; 707 if (Idx < 0) 708 OS << "u"; 709 else 710 OS << Idx; 711 } 712 OS << ">"; 713 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 714 OS << '<' << CSDN->getAPIntValue() << '>'; 715 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 716 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle()) 717 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 718 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble()) 719 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 720 else { 721 OS << "<APFloat("; 722 CSDN->getValueAPF().bitcastToAPInt().print(OS, false); 723 OS << ")>"; 724 } 725 } else if (const GlobalAddressSDNode *GADN = 726 dyn_cast<GlobalAddressSDNode>(this)) { 727 int64_t offset = GADN->getOffset(); 728 OS << '<'; 729 GADN->getGlobal()->printAsOperand(OS); 730 OS << '>'; 731 if (offset > 0) 732 OS << " + " << offset; 733 else 734 OS << " " << offset; 735 if (unsigned int TF = GADN->getTargetFlags()) 736 OS << " [TF=" << TF << ']'; 737 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 738 OS << "<" << FIDN->getIndex() << ">"; 739 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 740 OS << "<" << JTDN->getIndex() << ">"; 741 if (unsigned int TF = JTDN->getTargetFlags()) 742 OS << " [TF=" << TF << ']'; 743 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 744 int offset = CP->getOffset(); 745 if (CP->isMachineConstantPoolEntry()) 746 OS << "<" << *CP->getMachineCPVal() << ">"; 747 else 748 OS << "<" << *CP->getConstVal() << ">"; 749 if (offset > 0) 750 OS << " + " << offset; 751 else 752 OS << " " << offset; 753 if (unsigned int TF = CP->getTargetFlags()) 754 OS << " [TF=" << TF << ']'; 755 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) { 756 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">"; 757 if (unsigned TF = TI->getTargetFlags()) 758 OS << " [TF=" << TF << ']'; 759 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 760 OS << "<"; 761 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 762 if (LBB) 763 OS << LBB->getName() << " "; 764 OS << (const void*)BBDN->getBasicBlock() << ">"; 765 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 766 OS << ' ' << printReg(R->getReg(), 767 G ? G->getSubtarget().getRegisterInfo() : nullptr); 768 } else if (const ExternalSymbolSDNode *ES = 769 dyn_cast<ExternalSymbolSDNode>(this)) { 770 OS << "'" << ES->getSymbol() << "'"; 771 if (unsigned int TF = ES->getTargetFlags()) 772 OS << " [TF=" << TF << ']'; 773 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 774 if (M->getValue()) 775 OS << "<" << M->getValue() << ">"; 776 else 777 OS << "<null>"; 778 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 779 if (MD->getMD()) 780 OS << "<" << MD->getMD() << ">"; 781 else 782 OS << "<null>"; 783 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 784 OS << ":" << N->getVT(); 785 } 786 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 787 OS << "<"; 788 789 printMemOperand(OS, *LD->getMemOperand(), G); 790 791 bool doExt = true; 792 switch (LD->getExtensionType()) { 793 default: doExt = false; break; 794 case ISD::EXTLOAD: OS << ", anyext"; break; 795 case ISD::SEXTLOAD: OS << ", sext"; break; 796 case ISD::ZEXTLOAD: OS << ", zext"; break; 797 } 798 if (doExt) 799 OS << " from " << LD->getMemoryVT(); 800 801 const char *AM = getIndexedModeName(LD->getAddressingMode()); 802 if (*AM) 803 OS << ", " << AM; 804 805 OS << ">"; 806 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 807 OS << "<"; 808 printMemOperand(OS, *ST->getMemOperand(), G); 809 810 if (ST->isTruncatingStore()) 811 OS << ", trunc to " << ST->getMemoryVT(); 812 813 const char *AM = getIndexedModeName(ST->getAddressingMode()); 814 if (*AM) 815 OS << ", " << AM; 816 817 OS << ">"; 818 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) { 819 OS << "<"; 820 821 printMemOperand(OS, *MLd->getMemOperand(), G); 822 823 bool doExt = true; 824 switch (MLd->getExtensionType()) { 825 default: doExt = false; break; 826 case ISD::EXTLOAD: OS << ", anyext"; break; 827 case ISD::SEXTLOAD: OS << ", sext"; break; 828 case ISD::ZEXTLOAD: OS << ", zext"; break; 829 } 830 if (doExt) 831 OS << " from " << MLd->getMemoryVT(); 832 833 const char *AM = getIndexedModeName(MLd->getAddressingMode()); 834 if (*AM) 835 OS << ", " << AM; 836 837 if (MLd->isExpandingLoad()) 838 OS << ", expanding"; 839 840 OS << ">"; 841 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) { 842 OS << "<"; 843 printMemOperand(OS, *MSt->getMemOperand(), G); 844 845 if (MSt->isTruncatingStore()) 846 OS << ", trunc to " << MSt->getMemoryVT(); 847 848 const char *AM = getIndexedModeName(MSt->getAddressingMode()); 849 if (*AM) 850 OS << ", " << AM; 851 852 if (MSt->isCompressingStore()) 853 OS << ", compressing"; 854 855 OS << ">"; 856 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) { 857 OS << "<"; 858 printMemOperand(OS, *MGather->getMemOperand(), G); 859 860 bool doExt = true; 861 switch (MGather->getExtensionType()) { 862 default: doExt = false; break; 863 case ISD::EXTLOAD: OS << ", anyext"; break; 864 case ISD::SEXTLOAD: OS << ", sext"; break; 865 case ISD::ZEXTLOAD: OS << ", zext"; break; 866 } 867 if (doExt) 868 OS << " from " << MGather->getMemoryVT(); 869 870 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned"; 871 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled"; 872 OS << ", " << Signed << " " << Scaled << " offset"; 873 874 OS << ">"; 875 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) { 876 OS << "<"; 877 printMemOperand(OS, *MScatter->getMemOperand(), G); 878 879 if (MScatter->isTruncatingStore()) 880 OS << ", trunc to " << MScatter->getMemoryVT(); 881 882 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned"; 883 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled"; 884 OS << ", " << Signed << " " << Scaled << " offset"; 885 886 OS << ">"; 887 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) { 888 OS << "<"; 889 printMemOperand(OS, *M->getMemOperand(), G); 890 if (auto *A = dyn_cast<AtomicSDNode>(M)) 891 if (A->getOpcode() == ISD::ATOMIC_LOAD) { 892 bool doExt = true; 893 switch (A->getExtensionType()) { 894 default: doExt = false; break; 895 case ISD::EXTLOAD: OS << ", anyext"; break; 896 case ISD::SEXTLOAD: OS << ", sext"; break; 897 case ISD::ZEXTLOAD: OS << ", zext"; break; 898 } 899 if (doExt) 900 OS << " from " << A->getMemoryVT(); 901 } 902 OS << ">"; 903 } else if (const BlockAddressSDNode *BA = 904 dyn_cast<BlockAddressSDNode>(this)) { 905 int64_t offset = BA->getOffset(); 906 OS << "<"; 907 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false); 908 OS << ", "; 909 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false); 910 OS << ">"; 911 if (offset > 0) 912 OS << " + " << offset; 913 else 914 OS << " " << offset; 915 if (unsigned int TF = BA->getTargetFlags()) 916 OS << " [TF=" << TF << ']'; 917 } else if (const AddrSpaceCastSDNode *ASC = 918 dyn_cast<AddrSpaceCastSDNode>(this)) { 919 OS << '[' 920 << ASC->getSrcAddressSpace() 921 << " -> " 922 << ASC->getDestAddressSpace() 923 << ']'; 924 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) { 925 if (LN->hasOffset()) 926 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">"; 927 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) { 928 OS << '<' << AA->getAlign().value() << '>'; 929 } 930 931 if (VerboseDAGDumping) { 932 if (unsigned Order = getIROrder()) 933 OS << " [ORD=" << Order << ']'; 934 935 if (getNodeId() != -1) 936 OS << " [ID=" << getNodeId() << ']'; 937 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this)))) 938 OS << " # D:" << isDivergent(); 939 940 if (G && !G->GetDbgValues(this).empty()) { 941 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']'; 942 for (SDDbgValue *Dbg : G->GetDbgValues(this)) 943 if (!Dbg->isInvalidated()) 944 Dbg->print(OS); 945 } else if (getHasDebugValue()) 946 OS << " [NoOfDbgValues>0]"; 947 948 if (const auto *MD = G ? G->getPCSections(this) : nullptr) { 949 OS << " [pcsections "; 950 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent()); 951 OS << ']'; 952 } 953 954 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) { 955 OS << " [mmra "; 956 MMRA->printAsOperand(OS, 957 G->getMachineFunction().getFunction().getParent()); 958 OS << ']'; 959 } 960 } 961 } 962 963 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const { 964 OS << " DbgVal(Order=" << getOrder() << ')'; 965 if (isInvalidated()) 966 OS << "(Invalidated)"; 967 if (isEmitted()) 968 OS << "(Emitted)"; 969 OS << "("; 970 bool Comma = false; 971 for (const SDDbgOperand &Op : getLocationOps()) { 972 if (Comma) 973 OS << ", "; 974 switch (Op.getKind()) { 975 case SDDbgOperand::SDNODE: 976 if (Op.getSDNode()) 977 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo(); 978 else 979 OS << "SDNODE"; 980 break; 981 case SDDbgOperand::CONST: 982 OS << "CONST"; 983 break; 984 case SDDbgOperand::FRAMEIX: 985 OS << "FRAMEIX=" << Op.getFrameIx(); 986 break; 987 case SDDbgOperand::VREG: 988 OS << "VREG=" << Op.getVReg(); 989 break; 990 } 991 Comma = true; 992 } 993 OS << ")"; 994 if (isIndirect()) OS << "(Indirect)"; 995 if (isVariadic()) 996 OS << "(Variadic)"; 997 OS << ":\"" << Var->getName() << '"'; 998 #ifndef NDEBUG 999 if (Expr->getNumElements()) 1000 Expr->dump(); 1001 #endif 1002 } 1003 1004 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1005 LLVM_DUMP_METHOD void SDDbgValue::dump() const { 1006 if (isInvalidated()) 1007 return; 1008 print(dbgs()); 1009 dbgs() << "\n"; 1010 } 1011 #endif 1012 1013 /// Return true if this node is so simple that we should just print it inline 1014 /// if it appears as an operand. 1015 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) { 1016 // Avoid lots of cluttering when inline printing nodes with associated 1017 // DbgValues in verbose mode. 1018 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty()) 1019 return false; 1020 if (Node.getOpcode() == ISD::EntryToken) 1021 return false; 1022 return Node.getNumOperands() == 0; 1023 } 1024 1025 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1026 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 1027 for (const SDValue &Op : N->op_values()) { 1028 if (shouldPrintInline(*Op.getNode(), G)) 1029 continue; 1030 if (Op.getNode()->hasOneUse()) 1031 DumpNodes(Op.getNode(), indent+2, G); 1032 } 1033 1034 dbgs().indent(indent); 1035 N->dump(G); 1036 } 1037 1038 LLVM_DUMP_METHOD void SelectionDAG::dump() const { 1039 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n"; 1040 1041 for (const SDNode &N : allnodes()) { 1042 if (!N.hasOneUse() && &N != getRoot().getNode() && 1043 (!shouldPrintInline(N, this) || N.use_empty())) 1044 DumpNodes(&N, 2, this); 1045 } 1046 1047 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 1048 dbgs() << "\n"; 1049 1050 if (VerboseDAGDumping) { 1051 if (DbgBegin() != DbgEnd()) 1052 dbgs() << "SDDbgValues:\n"; 1053 for (auto *Dbg : make_range(DbgBegin(), DbgEnd())) 1054 Dbg->dump(); 1055 if (ByvalParmDbgBegin() != ByvalParmDbgEnd()) 1056 dbgs() << "Byval SDDbgValues:\n"; 1057 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd())) 1058 Dbg->dump(); 1059 } 1060 dbgs() << "\n"; 1061 } 1062 #endif 1063 1064 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 1065 OS << PrintNodeId(*this) << ": "; 1066 print_types(OS, G); 1067 OS << " = " << getOperationName(G); 1068 print_details(OS, G); 1069 } 1070 1071 static bool printOperand(raw_ostream &OS, const SelectionDAG *G, 1072 const SDValue Value) { 1073 if (!Value.getNode()) { 1074 OS << "<null>"; 1075 return false; 1076 } 1077 1078 if (shouldPrintInline(*Value.getNode(), G)) { 1079 OS << Value->getOperationName(G) << ':'; 1080 Value->print_types(OS, G); 1081 Value->print_details(OS, G); 1082 return true; 1083 } 1084 1085 OS << PrintNodeId(*Value.getNode()); 1086 if (unsigned RN = Value.getResNo()) 1087 OS << ':' << RN; 1088 return false; 1089 } 1090 1091 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1092 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>; 1093 1094 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 1095 const SelectionDAG *G, VisitedSDNodeSet &once) { 1096 if (!once.insert(N).second) // If we've been here before, return now. 1097 return; 1098 1099 // Dump the current SDNode, but don't end the line yet. 1100 OS.indent(indent); 1101 N->printr(OS, G); 1102 1103 // Having printed this SDNode, walk the children: 1104 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 1105 if (i) OS << ","; 1106 OS << " "; 1107 1108 const SDValue Op = N->getOperand(i); 1109 bool printedInline = printOperand(OS, G, Op); 1110 if (printedInline) 1111 once.insert(Op.getNode()); 1112 } 1113 1114 OS << "\n"; 1115 1116 // Dump children that have grandchildren on their own line(s). 1117 for (const SDValue &Op : N->op_values()) 1118 DumpNodesr(OS, Op.getNode(), indent+2, G, once); 1119 } 1120 1121 LLVM_DUMP_METHOD void SDNode::dumpr() const { 1122 VisitedSDNodeSet once; 1123 DumpNodesr(dbgs(), this, 0, nullptr, once); 1124 } 1125 1126 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const { 1127 VisitedSDNodeSet once; 1128 DumpNodesr(dbgs(), this, 0, G, once); 1129 } 1130 #endif 1131 1132 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 1133 const SelectionDAG *G, unsigned depth, 1134 unsigned indent) { 1135 if (depth == 0) 1136 return; 1137 1138 OS.indent(indent); 1139 1140 N->print(OS, G); 1141 1142 for (const SDValue &Op : N->op_values()) { 1143 // Don't follow chain operands. 1144 if (Op.getValueType() == MVT::Other) 1145 continue; 1146 OS << '\n'; 1147 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2); 1148 } 1149 } 1150 1151 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 1152 unsigned depth) const { 1153 printrWithDepthHelper(OS, this, G, depth, 0); 1154 } 1155 1156 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 1157 // Don't print impossibly deep things. 1158 printrWithDepth(OS, G, 10); 1159 } 1160 1161 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1162 LLVM_DUMP_METHOD 1163 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 1164 printrWithDepth(dbgs(), G, depth); 1165 } 1166 1167 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const { 1168 // Don't print impossibly deep things. 1169 dumprWithDepth(G, 10); 1170 } 1171 #endif 1172 1173 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 1174 printr(OS, G); 1175 // Under VerboseDAGDumping divergence will be printed always. 1176 if (isDivergent() && !VerboseDAGDumping) 1177 OS << " # D:1"; 1178 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1179 if (i) OS << ", "; else OS << " "; 1180 printOperand(OS, G, getOperand(i)); 1181 } 1182 if (DebugLoc DL = getDebugLoc()) { 1183 OS << ", "; 1184 DL.print(OS); 1185 } 1186 } 1187