xref: /llvm-project/llvm/lib/CodeGen/LiveRegUnits.cpp (revision 243632c63eb9f3e2e746cfb88e7b05a50b5edd4d)
1 //===- LiveRegUnits.cpp - Register Unit Set -------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file This file imlements the LiveRegUnits set.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "llvm/CodeGen/LiveRegUnits.h"
14 #include "llvm/CodeGen/MachineBasicBlock.h"
15 #include "llvm/CodeGen/MachineFrameInfo.h"
16 #include "llvm/CodeGen/MachineFunction.h"
17 #include "llvm/CodeGen/MachineOperand.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 
20 using namespace llvm;
21 
22 void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) {
23   for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
24     for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
25       if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
26         Units.reset(U);
27     }
28   }
29 }
30 
31 void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
32   for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
33     for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
34       if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
35         Units.set(U);
36     }
37   }
38 }
39 
40 void LiveRegUnits::stepBackward(const MachineInstr &MI) {
41   // Remove defined registers and regmask kills from the set.
42   for (const MachineOperand &MOP : MI.operands()) {
43     if (MOP.isReg()) {
44       if (MOP.isDef() && MOP.getReg().isPhysical())
45         removeReg(MOP.getReg());
46       continue;
47     }
48 
49     if (MOP.isRegMask()) {
50       removeRegsNotPreserved(MOP.getRegMask());
51       continue;
52     }
53   }
54 
55   // Add uses to the set.
56   for (const MachineOperand &MOP : MI.operands()) {
57     if (!MOP.isReg() || !MOP.readsReg())
58       continue;
59 
60     if (MOP.getReg().isPhysical())
61       addReg(MOP.getReg());
62   }
63 }
64 
65 void LiveRegUnits::accumulate(const MachineInstr &MI) {
66   // Add defs, uses and regmask clobbers to the set.
67   for (const MachineOperand &MOP : MI.operands()) {
68     if (MOP.isReg()) {
69       if (!MOP.getReg().isPhysical())
70         continue;
71       if (MOP.isDef() || MOP.readsReg())
72         addReg(MOP.getReg());
73       continue;
74     }
75 
76     if (MOP.isRegMask()) {
77       addRegsInMask(MOP.getRegMask());
78       continue;
79     }
80   }
81 }
82 
83 /// Add live-in registers of basic block \p MBB to \p LiveUnits.
84 static void addBlockLiveIns(LiveRegUnits &LiveUnits,
85                             const MachineBasicBlock &MBB) {
86   for (const auto &LI : MBB.liveins())
87     LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
88 }
89 
90 /// Adds all callee saved registers to \p LiveUnits.
91 static void addCalleeSavedRegs(LiveRegUnits &LiveUnits,
92                                const MachineFunction &MF) {
93   const MachineRegisterInfo &MRI = MF.getRegInfo();
94   const MachineFrameInfo &MFI = MF.getFrameInfo();
95   for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR) {
96     const unsigned N = *CSR;
97 
98     const auto &CSI = MFI.getCalleeSavedInfo();
99     auto Info =
100         llvm::find_if(CSI, [N](auto Info) { return Info.getReg() == N; });
101     // If we have no info for this callee-saved register, assume it is liveout
102     if (Info == CSI.end() || Info->isRestored())
103       LiveUnits.addReg(N);
104   }
105 }
106 
107 void LiveRegUnits::addPristines(const MachineFunction &MF) {
108   const MachineFrameInfo &MFI = MF.getFrameInfo();
109   if (!MFI.isCalleeSavedInfoValid())
110     return;
111   /// This function will usually be called on an empty object, handle this
112   /// as a special case.
113   if (empty()) {
114     /// Add all callee saved regs, then remove the ones that are saved and
115     /// restored.
116     addCalleeSavedRegs(*this, MF);
117     /// Remove the ones that are not saved/restored; they are pristine.
118     for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
119       removeReg(Info.getReg());
120     return;
121   }
122   /// If a callee-saved register that is not pristine is already present
123   /// in the set, we should make sure that it stays in it. Precompute the
124   /// set of pristine registers in a separate object.
125   /// Add all callee saved regs, then remove the ones that are saved+restored.
126   LiveRegUnits Pristine(*TRI);
127   addCalleeSavedRegs(Pristine, MF);
128   /// Remove the ones that are not saved/restored; they are pristine.
129   for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
130     Pristine.removeReg(Info.getReg());
131   addUnits(Pristine.getBitVector());
132 }
133 
134 void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) {
135   const MachineFunction &MF = *MBB.getParent();
136 
137   addPristines(MF);
138 
139   // To get the live-outs we simply merge the live-ins of all successors.
140   for (const MachineBasicBlock *Succ : MBB.successors())
141     addBlockLiveIns(*this, *Succ);
142 
143   // For the return block: Add all callee saved registers.
144   if (MBB.isReturnBlock()) {
145     const MachineFrameInfo &MFI = MF.getFrameInfo();
146     if (MFI.isCalleeSavedInfoValid())
147       addCalleeSavedRegs(*this, MF);
148   }
149 }
150 
151 void LiveRegUnits::addLiveIns(const MachineBasicBlock &MBB) {
152   const MachineFunction &MF = *MBB.getParent();
153   addPristines(MF);
154   addBlockLiveIns(*this, MBB);
155 }
156