1.. 2 ************************************************** 3 * * 4 * Automatically generated file, do not edit! * 5 * * 6 ************************************************** 7 8.. _amdgpu_synid_gfx11_vaddr_0bfea4: 9 10vaddr 11===== 12 13Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image. 14 15This operand may be specified using either :ref:`standard VGPR syntax<amdgpu_synid_v>` or special :ref:`NSA VGPR syntax<amdgpu_synid_nsa>`. 16 17*Size:* 8-12 dwords. Actual size depends on opcode and :ref:`a16<amdgpu_synid_a16>`. 18 19 This instruction expects NSA address to be partitioned into 5 groups; registers within each group must be contiguous. 20 21 Examples: 22 23 .. parsed-literal:: 24 25 image_bvh_intersect_ray v[4:7], v[9:16], s[4:7] 26 image_bvh64_intersect_ray v[5:8], v[1:12], s[8:11] 27 image_bvh_intersect_ray v[39:42], [v50, v46, v[20:22], v[40:42], v[47:49]], s[12:15] 28 image_bvh64_intersect_ray v[39:42], [v[50:51], v46, v[20:22], v[40:42], v[47:49]], s[12:15] 29 30*Operands:* :ref:`v<amdgpu_synid_v>` 31