xref: /llvm-project/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp (revision 660e34fd38c3fb39fba1871bbf5b2eb3a48bf277)
1 //===-- RegisterInfoPOSIX_riscv64.cpp -------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===---------------------------------------------------------------------===//
8 
9 #include <cassert>
10 #include <lldb/Utility/Flags.h>
11 #include <stddef.h>
12 
13 #include "lldb/lldb-defines.h"
14 #include "llvm/Support/Compiler.h"
15 
16 #include "RegisterInfoPOSIX_riscv64.h"
17 
18 #define GPR_OFFSET(idx) ((idx)*8 + 0)
19 #define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_riscv64::GPR))
20 
21 #define DECLARE_REGISTER_INFOS_RISCV64_STRUCT
22 #include "RegisterInfos_riscv64.h"
23 #undef DECLARE_REGISTER_INFOS_RISCV64_STRUCT
24 
25 // Number of register sets provided by this context.
26 enum {
27   k_num_gpr_registers = gpr_last_riscv - gpr_first_riscv + 1,
28   k_num_fpr_registers = fpr_last_riscv - fpr_first_riscv + 1,
29   k_num_register_sets_default = 1
30 };
31 
32 // RISC-V64 general purpose registers.
33 static const uint32_t g_gpr_regnums_riscv64[] = {
34     gpr_pc_riscv,  gpr_ra_riscv,       gpr_sp_riscv,  gpr_x3_riscv,
35     gpr_x4_riscv,  gpr_x5_riscv,       gpr_x6_riscv,  gpr_x7_riscv,
36     gpr_fp_riscv,  gpr_x9_riscv,       gpr_x10_riscv, gpr_x11_riscv,
37     gpr_x12_riscv, gpr_x13_riscv,      gpr_x14_riscv, gpr_x15_riscv,
38     gpr_x16_riscv, gpr_x17_riscv,      gpr_x18_riscv, gpr_x19_riscv,
39     gpr_x20_riscv, gpr_x21_riscv,      gpr_x22_riscv, gpr_x23_riscv,
40     gpr_x24_riscv, gpr_x25_riscv,      gpr_x26_riscv, gpr_x27_riscv,
41     gpr_x28_riscv, gpr_x29_riscv,      gpr_x30_riscv, gpr_x31_riscv,
42     gpr_x0_riscv,  LLDB_INVALID_REGNUM};
43 
44 static_assert(((sizeof g_gpr_regnums_riscv64 /
45                 sizeof g_gpr_regnums_riscv64[0]) -
46                1) == k_num_gpr_registers,
47               "g_gpr_regnums_riscv64 has wrong number of register infos");
48 
49 // Register sets for RISC-V64.
50 static const lldb_private::RegisterSet g_reg_set_gpr_riscv64 = {
51     "General Purpose Registers", "gpr", k_num_gpr_registers,
52     g_gpr_regnums_riscv64};
53 static const lldb_private::RegisterSet g_reg_set_fpr_riscv64 = {
54     "Floating Point Registers", "fpr", k_num_fpr_registers, nullptr};
55 
56 RegisterInfoPOSIX_riscv64::RegisterInfoPOSIX_riscv64(
57     const lldb_private::ArchSpec &target_arch, lldb_private::Flags opt_regsets)
58     : lldb_private::RegisterInfoAndSetInterface(target_arch),
59       m_opt_regsets(opt_regsets) {
60   switch (target_arch.GetMachine()) {
61   case llvm::Triple::riscv64: {
62     // By-default considering RISC-V has only GPR.
63     // Other register sets could be enabled optionally by opt_regsets.
64     AddRegSetGP();
65 
66     if (m_opt_regsets.AnySet(eRegsetMaskFP))
67       AddRegSetFP();
68 
69     break;
70   }
71   default:
72     assert(false && "Unhandled target architecture.");
73   }
74 }
75 
76 void RegisterInfoPOSIX_riscv64::AddRegSetGP() {
77   m_register_infos.resize(k_num_gpr_registers);
78   memcpy(&m_register_infos[0], g_register_infos_riscv64_gpr,
79          sizeof(g_register_infos_riscv64_gpr));
80   m_register_sets.push_back(g_reg_set_gpr_riscv64);
81 
82   m_per_regset_regnum_range[GPRegSet] =
83       std::make_pair(gpr_first_riscv, m_register_infos.size());
84 }
85 
86 void RegisterInfoPOSIX_riscv64::AddRegSetFP() {
87   const uint32_t register_info_count = m_register_infos.size();
88   const uint32_t register_set_count = m_register_sets.size();
89 
90   // Filling m_register_infos.
91   // For FPR case we do not need to correct register offsets and kinds
92   // while for other further cases (like VPR), register offset/kind
93   // should be started counting from the last one in previously added
94   // regset. This is needed for the case e.g. when architecture has GPR + VPR
95   // sets only.
96   m_register_infos.resize(register_info_count + k_num_fpr_registers);
97   memcpy(&m_register_infos[register_info_count], g_register_infos_riscv64_fpr,
98          sizeof(g_register_infos_riscv64_fpr));
99 
100   // Filling m_register_sets with enabled register set
101   for (uint32_t i = 0; i < k_num_fpr_registers; i++)
102     m_fp_regnum_collection.push_back(register_info_count + i);
103   m_register_sets.push_back(g_reg_set_fpr_riscv64);
104   m_register_sets.back().registers = m_fp_regnum_collection.data();
105 
106   m_per_regset_regnum_range[register_set_count] =
107       std::make_pair(register_info_count, m_register_infos.size());
108 }
109 
110 uint32_t RegisterInfoPOSIX_riscv64::GetRegisterCount() const {
111   return m_register_infos.size();
112 }
113 
114 size_t RegisterInfoPOSIX_riscv64::GetGPRSize() const {
115   return sizeof(struct RegisterInfoPOSIX_riscv64::GPR);
116 }
117 
118 size_t RegisterInfoPOSIX_riscv64::GetFPRSize() const {
119   return sizeof(struct RegisterInfoPOSIX_riscv64::FPR);
120 }
121 
122 const lldb_private::RegisterInfo *
123 RegisterInfoPOSIX_riscv64::GetRegisterInfo() const {
124   return m_register_infos.data();
125 }
126 
127 size_t RegisterInfoPOSIX_riscv64::GetRegisterSetCount() const {
128   return m_register_sets.size();
129 }
130 
131 size_t RegisterInfoPOSIX_riscv64::GetRegisterSetFromRegisterIndex(
132     uint32_t reg_index) const {
133   for (const auto &regset_range : m_per_regset_regnum_range) {
134     if (reg_index >= regset_range.second.first &&
135         reg_index < regset_range.second.second)
136       return regset_range.first;
137   }
138   return LLDB_INVALID_REGNUM;
139 }
140 
141 bool RegisterInfoPOSIX_riscv64::IsFPReg(unsigned reg) const {
142   return llvm::is_contained(m_fp_regnum_collection, reg);
143 }
144 
145 const lldb_private::RegisterSet *
146 RegisterInfoPOSIX_riscv64::GetRegisterSet(size_t set_index) const {
147   if (set_index < GetRegisterSetCount())
148     return &m_register_sets[set_index];
149   return nullptr;
150 }
151