1# REQUIRES: aarch64, x86 2# RUN: split-file %s %t.dir && cd %t.dir 3 4# RUN: llvm-mc -filetype=obj -triple=arm64ec-windows funcs.s -o funcs-arm64ec.obj 5# RUN: llvm-mc -filetype=obj -triple=aarch64-windows native-funcs.s -o funcs-aarch64.obj 6# RUN: llvm-mc -filetype=obj -triple=x86_64-windows space.s -o space-x86_64.obj 7# RUN: llvm-mc -filetype=obj -triple=aarch64-windows space.s -o space-aarch64.obj 8# RUN: llvm-mc -filetype=obj -triple=aarch64-windows %S/Inputs/loadconfig-arm64.s -o loadconfig-arm64.obj 9# RUN: llvm-mc -filetype=obj -triple=arm64ec-windows %S/Inputs/loadconfig-arm64ec.s -o loadconfig-arm64ec.obj 10 11 12# Test generating range extension thunks for ARM64EC code. Place some x86_64 chunks in a middle 13# and make sure that thunks stay in ARM64EC code range. 14 15# RUN: lld-link -machine:arm64ec -noentry -dll funcs-arm64ec.obj space-x86_64.obj loadconfig-arm64ec.obj -out:test.dll \ 16# RUN: -verbose 2>&1 | FileCheck -check-prefix=VERBOSE %s 17# VERBOSE: Added 3 thunks with margin {{.*}} in 1 passes 18 19# RUN: llvm-objdump -d test.dll | FileCheck --check-prefix=DISASM %s 20 21# DISASM: Disassembly of section .code1: 22# DISASM-EMPTY: 23# DISASM-NEXT: 0000000180004000 <.code1>: 24# DISASM-NEXT: 180004000: 36000040 tbz w0, #0x0, 0x180004008 <.code1+0x8> 25# DISASM-NEXT: 180004004: d65f03c0 ret 26# DISASM-NEXT: 180004008: b0000050 adrp x16, 0x18000d000 27# DISASM-NEXT: 18000400c: 91000210 add x16, x16, #0x0 28# DISASM-NEXT: 180004010: d61f0200 br x16 29# DISASM-EMPTY: 30# DISASM-NEXT: Disassembly of section .code2: 31# DISASM-EMPTY: 32# DISASM-NEXT: 0000000180005000 <.code2>: 33# DISASM-NEXT: ... 34# DISASM-EMPTY: 35# DISASM-NEXT: Disassembly of section .code3: 36# DISASM-EMPTY: 37# DISASM-NEXT: 0000000180006000 <.code3>: 38# DISASM-NEXT: ... 39# DISASM-NEXT: 18000d000: 36000060 tbz w0, #0x0, 0x18000d00c <.code3+0x700c> 40# DISASM-NEXT: 18000d004: d65f03c0 ret 41# DISASM-NEXT: 18000d008: 00000000 udf #0x0 42# DISASM-NEXT: 18000d00c: 90000050 adrp x16, 0x180015000 <.code3+0xf000> 43# DISASM-NEXT: 18000d010: 91006210 add x16, x16, #0x18 44# DISASM-NEXT: 18000d014: d61f0200 br x16 45# DISASM-NEXT: ... 46# DISASM-NEXT: 180015018: 36000040 tbz w0, #0x0, 0x180015020 <.code3+0xf020> 47# DISASM-NEXT: 18001501c: d65f03c0 ret 48# DISASM-NEXT: 180015020: f0ffff70 adrp x16, 0x180004000 <.code1> 49# DISASM-NEXT: 180015024: 91000210 add x16, x16, #0x0 50# DISASM-NEXT: 180015028: d61f0200 br x16 51 52# RUN: llvm-readobj --coff-load-config test.dll | FileCheck --check-prefix=LOADCFG %s 53 54# LOADCFG: CodeMap [ 55# LOADCFG-NEXT: 0x4000 - 0x4014 ARM64EC 56# LOADCFG-NEXT: 0x5000 - 0x5300 X64 57# LOADCFG-NEXT: 0x6000 - 0x1502C ARM64EC 58# LOADCFG-NEXT: ] 59 60 61# A similar test using a hybrid binary and native placeholder chunks. 62 63# RUN: lld-link -machine:arm64x -noentry -dll funcs-arm64ec.obj space-aarch64.obj loadconfig-arm64.obj loadconfig-arm64ec.obj \ 64# RUN: -out:testx.dll -verbose 2>&1 | FileCheck -check-prefix=VERBOSE %s 65# RUN: llvm-objdump -d testx.dll | FileCheck --check-prefix=DISASM %s 66 67# RUN: llvm-readobj --coff-load-config testx.dll | FileCheck --check-prefix=LOADCFGX %s 68 69# LOADCFGX: CodeMap [ 70# LOADCFGX-NEXT: 0x4000 - 0x4014 ARM64EC 71# LOADCFGX-NEXT: 0x5000 - 0x5300 ARM64 72# LOADCFGX-NEXT: 0x6000 - 0x1502C ARM64EC 73# LOADCFGX-NEXT: ] 74 75 76# Test a hybrid ARM64X binary which requires range extension thunks for both native and EC relocations. 77 78# RUN: lld-link -machine:arm64x -noentry -dll funcs-arm64ec.obj funcs-aarch64.obj loadconfig-arm64.obj loadconfig-arm64ec.obj \ 79# RUN: -out:testx2.dll -verbose 2>&1 | FileCheck -check-prefix=VERBOSEX %s 80# VERBOSEX: Added 5 thunks with margin {{.*}} in 1 passes 81 82# RUN: llvm-objdump -d testx2.dll | FileCheck --check-prefix=DISASMX %s 83 84# DISASMX: Disassembly of section .code1: 85# DISASMX-EMPTY: 86# DISASMX-NEXT: 0000000180004000 <.code1>: 87# DISASMX-NEXT: 180004000: 36000040 tbz w0, #0x0, 0x180004008 <.code1+0x8> 88# DISASMX-NEXT: 180004004: d65f03c0 ret 89# DISASMX-NEXT: 180004008: b0000050 adrp x16, 0x18000d000 90# DISASMX-NEXT: 18000400c: 91000210 add x16, x16, #0x0 91# DISASMX-NEXT: 180004010: d61f0200 br x16 92# DISASMX-EMPTY: 93# DISASMX-NEXT: Disassembly of section .code2: 94# DISASMX-EMPTY: 95# DISASMX-NEXT: 0000000180005000 <.code2>: 96# DISASMX-NEXT: 180005000: 36000040 tbz w0, #0x0, 0x180005008 <.code2+0x8> 97# DISASMX-NEXT: 180005004: d65f03c0 ret 98# DISASMX-NEXT: 180005008: b0000090 adrp x16, 0x180016000 99# DISASMX-NEXT: 18000500c: 91000210 add x16, x16, #0x0 100# DISASMX-NEXT: 180005010: d61f0200 br x16 101# DISASMX-EMPTY: 102# DISASMX-NEXT: Disassembly of section .code3: 103# DISASMX-EMPTY: 104# DISASMX-NEXT: 0000000180006000 <.code3>: 105# DISASMX-NEXT: ... 106# DISASMX-NEXT: 18000d000: 36000060 tbz w0, #0x0, 0x18000d00c <.code3+0x700c> 107# DISASMX-NEXT: 18000d004: d65f03c0 ret 108# DISASMX-NEXT: 18000d008: 00000000 udf #0x0 109# DISASMX-NEXT: 18000d00c: 90000050 adrp x16, 0x180015000 <.code3+0xf000> 110# DISASMX-NEXT: 18000d010: 91006210 add x16, x16, #0x18 111# DISASMX-NEXT: 18000d014: d61f0200 br x16 112# DISASMX-NEXT: ... 113# DISASMX-NEXT: 180015018: 36000040 tbz w0, #0x0, 0x180015020 <.code3+0xf020> 114# DISASMX-NEXT: 18001501c: d65f03c0 ret 115# DISASMX-NEXT: 180015020: f0ffff70 adrp x16, 0x180004000 <.code1> 116# DISASMX-NEXT: 180015024: 91000210 add x16, x16, #0x0 117# DISASMX-NEXT: 180015028: d61f0200 br x16 118# DISASMX-EMPTY: 119# DISASMX-NEXT: Disassembly of section .code4: 120# DISASMX-EMPTY: 121# DISASMX-NEXT: 0000000180016000 <.code4>: 122# DISASMX-NEXT: 180016000: 36000040 tbz w0, #0x0, 0x180016008 <.code4+0x8> 123# DISASMX-NEXT: 180016004: d65f03c0 ret 124# DISASMX-NEXT: 180016008: f0ffff70 adrp x16, 0x180005000 <.code2> 125# DISASMX-NEXT: 18001600c: 91000210 add x16, x16, #0x0 126# DISASMX-NEXT: 180016010: d61f0200 br x16 127 128# RUN: llvm-readobj --coff-load-config testx2.dll | FileCheck --check-prefix=LOADCFGX2 %s 129 130# LOADCFGX2: CodeMap [ 131# LOADCFGX2-NEXT: 0x4000 - 0x4014 ARM64EC 132# LOADCFGX2-NEXT: 0x5000 - 0x5014 ARM64 133# LOADCFGX2-NEXT: 0x6000 - 0x1502C ARM64EC 134# LOADCFGX2-NEXT: 0x16000 - 0x16014 ARM64 135# LOADCFGX2-NEXT: ] 136 137 138#--- funcs.s 139 .globl main 140 .globl func1 141 .globl func2 142 143 .section .code1, "xr" 144main: 145 tbz w0, #0, func1 146 ret 147 148 .section .code3$a, "xr" 149 .space 0x7000 150 151 .section .code3$b, "xr" 152func1: 153 tbz w0, #0, func2 154 ret 155 .space 1 156 157 .section .code3$c, "xr" 158 .space 0x8000 159 160 .section .code3$d, "xr" 161 .align 2 162func2: 163 tbz w0, #0, main 164 ret 165 166#--- space.s 167 .section .code2$a, "xr" 168 .space 0x100 169 .section .code2$b, "xr" 170 .space 0x100 171 .section .code2$c, "xr" 172 .space 0x100 173 174#--- native-funcs.s 175 .globl nmain 176 .globl nfunc 177 178 .section .code2, "xr" 179nmain: 180 tbz w0, #0, nfunc 181 ret 182 183 .section .code4, "xr" 184 .align 2 185nfunc: 186 tbz w0, #0, nmain 187 ret 188