1! RUN: %flang_fc1 -flang-experimental-hlfir -emit-llvm %s -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="LLVMIR","LLVM" %s 2! 3! RUN: %flang_fc1 -flang-experimental-hlfir -emit-llvm %s -triple ppc64-unknown-aix -o - | FileCheck --check-prefixes="BE-LLVMIR","LLVM" %s 4! REQUIRES: target=powerpc{{.*}} 5 6!---------------------- 7! vec_sld 8!---------------------- 9 10! LLVM-LABEL: vec_sld_test_i1i1 11subroutine vec_sld_test_i1i1(arg1, arg2) 12 vector(integer(1)) :: arg1, arg2, r 13 r = vec_sld(arg1, arg2, 3_1) 14 15! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 16! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 17! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 18! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 19 20! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 21! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 22! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 23! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 24end subroutine vec_sld_test_i1i1 25 26! LLVM-LABEL: vec_sld_test_i1i2 27subroutine vec_sld_test_i1i2(arg1, arg2) 28 vector(integer(1)) :: arg1, arg2, r 29 r = vec_sld(arg1, arg2, 3_2) 30 31! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 32! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 33! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 34! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 35 36! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 37! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 38! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 39! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 40end subroutine vec_sld_test_i1i2 41 42! LLVM-LABEL: vec_sld_test_i1i4 43subroutine vec_sld_test_i1i4(arg1, arg2) 44 vector(integer(1)) :: arg1, arg2, r 45 r = vec_sld(arg1, arg2, 3_4) 46 47! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 48! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 49! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 50! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 51 52! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 53! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 54! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 55! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 56end subroutine vec_sld_test_i1i4 57 58! LLVM-LABEL: vec_sld_test_i1i8 59subroutine vec_sld_test_i1i8(arg1, arg2) 60 vector(integer(1)) :: arg1, arg2, r 61 r = vec_sld(arg1, arg2, 3_8) 62 63! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 64! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 65! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 66! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 67 68! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 69! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 70! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 71! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 72end subroutine vec_sld_test_i1i8 73 74! LLVM-LABEL: vec_sld_test_i2i1 75subroutine vec_sld_test_i2i1(arg1, arg2) 76 vector(integer(2)) :: arg1, arg2, r 77 r = vec_sld(arg1, arg2, 3_1) 78 79! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 80! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 81! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 82! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 83! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 84! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 85! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 86 87! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 88! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 89! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 90! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 91! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 92! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 93! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 94end subroutine vec_sld_test_i2i1 95 96! LLVM-LABEL: vec_sld_test_i2i2 97subroutine vec_sld_test_i2i2(arg1, arg2) 98 vector(integer(2)) :: arg1, arg2, r 99 r = vec_sld(arg1, arg2, 8_2) 100 101! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 102! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 103! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 104! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 105! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23> 106! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 107! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 108 109! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 110! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 111! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 112! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 113! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23> 114! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 115! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 116end subroutine vec_sld_test_i2i2 117 118! LLVM-LABEL: vec_sld_test_i2i4 119subroutine vec_sld_test_i2i4(arg1, arg2) 120 vector(integer(2)) :: arg1, arg2, r 121 r = vec_sld(arg1, arg2, 3_4) 122 123! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 124! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 125! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 126! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 127! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 128! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 129! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 130 131! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 132! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 133! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 134! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 135! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 136! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 137! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 138end subroutine vec_sld_test_i2i4 139 140! LLVM-LABEL: vec_sld_test_i2i8 141subroutine vec_sld_test_i2i8(arg1, arg2) 142 vector(integer(2)) :: arg1, arg2, r 143 r = vec_sld(arg1, arg2, 11_8) 144 145! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 146! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 147! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 148! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 149! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20> 150! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 151! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 152 153! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 154! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 155! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 156! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 157! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26> 158! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 159! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 160end subroutine vec_sld_test_i2i8 161 162! LLVM-LABEL: vec_sld_test_i4i1 163subroutine vec_sld_test_i4i1(arg1, arg2) 164 vector(integer(4)) :: arg1, arg2, r 165 r = vec_sld(arg1, arg2, 3_1) 166 167! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 168! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 169! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 170! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 171! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 172! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 173! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 174 175! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 176! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 177! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 178! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 179! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 180! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 181! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 182end subroutine vec_sld_test_i4i1 183 184! LLVM-LABEL: vec_sld_test_i4i2 185subroutine vec_sld_test_i4i2(arg1, arg2) 186 vector(integer(4)) :: arg1, arg2, r 187 r = vec_sld(arg1, arg2, 3_2) 188 189! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 190! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 191! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 192! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 193! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 194! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 195! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 196 197! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 198! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 199! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 200! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 201! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 202! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 203! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 204end subroutine vec_sld_test_i4i2 205 206! LLVM-LABEL: vec_sld_test_i4i4 207subroutine vec_sld_test_i4i4(arg1, arg2) 208 vector(integer(4)) :: arg1, arg2, r 209 r = vec_sld(arg1, arg2, 3_4) 210 211! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 212! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 213! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 214! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 215! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 216! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 217! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 218 219! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 220! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 221! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 222! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 223! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 224! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 225! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 226end subroutine vec_sld_test_i4i4 227 228! LLVM-LABEL: vec_sld_test_i4i8 229subroutine vec_sld_test_i4i8(arg1, arg2) 230 vector(integer(4)) :: arg1, arg2, r 231 r = vec_sld(arg1, arg2, 3_8) 232 233! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 234! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 235! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 236! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 237! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 238! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 239! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 240 241! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 242! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 243! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 244! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 245! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 246! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 247! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 248end subroutine vec_sld_test_i4i8 249 250! LLVM-LABEL: vec_sld_test_u1i1 251subroutine vec_sld_test_u1i1(arg1, arg2) 252 vector(unsigned(1)) :: arg1, arg2, r 253 r = vec_sld(arg1, arg2, 3_1) 254 255! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 256! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 257! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 258! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 259 260! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 261! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 262! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 263! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 264end subroutine vec_sld_test_u1i1 265 266! LLVM-LABEL: vec_sld_test_u1i2 267subroutine vec_sld_test_u1i2(arg1, arg2) 268 vector(unsigned(1)) :: arg1, arg2, r 269 r = vec_sld(arg1, arg2, 3_2) 270 271! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 272! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 273! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 274! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 275 276! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 277! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 278! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 279! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 280end subroutine vec_sld_test_u1i2 281 282! LLVM-LABEL: vec_sld_test_u1i4 283subroutine vec_sld_test_u1i4(arg1, arg2) 284 vector(unsigned(1)) :: arg1, arg2, r 285 r = vec_sld(arg1, arg2, 3_1) 286 287! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 288! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 289! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 290! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 291 292! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 293! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 294! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 295! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 296end subroutine vec_sld_test_u1i4 297 298! LLVM-LABEL: vec_sld_test_u1i8 299subroutine vec_sld_test_u1i8(arg1, arg2) 300 vector(unsigned(1)) :: arg1, arg2, r 301 r = vec_sld(arg1, arg2, 3_1) 302 303! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 304! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 305! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 306! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 307 308! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 309! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 310! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 311! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 312end subroutine vec_sld_test_u1i8 313 314! LLVM-LABEL: vec_sld_test_u2i1 315subroutine vec_sld_test_u2i1(arg1, arg2) 316 vector(unsigned(2)) :: arg1, arg2, r 317 r = vec_sld(arg1, arg2, 3_1) 318 319! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 320! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 321! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 322! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 323! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 324! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 325! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 326 327! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 328! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 329! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 330! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 331! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 332! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 333! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 334end subroutine vec_sld_test_u2i1 335 336! LLVM-LABEL: vec_sld_test_u2i2 337subroutine vec_sld_test_u2i2(arg1, arg2) 338 vector(unsigned(2)) :: arg1, arg2, r 339 r = vec_sld(arg1, arg2, 3_2) 340 341! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 342! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 343! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 344! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 345! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 346! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 347! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 348 349! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 350! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 351! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 352! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 353! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 354! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 355! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 356end subroutine vec_sld_test_u2i2 357 358! LLVM-LABEL: vec_sld_test_u2i4 359subroutine vec_sld_test_u2i4(arg1, arg2) 360 vector(unsigned(2)) :: arg1, arg2, r 361 r = vec_sld(arg1, arg2, 3_4) 362 363! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 364! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 365! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 366! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 367! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 368! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 369! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 370 371! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 372! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 373! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 374! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 375! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 376! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 377! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 378end subroutine vec_sld_test_u2i4 379 380! LLVM-LABEL: vec_sld_test_u2i8 381subroutine vec_sld_test_u2i8(arg1, arg2) 382 vector(unsigned(2)) :: arg1, arg2, r 383 r = vec_sld(arg1, arg2, 3_8) 384 385! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 386! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 387! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 388! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 389! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 390! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 391! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 392 393! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 394! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 395! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 396! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 397! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 398! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 399! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 400end subroutine vec_sld_test_u2i8 401 402! LLVM-LABEL: vec_sld_test_u4i1 403subroutine vec_sld_test_u4i1(arg1, arg2) 404 vector(unsigned(4)) :: arg1, arg2, r 405 r = vec_sld(arg1, arg2, 3_1) 406 407! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 408! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 409! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 410! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 411! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 412! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 413! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 414 415! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 416! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 417! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 418! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 419! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 420! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 421! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 422end subroutine vec_sld_test_u4i1 423 424! LLVM-LABEL: vec_sld_test_u4i2 425subroutine vec_sld_test_u4i2(arg1, arg2) 426 vector(unsigned(4)) :: arg1, arg2, r 427 r = vec_sld(arg1, arg2, 3_2) 428 429! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 430! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 431! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 432! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 433! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 434! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 435! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 436 437! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 438! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 439! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 440! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 441! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 442! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 443! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 444end subroutine vec_sld_test_u4i2 445 446! LLVM-LABEL: vec_sld_test_u4i4 447subroutine vec_sld_test_u4i4(arg1, arg2) 448 vector(unsigned(4)) :: arg1, arg2, r 449 r = vec_sld(arg1, arg2, 3_4) 450 451! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 452! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 453! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 454! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 455! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 456! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 457! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 458 459! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 460! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 461! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 462! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 463! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 464! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 465! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 466end subroutine vec_sld_test_u4i4 467 468! LLVM-LABEL: vec_sld_test_u4i8 469subroutine vec_sld_test_u4i8(arg1, arg2) 470 vector(unsigned(4)) :: arg1, arg2, r 471 r = vec_sld(arg1, arg2, 3_8) 472 473! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 474! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 475! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 476! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 477! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 478! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 479! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 480 481! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 482! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 483! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 484! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 485! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 486! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 487! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 488end subroutine vec_sld_test_u4i8 489 490! LLVM-LABEL: vec_sld_test_r4i1 491subroutine vec_sld_test_r4i1(arg1, arg2) 492 vector(real(4)) :: arg1, arg2, r 493 r = vec_sld(arg1, arg2, 3_1) 494 495! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 496! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 497! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 498! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 499! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 500! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 501! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 502 503! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 504! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 505! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 506! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 507! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 508! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 509! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 510end subroutine vec_sld_test_r4i1 511 512! LLVM-LABEL: vec_sld_test_r4i2 513subroutine vec_sld_test_r4i2(arg1, arg2) 514 vector(real(4)) :: arg1, arg2, r 515 r = vec_sld(arg1, arg2, 3_2) 516 517! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 518! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 519! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 520! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 521! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 522! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 523! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 524 525! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 526! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 527! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 528! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 529! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 530! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 531! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 532end subroutine vec_sld_test_r4i2 533 534! LLVM-LABEL: vec_sld_test_r4i4 535subroutine vec_sld_test_r4i4(arg1, arg2) 536 vector(real(4)) :: arg1, arg2, r 537 r = vec_sld(arg1, arg2, 3_4) 538 539! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 540! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 541! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 542! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 543! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28> 544! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 545! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 546 547! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 548! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 549! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 550! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 551! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 552! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 553! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 554end subroutine vec_sld_test_r4i4 555 556! LLVM-LABEL: vec_sld_test_r4i8 557subroutine vec_sld_test_r4i8(arg1, arg2) 558 vector(real(4)) :: arg1, arg2, r 559 r = vec_sld(arg1, arg2, 1_8) 560 561! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 562! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 563! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 564! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 565! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30> 566! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 567! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 568 569! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 570! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 571! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 572! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 573! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16> 574! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 575! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 576end subroutine vec_sld_test_r4i8 577 578!---------------------- 579! vec_sldw 580!---------------------- 581! LLVM-LABEL: vec_sldw_test_i1i1 582subroutine vec_sldw_test_i1i1(arg1, arg2) 583 vector(integer(1)) :: arg1, arg2, r 584 r = vec_sldw(arg1, arg2, 3_1) 585 586! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 587! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 588! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 589! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 590 591! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 592! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 593! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 594! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 595end subroutine vec_sldw_test_i1i1 596 597! LLVM-LABEL: vec_sldw_test_i1i2 598subroutine vec_sldw_test_i1i2(arg1, arg2) 599 vector(integer(1)) :: arg1, arg2, r 600 r = vec_sldw(arg1, arg2, 3_2) 601 602! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 603! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 604! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 605! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 606 607! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 608! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 609! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 610! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 611end subroutine vec_sldw_test_i1i2 612 613! LLVM-LABEL: vec_sldw_test_i1i4 614subroutine vec_sldw_test_i1i4(arg1, arg2) 615 vector(integer(1)) :: arg1, arg2, r 616 r = vec_sldw(arg1, arg2, 3_4) 617 618! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 619! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 620! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 621! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 622 623! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 624! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 625! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 626! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 627end subroutine vec_sldw_test_i1i4 628 629! LLVM-LABEL: vec_sldw_test_i1i8 630subroutine vec_sldw_test_i1i8(arg1, arg2) 631 vector(integer(1)) :: arg1, arg2, r 632 r = vec_sldw(arg1, arg2, 3_8) 633 634! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 635! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 636! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 637! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 638 639! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 640! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 641! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 642! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 643end subroutine vec_sldw_test_i1i8 644 645! LLVM-LABEL: vec_sldw_test_i2i1 646subroutine vec_sldw_test_i2i1(arg1, arg2) 647 vector(integer(2)) :: arg1, arg2, r 648 r = vec_sldw(arg1, arg2, 3_1) 649 650! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 651! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 652! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 653! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 654! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 655! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 656! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 657 658! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 659! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 660! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 661! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 662! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 663! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 664! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 665end subroutine vec_sldw_test_i2i1 666 667! LLVM-LABEL: vec_sldw_test_i2i2 668subroutine vec_sldw_test_i2i2(arg1, arg2) 669 vector(integer(2)) :: arg1, arg2, r 670 r = vec_sldw(arg1, arg2, 3_2) 671 672! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 673! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 674! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 675! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 676! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 677! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 678! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 679 680! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 681! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 682! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 683! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 684! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 685! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 686! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 687end subroutine vec_sldw_test_i2i2 688 689! LLVM-LABEL: vec_sldw_test_i2i4 690subroutine vec_sldw_test_i2i4(arg1, arg2) 691 vector(integer(2)) :: arg1, arg2, r 692 r = vec_sldw(arg1, arg2, 3_4) 693 694! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 695! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 696! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 697! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 698! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 699! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 700! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 701 702! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 703! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 704! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 705! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 706! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 707! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 708! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 709end subroutine vec_sldw_test_i2i4 710 711! LLVM-LABEL: vec_sldw_test_i2i8 712subroutine vec_sldw_test_i2i8(arg1, arg2) 713 vector(integer(2)) :: arg1, arg2, r 714 r = vec_sldw(arg1, arg2, 3_8) 715 716! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 717! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 718! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 719! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 720! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 721! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 722! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 723 724! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 725! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 726! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 727! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 728! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 729! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 730! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 731end subroutine vec_sldw_test_i2i8 732 733! LLVM-LABEL: vec_sldw_test_i4i1 734subroutine vec_sldw_test_i4i1(arg1, arg2) 735 vector(integer(4)) :: arg1, arg2, r 736 r = vec_sldw(arg1, arg2, 3_1) 737 738! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 739! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 740! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 741! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 742! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 743! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 744! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 745 746! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 747! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 748! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 749! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 750! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 751! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 752! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 753end subroutine vec_sldw_test_i4i1 754 755! LLVM-LABEL: vec_sldw_test_i4i2 756subroutine vec_sldw_test_i4i2(arg1, arg2) 757 vector(integer(4)) :: arg1, arg2, r 758 r = vec_sldw(arg1, arg2, 3_2) 759 760! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 761! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 762! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 763! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 764! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 765! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 766! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 767 768! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 769! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 770! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 771! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 772! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 773! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 774! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 775end subroutine vec_sldw_test_i4i2 776 777! LLVM-LABEL: vec_sldw_test_i4i4 778subroutine vec_sldw_test_i4i4(arg1, arg2) 779 vector(integer(4)) :: arg1, arg2, r 780 r = vec_sldw(arg1, arg2, 3_4) 781 782! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 783! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 784! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 785! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 786! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 787! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 788! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 789 790! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 791! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 792! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 793! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 794! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 795! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 796! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 797end subroutine vec_sldw_test_i4i4 798 799! LLVM-LABEL: vec_sldw_test_i4i8 800subroutine vec_sldw_test_i4i8(arg1, arg2) 801 vector(integer(4)) :: arg1, arg2, r 802 r = vec_sldw(arg1, arg2, 3_8) 803 804! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 805! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 806! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 807! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 808! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 809! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 810! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 811 812! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 813! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 814! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 815! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 816! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 817! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 818! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 819end subroutine vec_sldw_test_i4i8 820 821! LLVM-LABEL: vec_sldw_test_i8i1 822subroutine vec_sldw_test_i8i1(arg1, arg2) 823 vector(integer(8)) :: arg1, arg2, r 824 r = vec_sldw(arg1, arg2, 3_1) 825 826! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 827! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 828! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 829! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 830! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 831! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 832! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 833 834! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 835! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 836! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 837! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 838! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 839! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 840! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 841end subroutine vec_sldw_test_i8i1 842 843! LLVM-LABEL: vec_sldw_test_i8i2 844subroutine vec_sldw_test_i8i2(arg1, arg2) 845 vector(integer(8)) :: arg1, arg2, r 846 r = vec_sldw(arg1, arg2, 3_2) 847 848! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 849! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 850! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 851! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 852! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 853! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 854! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 855 856! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 857! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 858! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 859! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 860! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 861! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 862! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 863end subroutine vec_sldw_test_i8i2 864 865! LLVM-LABEL: vec_sldw_test_i8i4 866subroutine vec_sldw_test_i8i4(arg1, arg2) 867 vector(integer(8)) :: arg1, arg2, r 868 r = vec_sldw(arg1, arg2, 3_4) 869 870! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 871! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 872! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 873! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 874! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 875! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 876! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 877 878! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 879! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 880! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 881! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 882! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 883! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 884! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 885end subroutine vec_sldw_test_i8i4 886 887! LLVM-LABEL: vec_sldw_test_i8i8 888subroutine vec_sldw_test_i8i8(arg1, arg2) 889 vector(integer(8)) :: arg1, arg2, r 890 r = vec_sldw(arg1, arg2, 3_8) 891 892! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 893! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 894! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 895! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 896! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 897! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 898! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 899 900! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 901! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 902! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 903! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 904! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 905! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 906! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 907 908end subroutine vec_sldw_test_i8i8 909 910! LLVM-LABEL: vec_sldw_test_u1i1 911subroutine vec_sldw_test_u1i1(arg1, arg2) 912 vector(unsigned(1)) :: arg1, arg2, r 913 r = vec_sldw(arg1, arg2, 3_1) 914 915! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 916! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 917! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 918! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 919 920! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 921! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 922! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 923! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 924end subroutine vec_sldw_test_u1i1 925 926! LLVM-LABEL: vec_sldw_test_u1i2 927subroutine vec_sldw_test_u1i2(arg1, arg2) 928 vector(unsigned(1)) :: arg1, arg2, r 929 r = vec_sldw(arg1, arg2, 3_2) 930 931! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 932! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 933! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 934! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 935 936! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 937! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 938! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 939! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 940end subroutine vec_sldw_test_u1i2 941 942! LLVM-LABEL: vec_sldw_test_u1i4 943subroutine vec_sldw_test_u1i4(arg1, arg2) 944 vector(unsigned(1)) :: arg1, arg2, r 945 r = vec_sldw(arg1, arg2, 3_4) 946 947! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 948! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 949! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 950! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 951 952! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 953! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 954! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 955! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 956end subroutine vec_sldw_test_u1i4 957 958! LLVM-LABEL: vec_sldw_test_u1i8 959subroutine vec_sldw_test_u1i8(arg1, arg2) 960 vector(unsigned(1)) :: arg1, arg2, r 961 r = vec_sldw(arg1, arg2, 3_8) 962 963! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 964! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 965! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 966! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 967 968! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 969! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16 970! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 971! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16 972end subroutine vec_sldw_test_u1i8 973 974! LLVM-LABEL: vec_sldw_test_u2i1 975subroutine vec_sldw_test_u2i1(arg1, arg2) 976 vector(unsigned(2)) :: arg1, arg2, r 977 r = vec_sldw(arg1, arg2, 3_1) 978 979! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 980! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 981! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 982! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 983! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 984! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 985! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 986 987! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 988! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 989! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 990! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 991! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 992! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 993! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 994end subroutine vec_sldw_test_u2i1 995 996! LLVM-LABEL: vec_sldw_test_u2i2 997subroutine vec_sldw_test_u2i2(arg1, arg2) 998 vector(unsigned(2)) :: arg1, arg2, r 999 r = vec_sldw(arg1, arg2, 3_2) 1000 1001! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1002! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1003! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 1004! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 1005! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1006! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 1007! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 1008 1009! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1010! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1011! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 1012! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 1013! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1014! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 1015! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 1016end subroutine vec_sldw_test_u2i2 1017 1018! LLVM-LABEL: vec_sldw_test_u2i4 1019subroutine vec_sldw_test_u2i4(arg1, arg2) 1020 vector(unsigned(2)) :: arg1, arg2, r 1021 r = vec_sldw(arg1, arg2, 3_4) 1022 1023! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1024! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1025! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 1026! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 1027! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1028! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 1029! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 1030 1031! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1032! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1033! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 1034! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 1035! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1036! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 1037! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 1038end subroutine vec_sldw_test_u2i4 1039 1040! LLVM-LABEL: vec_sldw_test_u2i8 1041subroutine vec_sldw_test_u2i8(arg1, arg2) 1042 vector(unsigned(2)) :: arg1, arg2, r 1043 r = vec_sldw(arg1, arg2, 3_8) 1044 1045! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1046! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1047! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 1048! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 1049! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1050! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 1051! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 1052 1053! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1054! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16 1055! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8> 1056! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8> 1057! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1058! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16> 1059! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16 1060end subroutine vec_sldw_test_u2i8 1061 1062! LLVM-LABEL: vec_sldw_test_u4i1 1063subroutine vec_sldw_test_u4i1(arg1, arg2) 1064 vector(unsigned(4)) :: arg1, arg2, r 1065 r = vec_sldw(arg1, arg2, 3_1) 1066 1067! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1068! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1069! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 1070! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 1071! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1072! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 1073! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 1074 1075! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1076! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1077! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 1078! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 1079! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1080! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 1081! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 1082end subroutine vec_sldw_test_u4i1 1083 1084! LLVM-LABEL: vec_sldw_test_u4i2 1085subroutine vec_sldw_test_u4i2(arg1, arg2) 1086 vector(unsigned(4)) :: arg1, arg2, r 1087 r = vec_sldw(arg1, arg2, 3_2) 1088 1089! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1090! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1091! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 1092! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 1093! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1094! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 1095! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 1096 1097! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1098! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1099! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 1100! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 1101! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1102! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 1103! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 1104end subroutine vec_sldw_test_u4i2 1105 1106! LLVM-LABEL: vec_sldw_test_u4i4 1107subroutine vec_sldw_test_u4i4(arg1, arg2) 1108 vector(unsigned(4)) :: arg1, arg2, r 1109 r = vec_sldw(arg1, arg2, 3_4) 1110 1111! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1112! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1113! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 1114! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 1115! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1116! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 1117! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 1118 1119! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1120! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1121! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 1122! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 1123! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1124! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 1125! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 1126end subroutine vec_sldw_test_u4i4 1127 1128! LLVM-LABEL: vec_sldw_test_u4i8 1129subroutine vec_sldw_test_u4i8(arg1, arg2) 1130 vector(unsigned(4)) :: arg1, arg2, r 1131 r = vec_sldw(arg1, arg2, 3_8) 1132 1133! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1134! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1135! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 1136! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 1137! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1138! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 1139! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 1140 1141! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1142! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16 1143! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8> 1144! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8> 1145! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1146! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32> 1147! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16 1148end subroutine vec_sldw_test_u4i8 1149 1150! LLVM-LABEL: vec_sldw_test_u8i1 1151subroutine vec_sldw_test_u8i1(arg1, arg2) 1152 vector(unsigned(8)) :: arg1, arg2, r 1153 r = vec_sldw(arg1, arg2, 3_1) 1154 1155! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1156! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1157! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 1158! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 1159! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1160! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 1161! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 1162 1163! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1164! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1165! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 1166! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 1167! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1168! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 1169! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 1170end subroutine vec_sldw_test_u8i1 1171 1172! LLVM-LABEL: vec_sldw_test_u8i2 1173subroutine vec_sldw_test_u8i2(arg1, arg2) 1174 vector(unsigned(8)) :: arg1, arg2, r 1175 r = vec_sldw(arg1, arg2, 3_2) 1176 1177! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1178! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1179! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 1180! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 1181! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1182! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 1183! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 1184 1185! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1186! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1187! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 1188! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 1189! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1190! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 1191! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 1192end subroutine vec_sldw_test_u8i2 1193 1194! LLVM-LABEL: vec_sldw_test_u8i4 1195subroutine vec_sldw_test_u8i4(arg1, arg2) 1196 vector(unsigned(8)) :: arg1, arg2, r 1197 r = vec_sldw(arg1, arg2, 3_4) 1198 1199! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1200! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1201! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 1202! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 1203! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1204! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 1205! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 1206 1207! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1208! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1209! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 1210! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 1211! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1212! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 1213! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 1214end subroutine vec_sldw_test_u8i4 1215 1216! LLVM-LABEL: vec_sldw_test_u8i8 1217subroutine vec_sldw_test_u8i8(arg1, arg2) 1218 vector(unsigned(8)) :: arg1, arg2, r 1219 r = vec_sldw(arg1, arg2, 3_8) 1220 1221! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1222! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1223! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 1224! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 1225! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1226! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 1227! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 1228 1229! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1230! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16 1231! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8> 1232! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8> 1233! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1234! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64> 1235! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16 1236end subroutine vec_sldw_test_u8i8 1237 1238! LLVM-LABEL: vec_sldw_test_r4i1 1239subroutine vec_sldw_test_r4i1(arg1, arg2) 1240 vector(real(4)) :: arg1, arg2, r 1241 r = vec_sldw(arg1, arg2, 3_1) 1242 1243! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1244! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1245! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 1246! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 1247! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1248! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 1249! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 1250 1251! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1252! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1253! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 1254! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 1255! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1256! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 1257! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 1258end subroutine vec_sldw_test_r4i1 1259 1260! LLVM-LABEL: vec_sldw_test_r4i2 1261subroutine vec_sldw_test_r4i2(arg1, arg2) 1262 vector(real(4)) :: arg1, arg2, r 1263 r = vec_sldw(arg1, arg2, 3_2) 1264 1265! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1266! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1267! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 1268! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 1269! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1270! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 1271! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 1272 1273! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1274! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1275! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 1276! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 1277! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1278! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 1279! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 1280end subroutine vec_sldw_test_r4i2 1281 1282! LLVM-LABEL: vec_sldw_test_r4i4 1283subroutine vec_sldw_test_r4i4(arg1, arg2) 1284 vector(real(4)) :: arg1, arg2, r 1285 r = vec_sldw(arg1, arg2, 3_4) 1286 1287! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1288! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1289! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 1290! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 1291! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1292! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 1293! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 1294 1295! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1296! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1297! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 1298! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 1299! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1300! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 1301! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 1302end subroutine vec_sldw_test_r4i4 1303 1304! LLVM-LABEL: vec_sldw_test_r4i8 1305subroutine vec_sldw_test_r4i8(arg1, arg2) 1306 vector(real(4)) :: arg1, arg2, r 1307 r = vec_sldw(arg1, arg2, 3_8) 1308 1309! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1310! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1311! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 1312! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 1313! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1314! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 1315! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 1316 1317! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1318! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16 1319! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8> 1320! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8> 1321! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1322! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float> 1323! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16 1324end subroutine vec_sldw_test_r4i8 1325 1326! LLVM-LABEL: vec_sldw_test_r8i1 1327subroutine vec_sldw_test_r8i1(arg1, arg2) 1328 vector(real(8)) :: arg1, arg2, r 1329 r = vec_sldw(arg1, arg2, 3_1) 1330 1331! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1332! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1333! LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8> 1334! LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8> 1335! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1336! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double> 1337! LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 16 1338 1339! BE-LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1340! BE-LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1341! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8> 1342! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8> 1343! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1344! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double> 1345! BE-LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 16 1346end subroutine vec_sldw_test_r8i1 1347 1348! LLVM-LABEL: vec_sldw_test_r8i2 1349subroutine vec_sldw_test_r8i2(arg1, arg2) 1350 vector(real(8)) :: arg1, arg2, r 1351 r = vec_sldw(arg1, arg2, 3_2) 1352 1353! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1354! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1355! LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8> 1356! LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8> 1357! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1358! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double> 1359! LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 16 1360 1361! BE-LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1362! BE-LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1363! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8> 1364! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8> 1365! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1366! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double> 1367! BE-LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 16 1368end subroutine vec_sldw_test_r8i2 1369 1370! LLVM-LABEL: vec_sldw_test_r8i4 1371subroutine vec_sldw_test_r8i4(arg1, arg2) 1372 vector(real(8)) :: arg1, arg2, r 1373 r = vec_sldw(arg1, arg2, 3_4) 1374 1375! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1376! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1377! LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8> 1378! LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8> 1379! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1380! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double> 1381! LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 16 1382 1383! BE-LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1384! BE-LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1385! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8> 1386! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8> 1387! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1388! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double> 1389! BE-LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 16 1390end subroutine vec_sldw_test_r8i4 1391 1392! LLVM-LABEL: vec_sldw_test_r8i8 1393subroutine vec_sldw_test_r8i8(arg1, arg2) 1394 vector(real(8)) :: arg1, arg2, r 1395 r = vec_sldw(arg1, arg2, 3_8) 1396 1397! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1398! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1399! LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8> 1400! LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8> 1401! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 1402! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double> 1403! LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 16 1404 1405! BE-LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1406! BE-LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16 1407! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8> 1408! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8> 1409! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> 1410! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double> 1411! BE-LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 16 1412end subroutine vec_sldw_test_r8i8 1413