1! This test checks lowering of Openacc serial loop combined directive. 2 3! RUN: bbc -fopenacc -emit-hlfir %s -o - | FileCheck %s 4 5! CHECK-LABEL: acc.private.recipe @privatization_ref_10xf32 : !fir.ref<!fir.array<10xf32>> init { 6! CHECK: ^bb0(%{{.*}}: !fir.ref<!fir.array<10xf32>>): 7! CHECK: %[[SHAPE:.*]] = fir.shape %{{.*}} : (index) -> !fir.shape<1> 8! CHECK: %[[ALLOCA:.*]] = fir.alloca !fir.array<10xf32> 9! CHECK: %[[DECLARE:.*]]:2 = hlfir.declare %[[ALLOCA]](%[[SHAPE]]) {uniq_name = "acc.private.init"} : (!fir.ref<!fir.array<10xf32>>, !fir.shape<1>) -> (!fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) 10! CHECK: acc.yield %[[DECLARE]]#0 : !fir.ref<!fir.array<10xf32>> 11! CHECK: } 12 13! CHECK-LABEL: acc.firstprivate.recipe @firstprivatization_section_ext10_ref_10xf32 : !fir.ref<!fir.array<10xf32>> init { 14! CHECK: ^bb0(%{{.*}}: !fir.ref<!fir.array<10xf32>>): 15! CHECK: %[[SHAPE:.*]] = fir.shape %{{.*}} : (index) -> !fir.shape<1> 16! CHECK: %[[ALLOCA:.*]] = fir.alloca !fir.array<10xf32> 17! CHECK: %[[DECLARE:.*]]:2 = hlfir.declare %[[ALLOCA]](%[[SHAPE]]) {uniq_name = "acc.private.init"} : (!fir.ref<!fir.array<10xf32>>, !fir.shape<1>) -> (!fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) 18! CHECK: acc.yield %[[DECLARE]]#0 : !fir.ref<!fir.array<10xf32>> 19! CHECK: } copy { 20! CHECK: ^bb0(%arg0: !fir.ref<!fir.array<10xf32>>, %arg1: !fir.ref<!fir.array<10xf32>>): 21! CHECK: acc.terminator 22! CHECK: } 23 24! CHECK-LABEL: func.func @_QPacc_serial_loop() 25 26subroutine acc_serial_loop 27 integer :: i, j 28 29 integer :: async = 1 30 integer :: wait1 = 1 31 integer :: wait2 = 2 32 integer :: numGangs = 1 33 integer :: numWorkers = 10 34 integer :: vectorLength = 128 35 logical :: ifCondition = .TRUE. 36 integer, parameter :: n = 10 37 real, dimension(n) :: a, b, c 38 real, dimension(n, n) :: d, e 39 real, pointer :: f, g 40 integer :: reduction_i 41 real :: reduction_r 42 43 integer :: gangNum = 8 44 integer :: gangStatic = 8 45 integer :: vectorNum = 128 46 integer, parameter :: tileSize = 2 47 48! CHECK: %[[A:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ea"} 49! CHECK: %[[DECLA:.*]]:2 = hlfir.declare %[[A]] 50! CHECK: %[[B:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Eb"} 51! CHECK: %[[DECLB:.*]]:2 = hlfir.declare %[[B]] 52! CHECK: %[[C:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ec"} 53! CHECK: %[[DECLC:.*]]:2 = hlfir.declare %[[C]] 54! CHECK: %[[F:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "f", uniq_name = "{{.*}}Ef"} 55! CHECK: %[[DECLF:.*]]:2 = hlfir.declare %[[F]] 56! CHECK: %[[G:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "g", uniq_name = "{{.*}}Eg"} 57! CHECK: %[[DECLG:.*]]:2 = hlfir.declare %[[G]] 58! CHECK: %[[IFCONDITION:.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>> 59! CHECK: %[[DECLIFCONDITION:.*]]:2 = hlfir.declare %[[IFCONDITION]] 60 61 !$acc serial 62 !$acc loop 63 DO i = 1, n 64 a(i) = b(i) 65 END DO 66 !$acc end serial 67 68! CHECK: acc.serial { 69! CHECK: acc.loop private{{.*}} { 70! CHECK: acc.yield 71! CHECK-NEXT: }{{$}} 72! CHECK: acc.yield 73! CHECK-NEXT: }{{$}} 74 75 !$acc serial loop 76 DO i = 1, n 77 a(i) = b(i) 78 END DO 79 80! CHECK: acc.serial combined(loop) { 81! CHECK: acc.loop combined(serial) private{{.*}} { 82! CHECK: acc.yield 83! CHECK-NEXT: }{{$}} 84! CHECK: acc.yield 85! CHECK-NEXT: }{{$}} 86 87 !$acc serial loop async 88 DO i = 1, n 89 a(i) = b(i) 90 END DO 91 !$acc end serial loop 92 93! CHECK: acc.serial {{.*}} { 94! CHECK: acc.loop {{.*}} { 95! CHECK: acc.yield 96! CHECK-NEXT: }{{$}} 97! CHECK: acc.yield 98! CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>]} 99 100 !$acc serial loop async(1) 101 DO i = 1, n 102 a(i) = b(i) 103 END DO 104 105! CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32 106! CHECK: acc.serial {{.*}} async([[ASYNC1]] : i32) { 107! CHECK: acc.loop {{.*}} { 108! CHECK: acc.yield 109! CHECK-NEXT: }{{$}} 110! CHECK: acc.yield 111! CHECK-NEXT: }{{$}} 112 113 !$acc serial loop async(async) 114 DO i = 1, n 115 a(i) = b(i) 116 END DO 117 118! CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32> 119! CHECK: acc.serial {{.*}} async([[ASYNC2]] : i32) { 120! CHECK: acc.loop {{.*}} { 121! CHECK: acc.yield 122! CHECK-NEXT: }{{$}} 123! CHECK: acc.yield 124! CHECK-NEXT: }{{$}} 125 126 !$acc serial loop wait 127 DO i = 1, n 128 a(i) = b(i) 129 END DO 130 131! CHECK: acc.serial {{.*}} wait { 132! CHECK: acc.loop {{.*}} { 133! CHECK: acc.yield 134! CHECK-NEXT: }{{$}} 135! CHECK: acc.yield 136! CHECK-NEXT: } 137 138 !$acc serial loop wait(1) 139 DO i = 1, n 140 a(i) = b(i) 141 END DO 142 143! CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32 144! CHECK: acc.serial {{.*}} wait({[[WAIT1]] : i32}) { 145! CHECK: acc.loop {{.*}} { 146! CHECK: acc.yield 147! CHECK-NEXT: }{{$}} 148! CHECK: acc.yield 149! CHECK-NEXT: }{{$}} 150 151 !$acc serial loop wait(1, 2) 152 DO i = 1, n 153 a(i) = b(i) 154 END DO 155 156! CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32 157! CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32 158! CHECK: acc.serial {{.*}} wait({[[WAIT2]] : i32, [[WAIT3]] : i32}) { 159! CHECK: acc.loop {{.*}} { 160! CHECK: acc.yield 161! CHECK-NEXT: }{{$}} 162! CHECK: acc.yield 163! CHECK-NEXT: }{{$}} 164 165 !$acc serial loop wait(wait1, wait2) 166 DO i = 1, n 167 a(i) = b(i) 168 END DO 169 170! CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32> 171! CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32> 172! CHECK: acc.serial {{.*}} wait({[[WAIT4]] : i32, [[WAIT5]] : i32}) { 173! CHECK: acc.loop {{.*}} { 174! CHECK: acc.yield 175! CHECK-NEXT: }{{$}} 176! CHECK: acc.yield 177! CHECK-NEXT: }{{$}} 178 179 !$acc serial loop if(.TRUE.) 180 DO i = 1, n 181 a(i) = b(i) 182 END DO 183 184! CHECK: [[IF1:%.*]] = arith.constant true 185! CHECK: acc.serial {{.*}} if([[IF1]]) { 186! CHECK: acc.loop {{.*}} { 187! CHECK: acc.yield 188! CHECK-NEXT: }{{$}} 189! CHECK: acc.yield 190! CHECK-NEXT: }{{$}} 191 192 !$acc serial loop if(ifCondition) 193 DO i = 1, n 194 a(i) = b(i) 195 END DO 196 197! CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>> 198! CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1 199! CHECK: acc.serial {{.*}} if([[IF2]]) { 200! CHECK: acc.loop {{.*}} { 201! CHECK: acc.yield 202! CHECK-NEXT: }{{$}} 203! CHECK: acc.yield 204! CHECK-NEXT: }{{$}} 205 206 !$acc serial loop self(.TRUE.) 207 DO i = 1, n 208 a(i) = b(i) 209 END DO 210 211! CHECK: [[SELF1:%.*]] = arith.constant true 212! CHECK: acc.serial {{.*}} self([[SELF1]]) { 213! CHECK: acc.loop {{.*}} { 214! CHECK: acc.yield 215! CHECK-NEXT: }{{$}} 216! CHECK: acc.yield 217! CHECK-NEXT: }{{$}} 218 219 !$acc serial loop self 220 DO i = 1, n 221 a(i) = b(i) 222 END DO 223 224! CHECK: acc.serial {{.*}} { 225! CHECK: acc.loop {{.*}} { 226! CHECK: acc.yield 227! CHECK-NEXT: }{{$}} 228! CHECK: acc.yield 229! CHECK-NEXT: } attributes {selfAttr} 230 231 !$acc serial loop self(ifCondition) 232 DO i = 1, n 233 a(i) = b(i) 234 END DO 235 236! CHECK: %[[SELF2:.*]] = fir.convert %[[DECLIFCONDITION]]#1 : (!fir.ref<!fir.logical<4>>) -> i1 237! CHECK: acc.serial {{.*}} self(%[[SELF2]]) { 238! CHECK: acc.loop {{.*}} { 239! CHECK: acc.yield 240! CHECK-NEXT: }{{$}} 241! CHECK: acc.yield 242! CHECK-NEXT: }{{$}} 243 244 !$acc serial loop copy(a, b) 245 DO i = 1, n 246 a(i) = b(i) 247 END DO 248 249! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "a"} 250! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "b"} 251! CHECK: acc.serial {{.*}} dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) { 252! CHECK: acc.loop {{.*}} { 253! CHECK: acc.yield 254! CHECK-NEXT: }{{$}} 255! CHECK: acc.yield 256! CHECK-NEXT: }{{$}} 257! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) {dataClause = #acc<data_clause acc_copy>, name = "a"} 258! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) {dataClause = #acc<data_clause acc_copy>, name = "b"} 259 260 !$acc serial loop copy(a) copy(b) 261 DO i = 1, n 262 a(i) = b(i) 263 END DO 264 265! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "a"} 266! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "b"} 267! CHECK: acc.serial {{.*}} dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) { 268! CHECK: acc.loop {{.*}} { 269! CHECK: acc.yield 270! CHECK-NEXT: }{{$}} 271! CHECK: acc.yield 272! CHECK-NEXT: }{{$}} 273! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) {dataClause = #acc<data_clause acc_copy>, name = "a"} 274! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) {dataClause = #acc<data_clause acc_copy>, name = "b"} 275 276 !$acc serial loop copyin(a) copyin(readonly: b) 277 DO i = 1, n 278 a(i) = b(i) 279 END DO 280 281! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"} 282! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyin_readonly>, name = "b"} 283! CHECK: acc.serial {{.*}} dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) { 284! CHECK: acc.loop {{.*}} { 285! CHECK: acc.yield 286! CHECK-NEXT: }{{$}} 287! CHECK: acc.yield 288! CHECK-NEXT: }{{$}} 289! CHECK: acc.delete accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = #acc<data_clause acc_copyin>, name = "a"} 290! CHECK: acc.delete accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = #acc<data_clause acc_copyin_readonly>, name = "b"} 291 292 !$acc serial loop copyout(a) copyout(zero: b) 293 DO i = 1, n 294 a(i) = b(i) 295 END DO 296 297! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyout>, name = "a"} 298! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyout>, name = "b"} 299! CHECK: acc.serial {{.*}} dataOperands(%[[CREATE_A]], %[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) { 300! CHECK: acc.loop {{.*}} { 301! CHECK: acc.yield 302! CHECK-NEXT: }{{$}} 303! CHECK: acc.yield 304! CHECK-NEXT: }{{$}} 305! CHECK: acc.copyout accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) {name = "a"} 306! CHECK: acc.copyout accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) {name = "b"} 307 308 !$acc serial loop create(b) create(zero: a) 309 DO i = 1, n 310 a(i) = b(i) 311 END DO 312 313! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"} 314! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_create_zero>, name = "a"} 315! CHECK: acc.serial {{.*}} dataOperands(%[[CREATE_B]], %[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) { 316! CHECK: acc.loop {{.*}} { 317! CHECK: acc.yield 318! CHECK-NEXT: }{{$}} 319! CHECK: acc.yield 320! CHECK-NEXT: }{{$}} 321! CHECK: acc.delete accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = #acc<data_clause acc_create>, name = "b"} 322! CHECK: acc.delete accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = #acc<data_clause acc_create_zero>, name = "a"} 323 324 !$acc serial loop no_create(a, b) 325 DO i = 1, n 326 a(i) = b(i) 327 END DO 328 329! CHECK: %[[NOCREATE_A:.*]] = acc.nocreate varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"} 330! CHECK: %[[NOCREATE_B:.*]] = acc.nocreate varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"} 331! CHECK: acc.serial {{.*}} dataOperands(%[[NOCREATE_A]], %[[NOCREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) { 332! CHECK: acc.loop {{.*}} { 333! CHECK: acc.yield 334! CHECK-NEXT: }{{$}} 335! CHECK: acc.yield 336! CHECK-NEXT: }{{$}} 337 338 !$acc serial loop present(a, b) 339 DO i = 1, n 340 a(i) = b(i) 341 END DO 342 343! CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"} 344! CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"} 345! CHECK: acc.serial {{.*}} dataOperands(%[[PRESENT_A]], %[[PRESENT_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) { 346! CHECK: acc.loop {{.*}} { 347! CHECK: acc.yield 348! CHECK-NEXT: }{{$}} 349! CHECK: acc.yield 350! CHECK-NEXT: }{{$}} 351 352 !$acc serial loop deviceptr(a) deviceptr(b) 353 DO i = 1, n 354 a(i) = b(i) 355 END DO 356 357! CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"} 358! CHECK: %[[DEVICEPTR_B:.*]] = acc.deviceptr varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"} 359! CHECK: acc.serial {{.*}} dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) { 360! CHECK: acc.loop {{.*}} { 361! CHECK: acc.yield 362! CHECK-NEXT: }{{$}} 363! CHECK: acc.yield 364! CHECK-NEXT: }{{$}} 365 366 !$acc serial loop attach(f, g) 367 DO i = 1, n 368 a(i) = b(i) 369 END DO 370 371! CHECK: %[[BOX_F:.*]] = fir.load %[[DECLF]]#0 : !fir.ref<!fir.box<!fir.ptr<f32>>> 372! CHECK: %[[BOX_ADDR_F:.*]] = fir.box_addr %[[BOX_F]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32> 373! CHECK: %[[ATTACH_F:.*]] = acc.attach varPtr(%[[BOX_ADDR_F]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "f"} 374! CHECK: %[[BOX_G:.*]] = fir.load %[[DECLG]]#0 : !fir.ref<!fir.box<!fir.ptr<f32>>> 375! CHECK: %[[BOX_ADDR_G:.*]] = fir.box_addr %[[BOX_G]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32> 376! CHECK: %[[ATTACH_G:.*]] = acc.attach varPtr(%[[BOX_ADDR_G]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "g"} 377! CHECK: acc.serial {{.*}} dataOperands(%[[ATTACH_F]], %[[ATTACH_G]] : !fir.ptr<f32>, !fir.ptr<f32>) { 378! CHECK: acc.loop {{.*}} { 379! CHECK: acc.yield 380! CHECK-NEXT: }{{$}} 381! CHECK: acc.yield 382! CHECK-NEXT: }{{$}} 383 384 !$acc serial loop private(a) firstprivate(b) 385 DO i = 1, n 386 a(i) = b(i) 387 END DO 388 389! CHECK: %[[ACC_FPRIVATE_B:.*]] = acc.firstprivate varPtr(%[[DECLB]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"} 390! CHECK: acc.serial {{.*}} firstprivate(@firstprivatization_section_ext10_ref_10xf32 -> %[[ACC_FPRIVATE_B]] : !fir.ref<!fir.array<10xf32>>) { 391! CHECK: %[[ACC_PRIVATE_A:.*]] = acc.private varPtr(%[[DECLA]]#0 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"} 392! CHECK: acc.loop {{.*}} private({{.*}}@privatization_ref_10xf32 -> %[[ACC_PRIVATE_A]] : !fir.ref<!fir.array<10xf32>>) 393! CHECK-NOT: fir.do_loop 394! CHECK: acc.yield 395! CHECK-NEXT: }{{$}} 396! CHECK: acc.yield 397! CHECK-NEXT: }{{$}} 398 399 !$acc serial loop seq 400 DO i = 1, n 401 a(i) = b(i) 402 END DO 403 404! CHECK: acc.serial {{.*}} { 405! CHECK: acc.loop {{.*}} { 406! CHECK: acc.yield 407! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]} 408! CHECK: acc.yield 409! CHECK-NEXT: }{{$}} 410 411 !$acc serial loop auto 412 DO i = 1, n 413 a(i) = b(i) 414 END DO 415 416! CHECK: acc.serial {{.*}} { 417! CHECK: acc.loop {{.*}} { 418! CHECK: acc.yield 419! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>} 420! CHECK: acc.yield 421! CHECK-NEXT: }{{$}} 422 423 !$acc serial loop independent 424 DO i = 1, n 425 a(i) = b(i) 426 END DO 427 428! CHECK: acc.serial {{.*}} { 429! CHECK: acc.loop {{.*}} { 430! CHECK: acc.yield 431! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]} 432! CHECK: acc.yield 433! CHECK-NEXT: }{{$}} 434 435 !$acc serial loop gang 436 DO i = 1, n 437 a(i) = b(i) 438 END DO 439 440! CHECK: acc.serial {{.*}} { 441! CHECK: acc.loop {{.*}} gang {{.*}} { 442! CHECK: acc.yield 443! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}} 444! CHECK: acc.yield 445! CHECK-NEXT: }{{$}} 446 447 !$acc serial loop gang(num: 8) 448 DO i = 1, n 449 a(i) = b(i) 450 END DO 451 452! CHECK: acc.serial {{.*}} { 453! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32 454! CHECK-NEXT: acc.loop {{.*}} gang({num=[[GANGNUM1]] : i32}) {{.*}} { 455! CHECK: acc.yield 456! CHECK-NEXT: }{{$}} 457! CHECK: acc.yield 458! CHECK-NEXT: }{{$}} 459 460 !$acc serial loop gang(num: gangNum) 461 DO i = 1, n 462 a(i) = b(i) 463 END DO 464 465! CHECK: acc.serial {{.*}} { 466! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32> 467! CHECK-NEXT: acc.loop {{.*}} gang({num=[[GANGNUM2]] : i32}) {{.*}} { 468! CHECK: acc.yield 469! CHECK-NEXT: }{{$}} 470! CHECK: acc.yield 471! CHECK-NEXT: }{{$}} 472 473 !$acc serial loop gang(num: gangNum, static: gangStatic) 474 DO i = 1, n 475 a(i) = b(i) 476 END DO 477 478! CHECK: acc.serial {{.*}} { 479! CHECK: acc.loop {{.*}} gang({num=%{{.*}} : i32, static=%{{.*}} : i32}) {{.*}} { 480! CHECK: acc.yield 481! CHECK-NEXT: }{{$}} 482! CHECK: acc.yield 483! CHECK-NEXT: }{{$}} 484 485 !$acc serial loop vector 486 DO i = 1, n 487 a(i) = b(i) 488 END DO 489 490! CHECK: acc.serial {{.*}} { 491! CHECK: acc.loop {{.*}} vector {{.*}} { 492! CHECK: acc.yield 493! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}} 494! CHECK: acc.yield 495! CHECK-NEXT: }{{$}} 496 497 !$acc serial loop vector(128) 498 DO i = 1, n 499 a(i) = b(i) 500 END DO 501 502! CHECK: acc.serial {{.*}} { 503! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32 504! CHECK: acc.loop {{.*}} vector([[CONSTANT128]] : i32) {{.*}} { 505! CHECK: acc.yield 506! CHECK-NEXT: }{{$}} 507! CHECK: acc.yield 508! CHECK-NEXT: }{{$}} 509 510 !$acc serial loop vector(vectorLength) 511 DO i = 1, n 512 a(i) = b(i) 513 END DO 514 515! CHECK: acc.serial {{.*}} { 516! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32> 517! CHECK: acc.loop {{.*}} vector([[VECTORLENGTH]] : i32) {{.*}} { 518! CHECK: acc.yield 519! CHECK-NEXT: }{{$}} 520! CHECK: acc.yield 521! CHECK-NEXT: }{{$}} 522 523 !$acc serial loop worker 524 DO i = 1, n 525 a(i) = b(i) 526 END DO 527 528! CHECK: acc.serial {{.*}} { 529! CHECK: acc.loop {{.*}} worker {{.*}} { 530! CHECK: acc.yield 531! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}} 532! CHECK: acc.yield 533! CHECK-NEXT: }{{$}} 534 535 !$acc serial loop worker(128) 536 DO i = 1, n 537 a(i) = b(i) 538 END DO 539 540! CHECK: acc.serial {{.*}} { 541! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32 542! CHECK: acc.loop {{.*}} worker([[WORKER128]] : i32) {{.*}} { 543! CHECK: acc.yield 544! CHECK-NEXT: }{{$}} 545! CHECK: acc.yield 546! CHECK-NEXT: }{{$}} 547 548 !$acc serial loop collapse(2) 549 DO i = 1, n 550 DO j = 1, n 551 d(i, j) = e(i, j) 552 END DO 553 END DO 554 555! CHECK: acc.serial {{.*}} { 556! CHECK: acc.loop {{.*}} { 557! CHECK-NOT: fir.do_loop 558! CHECK: acc.yield 559! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true>} 560! CHECK: acc.yield 561! CHECK-NEXT: }{{$}} 562 563 !$acc serial loop 564 DO i = 1, n 565 !$acc loop 566 DO j = 1, n 567 d(i, j) = e(i, j) 568 END DO 569 END DO 570 571! CHECK: acc.serial {{.*}} { 572! CHECK: acc.loop {{.*}} { 573! CHECK: acc.loop {{.*}} { 574! CHECK: acc.yield 575! CHECK-NEXT: }{{$}} 576! CHECK: acc.yield 577! CHECK-NEXT: }{{$}} 578! CHECK: acc.yield 579! CHECK-NEXT: }{{$}} 580 581 !$acc serial loop tile(2) 582 DO i = 1, n 583 a(i) = b(i) 584 END DO 585 586! CHECK: acc.serial {{.*}} { 587! CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32 588! CHECK: acc.loop {{.*}} tile({[[TILESIZE]] : i32}) {{.*}} { 589! CHECK: acc.yield 590! CHECK-NEXT: }{{$}} 591! CHECK: acc.yield 592! CHECK-NEXT: }{{$}} 593 594 !$acc serial loop tile(*) 595 DO i = 1, n 596 a(i) = b(i) 597 END DO 598 599! CHECK: acc.serial {{.*}} { 600! CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32 601! CHECK: acc.loop {{.*}} tile({[[TILESIZEM1]] : i32}) {{.*}} { 602! CHECK: acc.yield 603! CHECK-NEXT: }{{$}} 604! CHECK: acc.yield 605! CHECK-NEXT: }{{$}} 606 607 !$acc serial loop tile(2, 2) 608 DO i = 1, n 609 DO j = 1, n 610 d(i, j) = e(i, j) 611 END DO 612 END DO 613 614! CHECK: acc.serial {{.*}} { 615! CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32 616! CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32 617! CHECK: acc.loop {{.*}} tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) {{.*}} { 618! CHECK: acc.yield 619! CHECK-NEXT: }{{$}} 620! CHECK: acc.yield 621! CHECK-NEXT: }{{$}} 622 623 !$acc serial loop tile(tileSize) 624 DO i = 1, n 625 a(i) = b(i) 626 END DO 627 628! CHECK: acc.serial {{.*}} { 629! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32}) {{.*}} { 630! CHECK: acc.yield 631! CHECK-NEXT: }{{$}} 632! CHECK: acc.yield 633! CHECK-NEXT: }{{$}} 634 635 !$acc serial loop tile(tileSize, tileSize) 636 DO i = 1, n 637 DO j = 1, n 638 d(i, j) = e(i, j) 639 END DO 640 END DO 641 642! CHECK: acc.serial {{.*}} { 643! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32, %{{.*}} : i32}) {{.*}} { 644! CHECK: acc.yield 645! CHECK-NEXT: }{{$}} 646! CHECK: acc.yield 647! CHECK-NEXT: }{{$}} 648 649 !$acc serial loop reduction(+:reduction_r) reduction(*:reduction_i) 650 do i = 1, n 651 reduction_r = reduction_r + a(i) 652 reduction_i = 1 653 end do 654 655! CHECK: %[[COPYINREDR:.*]] = acc.copyin varPtr(%{{.*}} : !fir.ref<f32>) -> !fir.ref<f32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_r"} 656! CHECK: %[[COPYINREDI:.*]] = acc.copyin varPtr(%{{.*}} : !fir.ref<i32>) -> !fir.ref<i32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_i"} 657! CHECK: acc.serial {{.*}} dataOperands(%[[COPYINREDR]], %[[COPYINREDI]] : !fir.ref<f32>, !fir.ref<i32>) { 658! CHECK: acc.loop {{.*}} reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>) 659! CHECK-NOT: fir.do_loop 660! CHECK: acc.yield 661! CHECK-NEXT: }{{$}} 662! CHECK: acc.yield 663! CHECK-NEXT: }{{$}} 664! CHECK: acc.copyout accPtr(%[[COPYINREDR]] : !fir.ref<f32>) to varPtr(%{{.*}} : !fir.ref<f32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_r"} 665! CHECK: acc.copyout accPtr(%[[COPYINREDI]] : !fir.ref<i32>) to varPtr(%{{.*}} : !fir.ref<i32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_i"} 666 667end subroutine acc_serial_loop 668