xref: /llvm-project/flang/test/Lower/Intrinsics/ieee_max_min.f90 (revision 4b57fe65fdc6b8d7163f36440386d1e707d89381)
1! RUN: bbc -emit-fir -o - %s | FileCheck %s
2
3function tag(x)
4  use ieee_arithmetic
5  character(12) :: tag
6  real(4) :: x
7  tag = '?????'
8  if (ieee_class(x) == ieee_signaling_nan    ) tag = 'snan'
9  if (ieee_class(x) == ieee_quiet_nan        ) tag = 'qnan'
10  if (ieee_class(x) == ieee_negative_inf     ) tag = 'neg_inf'
11  if (ieee_class(x) == ieee_negative_normal  ) tag = 'neg_norm'
12  if (ieee_class(x) == ieee_negative_denormal) tag = 'neg_denorm'
13  if (ieee_class(x) == ieee_negative_zero    ) tag = 'neg_zero'
14  if (ieee_class(x) == ieee_positive_zero    ) tag = 'pos_zero'
15  if (ieee_class(x) == ieee_positive_denormal) tag = 'pos_denorm'
16  if (ieee_class(x) == ieee_positive_normal  ) tag = 'pos_norm'
17  if (ieee_class(x) == ieee_positive_inf     ) tag = 'pos_inf'
18end
19
20! CHECK-LABEL: c.func @_QQmain
21program p
22  use ieee_arithmetic
23  character(12) :: tag
24
25  ! CHECK:     %[[V_16:[0-9]+]] = fir.alloca f32 {bindc_name = "a", uniq_name = "_QFEa"}
26  ! CHECK:     %[[V_17:[0-9]+]] = fir.declare %[[V_16]] {uniq_name = "_QFEa"} : (!fir.ref<f32>) -> !fir.ref<f32>
27  ! CHECK:     %[[V_18:[0-9]+]] = fir.alloca f32 {bindc_name = "b", uniq_name = "_QFEb"}
28  ! CHECK:     %[[V_19:[0-9]+]] = fir.declare %[[V_18]] {uniq_name = "_QFEb"} : (!fir.ref<f32>) -> !fir.ref<f32>
29  ! CHECK:     %[[V_20:[0-9]+]] = fir.alloca !fir.logical<4> {bindc_name = "flag_value", uniq_name = "_QFEflag_value"}
30  ! CHECK:     %[[V_21:[0-9]+]] = fir.declare %[[V_20]] {uniq_name = "_QFEflag_value"} : (!fir.ref<!fir.logical<4>>) -> !fir.ref<!fir.logical<4>>
31  ! CHECK:     %[[V_82:[0-9]+]] = fir.alloca f32 {bindc_name = "r", uniq_name = "_QFEr"}
32  ! CHECK:     %[[V_83:[0-9]+]] = fir.declare %[[V_82]] {uniq_name = "_QFEr"} : (!fir.ref<f32>) -> !fir.ref<f32>
33  logical :: flag_value
34  real(4) :: x(22), a, b, r
35
36  ! CHECK:     %[[V_92:[0-9]+]] = fir.address_of(@_FortranAIeeeValueTable_4) : !fir.ref<!fir.array<12xi32>>
37
38  x( 1) = ieee_value(a, ieee_signaling_nan)
39  x( 2) = ieee_value(a, ieee_quiet_nan)
40  x( 3) = ieee_value(a, ieee_negative_inf)
41  x( 4) = -huge(a)
42  x( 5) = -1000
43  x( 6) = -10
44  x( 7) = ieee_value(a, ieee_negative_normal)
45  x( 8) = -.1
46  x( 9) = -.001
47  x(10) = -tiny(a)
48  x(11) = ieee_value(a, ieee_negative_denormal)
49  x(12) = ieee_value(a, ieee_negative_zero)
50  x(13) = ieee_value(a, ieee_positive_zero)
51  x(14) = ieee_value(a, ieee_positive_denormal)
52  x(15) = tiny(a)
53  x(16) = .001
54  x(17) = .1
55  x(18) = ieee_value(a, ieee_positive_normal)
56  x(19) = 10
57  x(20) = 1000
58  x(21) = huge(a)
59  x(22) = ieee_value(a, ieee_positive_inf)
60
61  4 format(A8,'(',f10.2,z9.8  ,', ',f10.2,z9.8  ,') = ',f10.2,L3,'  ',A)
62
63  do i = lbound(x,1), ubound(x,1)
64    print*
65    do j = lbound(x,1), ubound(x,1)
66      print*
67      a = x(i)
68      b = x(j)
69
70      ! CHECK:     %[[V_201:[0-9]+]] = fir.address_of(@_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10) : !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
71      ! CHECK:     %[[V_202:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
72      ! CHECK:     %[[V_203:[0-9]+]] = fir.field_index _QM__fortran_builtinsT__builtin_ieee_flag_type.flag, !fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>
73      ! CHECK:     %[[V_204:[0-9]+]] = fir.coordinate_of %[[V_202]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
74      ! CHECK:     %[[V_205:[0-9]+]] = fir.load %[[V_204]] : !fir.ref<i8>
75      ! CHECK:     %[[V_206:[0-9]+]] = fir.convert %[[V_205]] : (i8) -> i32
76      ! CHECK:     %[[V_207:[0-9]+]] = fir.call @_FortranAMapException(%[[V_206]]) fastmath<contract> : (i32) -> i32
77      ! CHECK:     fir.if %false{{[_0-9]*}} {
78      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feraiseexcept(%[[V_207]]) fastmath<contract> : (i32) -> i32
79      ! CHECK:     } else {
80      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feclearexcept(%[[V_207]]) fastmath<contract> : (i32) -> i32
81      ! CHECK:     }
82      ! CHECK:     %[[V_208:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
83      ! CHECK:     %[[V_209:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
84      ! CHECK:     %[[V_210:[0-9]+]] = arith.cmpf olt, %[[V_208]], %[[V_209]] {{.*}} : f32
85      ! CHECK:     %[[V_211:[0-9]+]] = fir.if %[[V_210]] -> (f32) {
86      ! CHECK:       fir.result %[[V_209]] : f32
87      ! CHECK:     } else {
88      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_208]], %[[V_209]] {{.*}} : f32
89      ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
90      ! CHECK:         fir.result %[[V_208]] : f32
91      ! CHECK:       } else {
92      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_208]], %[[V_209]] {{.*}} : f32
93      ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
94      ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_208]]) <{bit = 960 : i32}> : (f32) -> i1
95      ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_208]], %[[V_209]] : f32
96      ! CHECK:           fir.result %[[V_697]] : f32
97      ! CHECK:         } else {
98      ! CHECK:           %[[V_696:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
99      ! CHECK:           %[[V_697:[0-9]+]] = fir.load %[[V_696]] : !fir.ref<i32>
100      ! CHECK:           %[[V_698:[0-9]+]] = arith.bitcast %[[V_697]] : i32 to f32
101      ! CHECK-DAG:       %[[V_699:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_209]]) <{bit = 1 : i32}> : (f32) -> i1
102      ! CHECK-DAG:       %[[V_700:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_208]]) <{bit = 1 : i32}> : (f32) -> i1
103      ! CHECK:           %[[V_701:[0-9]+]] = arith.ori %[[V_700]], %[[V_699]] : i1
104      ! CHECK:           fir.if %[[V_701]] {
105      ! CHECK:             %[[V_702:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
106      ! CHECK:             %[[V_703:[0-9]+]] = fir.call @feraiseexcept(%[[V_702]]) fastmath<contract> : (i32) -> i32
107      ! CHECK:           }
108      ! CHECK:           fir.result %[[V_698]] : f32
109      ! CHECK:         }
110      ! CHECK:         fir.result %[[V_695]] : f32
111      ! CHECK:       }
112      ! CHECK:       fir.result %[[V_693]] : f32
113      ! CHECK:     }
114      ! CHECK:     fir.store %[[V_211]] to %[[V_83]] : !fir.ref<f32>
115      ! CHECK:     %[[V_212:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
116      ! CHECK:     %[[V_213:[0-9]+]] = fir.coordinate_of %[[V_212]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
117      ! CHECK:     %[[V_214:[0-9]+]] = fir.load %[[V_213]] : !fir.ref<i8>
118      ! CHECK:     %[[V_215:[0-9]+]] = fir.convert %[[V_214]] : (i8) -> i32
119      ! CHECK:     %[[V_216:[0-9]+]] = fir.call @_FortranAMapException(%[[V_215]]) fastmath<contract> : (i32) -> i32
120      ! CHECK:     %[[V_217:[0-9]+]] = fir.call @fetestexcept(%[[V_216]]) fastmath<contract> : (i32) -> i32
121      ! CHECK:     %[[V_218:[0-9]+]] = arith.cmpi ne, %[[V_217]], %c0{{.*}} : i32
122      ! CHECK:     %[[V_219:[0-9]+]] = fir.convert %[[V_218]] : (i1) -> !fir.logical<4>
123      ! CHECK:     fir.store %[[V_219]] to %[[V_21]] : !fir.ref<!fir.logical<4>>
124      call ieee_set_flag(ieee_invalid, .false.)
125      r = ieee_max(a, b)
126      call ieee_get_flag(ieee_invalid, flag_value)
127      write(*, 4) 'max    ', a, a, b, b, r, flag_value, trim(tag(r))
128
129      ! CHECK:     %[[V_268:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
130      ! CHECK:     %[[V_269:[0-9]+]] = fir.coordinate_of %[[V_268]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
131      ! CHECK:     %[[V_270:[0-9]+]] = fir.load %[[V_269]] : !fir.ref<i8>
132      ! CHECK:     %[[V_271:[0-9]+]] = fir.convert %[[V_270]] : (i8) -> i32
133      ! CHECK:     %[[V_272:[0-9]+]] = fir.call @_FortranAMapException(%[[V_271]]) fastmath<contract> : (i32) -> i32
134      ! CHECK:     fir.if %false{{[_0-9]*}} {
135      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feraiseexcept(%[[V_272]]) fastmath<contract> : (i32) -> i32
136      ! CHECK:     } else {
137      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feclearexcept(%[[V_272]]) fastmath<contract> : (i32) -> i32
138      ! CHECK:     }
139      ! CHECK:     %[[V_273:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
140      ! CHECK:     %[[V_274:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
141      ! CHECK:     %[[V_275:[0-9]+]] = math.copysign %[[V_273]], %cst{{[_0-9]*}} fastmath<contract> : f32
142      ! CHECK:     %[[V_276:[0-9]+]] = math.copysign %[[V_274]], %cst{{[_0-9]*}} fastmath<contract> : f32
143      ! CHECK:     %[[V_277:[0-9]+]] = arith.cmpf olt, %[[V_275]], %[[V_276]] {{.*}} : f32
144      ! CHECK:     %[[V_278:[0-9]+]] = fir.if %[[V_277]] -> (f32) {
145      ! CHECK:       fir.result %[[V_274]] : f32
146      ! CHECK:     } else {
147      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_275]], %[[V_276]] {{.*}} : f32
148      ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
149      ! CHECK:         fir.result %[[V_273]] : f32
150      ! CHECK:       } else {
151      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_275]], %[[V_276]] {{.*}} : f32
152      ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
153      ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_273]]) <{bit = 960 : i32}> : (f32) -> i1
154      ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_273]], %[[V_274]] : f32
155      ! CHECK:           fir.result %[[V_697]] : f32
156      ! CHECK:         } else {
157      ! CHECK:           %[[V_696:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
158      ! CHECK:           %[[V_697:[0-9]+]] = fir.load %[[V_696]] : !fir.ref<i32>
159      ! CHECK:           %[[V_698:[0-9]+]] = arith.bitcast %[[V_697]] : i32 to f32
160      ! CHECK-DAG:       %[[V_699:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_274]]) <{bit = 1 : i32}> : (f32) -> i1
161      ! CHECK-DAG:       %[[V_700:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_273]]) <{bit = 1 : i32}> : (f32) -> i1
162      ! CHECK:           %[[V_701:[0-9]+]] = arith.ori %[[V_700]], %[[V_699]] : i1
163      ! CHECK:           fir.if %[[V_701]] {
164      ! CHECK:             %[[V_702:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
165      ! CHECK:             %[[V_703:[0-9]+]] = fir.call @feraiseexcept(%[[V_702]]) fastmath<contract> : (i32) -> i32
166      ! CHECK:           }
167      ! CHECK:           fir.result %[[V_698]] : f32
168      ! CHECK:         }
169      ! CHECK:         fir.result %[[V_695]] : f32
170      ! CHECK:       }
171      ! CHECK:       fir.result %[[V_693]] : f32
172      ! CHECK:     }
173      ! CHECK:     fir.store %[[V_278]] to %[[V_83]] : !fir.ref<f32>
174      ! CHECK:     %[[V_279:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
175      ! CHECK:     %[[V_280:[0-9]+]] = fir.coordinate_of %[[V_279]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
176      ! CHECK:     %[[V_281:[0-9]+]] = fir.load %[[V_280]] : !fir.ref<i8>
177      ! CHECK:     %[[V_282:[0-9]+]] = fir.convert %[[V_281]] : (i8) -> i32
178      ! CHECK:     %[[V_283:[0-9]+]] = fir.call @_FortranAMapException(%[[V_282]]) fastmath<contract> : (i32) -> i32
179      ! CHECK:     %[[V_284:[0-9]+]] = fir.call @fetestexcept(%[[V_283]]) fastmath<contract> : (i32) -> i32
180      ! CHECK:     %[[V_285:[0-9]+]] = arith.cmpi ne, %[[V_284]], %c0{{.*}} : i32
181      ! CHECK:     %[[V_286:[0-9]+]] = fir.convert %[[V_285]] : (i1) -> !fir.logical<4>
182      ! CHECK:     fir.store %[[V_286]] to %[[V_21]] : !fir.ref<!fir.logical<4>>
183      call ieee_set_flag(ieee_invalid, .false.)
184      r = ieee_max_mag(a, b)
185      call ieee_get_flag(ieee_invalid, flag_value)
186      write(*, 4) 'mag    ', a, a, b, b, r, flag_value, trim(tag(r))
187
188      ! CHECK:     %[[V_329:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
189      ! CHECK:     %[[V_330:[0-9]+]] = fir.coordinate_of %[[V_329]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
190      ! CHECK:     %[[V_331:[0-9]+]] = fir.load %[[V_330]] : !fir.ref<i8>
191      ! CHECK:     %[[V_332:[0-9]+]] = fir.convert %[[V_331]] : (i8) -> i32
192      ! CHECK:     %[[V_333:[0-9]+]] = fir.call @_FortranAMapException(%[[V_332]]) fastmath<contract> : (i32) -> i32
193      ! CHECK:     fir.if %false{{[_0-9]*}} {
194      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feraiseexcept(%[[V_333]]) fastmath<contract> : (i32) -> i32
195      ! CHECK:     } else {
196      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feclearexcept(%[[V_333]]) fastmath<contract> : (i32) -> i32
197      ! CHECK:     }
198      ! CHECK:     %[[V_334:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
199      ! CHECK:     %[[V_335:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
200      ! CHECK:     %[[V_336:[0-9]+]] = arith.cmpf olt, %[[V_334]], %[[V_335]] {{.*}} : f32
201      ! CHECK:     %[[V_337:[0-9]+]] = fir.if %[[V_336]] -> (f32) {
202      ! CHECK:       fir.result %[[V_335]] : f32
203      ! CHECK:     } else {
204      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_334]], %[[V_335]] {{.*}} : f32
205      ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
206      ! CHECK:         fir.result %[[V_334]] : f32
207      ! CHECK:       } else {
208      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_334]], %[[V_335]] {{.*}} : f32
209      ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
210      ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_334]]) <{bit = 960 : i32}> : (f32) -> i1
211      ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_334]], %[[V_335]] : f32
212      ! CHECK:           fir.result %[[V_697]] : f32
213      ! CHECK:         } else {
214      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_334]], %[[V_334]] {{.*}} : f32
215      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_335]], %[[V_335]] {{.*}} : f32
216      ! CHECK:           %[[V_698:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
217      ! CHECK:           %[[V_699:[0-9]+]] = fir.load %[[V_698]] : !fir.ref<i32>
218      ! CHECK:           %[[V_700:[0-9]+]] = arith.bitcast %[[V_699]] : i32 to f32
219      ! CHECK:           %[[V_701:[0-9]+]] = arith.select %[[V_697]], %[[V_335]], %[[V_700]] : f32
220      ! CHECK:           %[[V_702:[0-9]+]] = arith.select %[[V_696]], %[[V_334]], %[[V_701]] : f32
221      ! CHECK-DAG:       %[[V_703:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_335]]) <{bit = 1 : i32}> : (f32) -> i1
222      ! CHECK-DAG:       %[[V_704:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_334]]) <{bit = 1 : i32}> : (f32) -> i1
223      ! CHECK:           %[[V_705:[0-9]+]] = arith.ori %[[V_704]], %[[V_703]] : i1
224      ! CHECK:           fir.if %[[V_705]] {
225      ! CHECK:             %[[V_706:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
226      ! CHECK:             %[[V_707:[0-9]+]] = fir.call @feraiseexcept(%[[V_706]]) fastmath<contract> : (i32) -> i32
227      ! CHECK:           }
228      ! CHECK:           fir.result %[[V_702]] : f32
229      ! CHECK:         }
230      ! CHECK:         fir.result %[[V_695]] : f32
231      ! CHECK:       }
232      ! CHECK:       fir.result %[[V_693]] : f32
233      ! CHECK:     }
234      ! CHECK:     fir.store %[[V_337]] to %[[V_83]] : !fir.ref<f32>
235      ! CHECK:     %[[V_338:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
236      ! CHECK:     %[[V_339:[0-9]+]] = fir.coordinate_of %[[V_338]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
237      ! CHECK:     %[[V_340:[0-9]+]] = fir.load %[[V_339]] : !fir.ref<i8>
238      ! CHECK:     %[[V_341:[0-9]+]] = fir.convert %[[V_340]] : (i8) -> i32
239      ! CHECK:     %[[V_342:[0-9]+]] = fir.call @_FortranAMapException(%[[V_341]]) fastmath<contract> : (i32) -> i32
240      ! CHECK:     %[[V_343:[0-9]+]] = fir.call @fetestexcept(%[[V_342]]) fastmath<contract> : (i32) -> i32
241      ! CHECK:     %[[V_344:[0-9]+]] = arith.cmpi ne, %[[V_343]], %c0{{.*}} : i32
242      ! CHECK:     %[[V_345:[0-9]+]] = fir.convert %[[V_344]] : (i1) -> !fir.logical<4>
243      ! CHECK:     fir.store %[[V_345]] to %[[V_21]] : !fir.ref<!fir.logical<4>>
244      call ieee_set_flag(ieee_invalid, .false.)
245      r = ieee_max_num(a, b)
246      call ieee_get_flag(ieee_invalid, flag_value)
247      write(*, 4) 'max_num', a, a, b, b, r, flag_value, trim(tag(r))
248
249      ! CHECK:     %[[V_388:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
250      ! CHECK:     %[[V_389:[0-9]+]] = fir.coordinate_of %[[V_388]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
251      ! CHECK:     %[[V_390:[0-9]+]] = fir.load %[[V_389]] : !fir.ref<i8>
252      ! CHECK:     %[[V_391:[0-9]+]] = fir.convert %[[V_390]] : (i8) -> i32
253      ! CHECK:     %[[V_392:[0-9]+]] = fir.call @_FortranAMapException(%[[V_391]]) fastmath<contract> : (i32) -> i32
254      ! CHECK:     fir.if %false{{[_0-9]*}} {
255      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feraiseexcept(%[[V_392]]) fastmath<contract> : (i32) -> i32
256      ! CHECK:     } else {
257      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feclearexcept(%[[V_392]]) fastmath<contract> : (i32) -> i32
258      ! CHECK:     }
259      ! CHECK:     %[[V_393:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
260      ! CHECK:     %[[V_394:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
261      ! CHECK:     %[[V_395:[0-9]+]] = math.copysign %[[V_393]], %cst{{[_0-9]*}} fastmath<contract> : f32
262      ! CHECK:     %[[V_396:[0-9]+]] = math.copysign %[[V_394]], %cst{{[_0-9]*}} fastmath<contract> : f32
263      ! CHECK:     %[[V_397:[0-9]+]] = arith.cmpf olt, %[[V_395]], %[[V_396]] {{.*}} : f32
264      ! CHECK:     %[[V_398:[0-9]+]] = fir.if %[[V_397]] -> (f32) {
265      ! CHECK:       fir.result %[[V_394]] : f32
266      ! CHECK:     } else {
267      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_395]], %[[V_396]] {{.*}} : f32
268      ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
269      ! CHECK:         fir.result %[[V_393]] : f32
270      ! CHECK:       } else {
271      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_395]], %[[V_396]] {{.*}} : f32
272      ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
273      ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_393]]) <{bit = 960 : i32}> : (f32) -> i1
274      ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_393]], %[[V_394]] : f32
275      ! CHECK:           fir.result %[[V_697]] : f32
276      ! CHECK:         } else {
277      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_393]], %[[V_393]] {{.*}} : f32
278      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_394]], %[[V_394]] {{.*}} : f32
279      ! CHECK:           %[[V_698:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
280      ! CHECK:           %[[V_699:[0-9]+]] = fir.load %[[V_698]] : !fir.ref<i32>
281      ! CHECK:           %[[V_700:[0-9]+]] = arith.bitcast %[[V_699]] : i32 to f32
282      ! CHECK:           %[[V_701:[0-9]+]] = arith.select %[[V_697]], %[[V_394]], %[[V_700]] : f32
283      ! CHECK:           %[[V_702:[0-9]+]] = arith.select %[[V_696]], %[[V_393]], %[[V_701]] : f32
284      ! CHECK-DAG:       %[[V_703:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_394]]) <{bit = 1 : i32}> : (f32) -> i1
285      ! CHECK-DAG:       %[[V_704:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_393]]) <{bit = 1 : i32}> : (f32) -> i1
286      ! CHECK:           %[[V_705:[0-9]+]] = arith.ori %[[V_704]], %[[V_703]] : i1
287      ! CHECK:           fir.if %[[V_705]] {
288      ! CHECK:             %[[V_706:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
289      ! CHECK:             %[[V_707:[0-9]+]] = fir.call @feraiseexcept(%[[V_706]]) fastmath<contract> : (i32) -> i32
290      ! CHECK:           }
291      ! CHECK:           fir.result %[[V_702]] : f32
292      ! CHECK:         }
293      ! CHECK:         fir.result %[[V_695]] : f32
294      ! CHECK:       }
295      ! CHECK:       fir.result %[[V_693]] : f32
296      ! CHECK:     }
297      ! CHECK:     fir.store %[[V_398]] to %[[V_83]] : !fir.ref<f32>
298      ! CHECK:     %[[V_399:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
299      ! CHECK:     %[[V_400:[0-9]+]] = fir.coordinate_of %[[V_399]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
300      ! CHECK:     %[[V_401:[0-9]+]] = fir.load %[[V_400]] : !fir.ref<i8>
301      ! CHECK:     %[[V_402:[0-9]+]] = fir.convert %[[V_401]] : (i8) -> i32
302      ! CHECK:     %[[V_403:[0-9]+]] = fir.call @_FortranAMapException(%[[V_402]]) fastmath<contract> : (i32) -> i32
303      ! CHECK:     %[[V_404:[0-9]+]] = fir.call @fetestexcept(%[[V_403]]) fastmath<contract> : (i32) -> i32
304      ! CHECK:     %[[V_405:[0-9]+]] = arith.cmpi ne, %[[V_404]], %c0{{.*}} : i32
305      ! CHECK:     %[[V_406:[0-9]+]] = fir.convert %[[V_405]] : (i1) -> !fir.logical<4>
306      ! CHECK:     fir.store %[[V_406]] to %[[V_21]] : !fir.ref<!fir.logical<4>>
307      call ieee_set_flag(ieee_invalid, .false.)
308      r = ieee_max_num_mag(a, b)
309      call ieee_get_flag(ieee_invalid, flag_value)
310      write(*, 4) 'mag_num', a, a, b, b, r, flag_value, trim(tag(r))
311
312      ! CHECK:     %[[V_449:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
313      ! CHECK:     %[[V_450:[0-9]+]] = fir.coordinate_of %[[V_449]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
314      ! CHECK:     %[[V_451:[0-9]+]] = fir.load %[[V_450]] : !fir.ref<i8>
315      ! CHECK:     %[[V_452:[0-9]+]] = fir.convert %[[V_451]] : (i8) -> i32
316      ! CHECK:     %[[V_453:[0-9]+]] = fir.call @_FortranAMapException(%[[V_452]]) fastmath<contract> : (i32) -> i32
317      ! CHECK:     fir.if %false{{[_0-9]*}} {
318      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feraiseexcept(%[[V_453]]) fastmath<contract> : (i32) -> i32
319      ! CHECK:     } else {
320      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feclearexcept(%[[V_453]]) fastmath<contract> : (i32) -> i32
321      ! CHECK:     }
322      ! CHECK:     %[[V_454:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
323      ! CHECK:     %[[V_455:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
324      ! CHECK:     %[[V_456:[0-9]+]] = arith.cmpf olt, %[[V_454]], %[[V_455]] {{.*}} : f32
325      ! CHECK:     %[[V_457:[0-9]+]] = fir.if %[[V_456]] -> (f32) {
326      ! CHECK:       fir.result %[[V_454]] : f32
327      ! CHECK:     } else {
328      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_454]], %[[V_455]] {{.*}} : f32
329      ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
330      ! CHECK:         fir.result %[[V_455]] : f32
331      ! CHECK:       } else {
332      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_454]], %[[V_455]] {{.*}} : f32
333      ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
334      ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_454]]) <{bit = 60 : i32}> : (f32) -> i1
335      ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_454]], %[[V_455]] : f32
336      ! CHECK:           fir.result %[[V_697]] : f32
337      ! CHECK:         } else {
338      ! CHECK:           %[[V_696:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
339      ! CHECK:           %[[V_697:[0-9]+]] = fir.load %[[V_696]] : !fir.ref<i32>
340      ! CHECK:           %[[V_698:[0-9]+]] = arith.bitcast %[[V_697]] : i32 to f32
341      ! CHECK-DAG:       %[[V_699:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_455]]) <{bit = 1 : i32}> : (f32) -> i1
342      ! CHECK-DAG:       %[[V_700:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_454]]) <{bit = 1 : i32}> : (f32) -> i1
343      ! CHECK:           %[[V_701:[0-9]+]] = arith.ori %[[V_700]], %[[V_699]] : i1
344      ! CHECK:           fir.if %[[V_701]] {
345      ! CHECK:             %[[V_702:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
346      ! CHECK:             %[[V_703:[0-9]+]] = fir.call @feraiseexcept(%[[V_702]]) fastmath<contract> : (i32) -> i32
347      ! CHECK:           }
348      ! CHECK:           fir.result %[[V_698]] : f32
349      ! CHECK:         }
350      ! CHECK:         fir.result %[[V_695]] : f32
351      ! CHECK:       }
352      ! CHECK:       fir.result %[[V_693]] : f32
353      ! CHECK:     }
354      ! CHECK:     fir.store %[[V_457]] to %[[V_83]] : !fir.ref<f32>
355      ! CHECK:     %[[V_458:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
356      ! CHECK:     %[[V_459:[0-9]+]] = fir.coordinate_of %[[V_458]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
357      ! CHECK:     %[[V_460:[0-9]+]] = fir.load %[[V_459]] : !fir.ref<i8>
358      ! CHECK:     %[[V_461:[0-9]+]] = fir.convert %[[V_460]] : (i8) -> i32
359      ! CHECK:     %[[V_462:[0-9]+]] = fir.call @_FortranAMapException(%[[V_461]]) fastmath<contract> : (i32) -> i32
360      ! CHECK:     %[[V_463:[0-9]+]] = fir.call @fetestexcept(%[[V_462]]) fastmath<contract> : (i32) -> i32
361      ! CHECK:     %[[V_464:[0-9]+]] = arith.cmpi ne, %[[V_463]], %c0{{.*}} : i32
362      ! CHECK:     %[[V_465:[0-9]+]] = fir.convert %[[V_464]] : (i1) -> !fir.logical<4>
363      ! CHECK:     fir.store %[[V_465]] to %[[V_21]] : !fir.ref<!fir.logical<4>>
364      call ieee_set_flag(ieee_invalid, .false.)
365      r = ieee_min(a, b)
366      call ieee_get_flag(ieee_invalid, flag_value)
367      write(*, 4) 'min    ', a, a, b, b, r, flag_value, trim(tag(r))
368
369      ! CHECK:     %[[V_508:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
370      ! CHECK:     %[[V_509:[0-9]+]] = fir.coordinate_of %[[V_508]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
371      ! CHECK:     %[[V_510:[0-9]+]] = fir.load %[[V_509]] : !fir.ref<i8>
372      ! CHECK:     %[[V_511:[0-9]+]] = fir.convert %[[V_510]] : (i8) -> i32
373      ! CHECK:     %[[V_512:[0-9]+]] = fir.call @_FortranAMapException(%[[V_511]]) fastmath<contract> : (i32) -> i32
374      ! CHECK:     fir.if %false{{[_0-9]*}} {
375      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feraiseexcept(%[[V_512]]) fastmath<contract> : (i32) -> i32
376      ! CHECK:     } else {
377      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feclearexcept(%[[V_512]]) fastmath<contract> : (i32) -> i32
378      ! CHECK:     }
379      ! CHECK:     %[[V_513:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
380      ! CHECK:     %[[V_514:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
381      ! CHECK:     %[[V_515:[0-9]+]] = math.copysign %[[V_513]], %cst{{[_0-9]*}} fastmath<contract> : f32
382      ! CHECK:     %[[V_516:[0-9]+]] = math.copysign %[[V_514]], %cst{{[_0-9]*}} fastmath<contract> : f32
383      ! CHECK:     %[[V_517:[0-9]+]] = arith.cmpf olt, %[[V_515]], %[[V_516]] {{.*}} : f32
384      ! CHECK:     %[[V_518:[0-9]+]] = fir.if %[[V_517]] -> (f32) {
385      ! CHECK:       fir.result %[[V_513]] : f32
386      ! CHECK:     } else {
387      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_515]], %[[V_516]] {{.*}} : f32
388      ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
389      ! CHECK:         fir.result %[[V_514]] : f32
390      ! CHECK:       } else {
391      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_515]], %[[V_516]] {{.*}} : f32
392      ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
393      ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_513]]) <{bit = 60 : i32}> : (f32) -> i1
394      ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_513]], %[[V_514]] : f32
395      ! CHECK:           fir.result %[[V_697]] : f32
396      ! CHECK:         } else {
397      ! CHECK:           %[[V_696:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
398      ! CHECK:           %[[V_697:[0-9]+]] = fir.load %[[V_696]] : !fir.ref<i32>
399      ! CHECK:           %[[V_698:[0-9]+]] = arith.bitcast %[[V_697]] : i32 to f32
400      ! CHECK-DAG:       %[[V_699:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_514]]) <{bit = 1 : i32}> : (f32) -> i1
401      ! CHECK-DAG:       %[[V_700:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_513]]) <{bit = 1 : i32}> : (f32) -> i1
402      ! CHECK:           %[[V_701:[0-9]+]] = arith.ori %[[V_700]], %[[V_699]] : i1
403      ! CHECK:           fir.if %[[V_701]] {
404      ! CHECK:             %[[V_702:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
405      ! CHECK:             %[[V_703:[0-9]+]] = fir.call @feraiseexcept(%[[V_702]]) fastmath<contract> : (i32) -> i32
406      ! CHECK:           }
407      ! CHECK:           fir.result %[[V_698]] : f32
408      ! CHECK:         }
409      ! CHECK:         fir.result %[[V_695]] : f32
410      ! CHECK:       }
411      ! CHECK:       fir.result %[[V_693]] : f32
412      ! CHECK:     }
413      ! CHECK:     fir.store %[[V_518]] to %[[V_83]] : !fir.ref<f32>
414      ! CHECK:     %[[V_519:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
415      ! CHECK:     %[[V_520:[0-9]+]] = fir.coordinate_of %[[V_519]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
416      ! CHECK:     %[[V_521:[0-9]+]] = fir.load %[[V_520]] : !fir.ref<i8>
417      ! CHECK:     %[[V_522:[0-9]+]] = fir.convert %[[V_521]] : (i8) -> i32
418      ! CHECK:     %[[V_523:[0-9]+]] = fir.call @_FortranAMapException(%[[V_522]]) fastmath<contract> : (i32) -> i32
419      ! CHECK:     %[[V_524:[0-9]+]] = fir.call @fetestexcept(%[[V_523]]) fastmath<contract> : (i32) -> i32
420      ! CHECK:     %[[V_525:[0-9]+]] = arith.cmpi ne, %[[V_524]], %c0{{.*}} : i32
421      ! CHECK:     %[[V_526:[0-9]+]] = fir.convert %[[V_525]] : (i1) -> !fir.logical<4>
422      ! CHECK:     fir.store %[[V_526]] to %[[V_21]] : !fir.ref<!fir.logical<4>>
423      call ieee_set_flag(ieee_invalid, .false.)
424      r = ieee_min_mag(a, b)
425      call ieee_get_flag(ieee_invalid, flag_value)
426      write(*, 4) 'mig    ', a, a, b, b, r, flag_value, trim(tag(r))
427
428      ! CHECK:     %[[V_569:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
429      ! CHECK:     %[[V_570:[0-9]+]] = fir.coordinate_of %[[V_569]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
430      ! CHECK:     %[[V_571:[0-9]+]] = fir.load %[[V_570]] : !fir.ref<i8>
431      ! CHECK:     %[[V_572:[0-9]+]] = fir.convert %[[V_571]] : (i8) -> i32
432      ! CHECK:     %[[V_573:[0-9]+]] = fir.call @_FortranAMapException(%[[V_572]]) fastmath<contract> : (i32) -> i32
433      ! CHECK:     fir.if %false{{[_0-9]*}} {
434      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feraiseexcept(%[[V_573]]) fastmath<contract> : (i32) -> i32
435      ! CHECK:     } else {
436      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feclearexcept(%[[V_573]]) fastmath<contract> : (i32) -> i32
437      ! CHECK:     }
438      ! CHECK:     %[[V_574:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
439      ! CHECK:     %[[V_575:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
440      ! CHECK:     %[[V_576:[0-9]+]] = arith.cmpf olt, %[[V_574]], %[[V_575]] {{.*}} : f32
441      ! CHECK:     %[[V_577:[0-9]+]] = fir.if %[[V_576]] -> (f32) {
442      ! CHECK:       fir.result %[[V_574]] : f32
443      ! CHECK:     } else {
444      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_574]], %[[V_575]] {{.*}} : f32
445      ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
446      ! CHECK:         fir.result %[[V_575]] : f32
447      ! CHECK:       } else {
448      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_574]], %[[V_575]] {{.*}} : f32
449      ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
450      ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_574]]) <{bit = 60 : i32}> : (f32) -> i1
451      ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_574]], %[[V_575]] : f32
452      ! CHECK:           fir.result %[[V_697]] : f32
453      ! CHECK:         } else {
454      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_574]], %[[V_574]] {{.*}} : f32
455      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_575]], %[[V_575]] {{.*}} : f32
456      ! CHECK:           %[[V_698:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
457      ! CHECK:           %[[V_699:[0-9]+]] = fir.load %[[V_698]] : !fir.ref<i32>
458      ! CHECK:           %[[V_700:[0-9]+]] = arith.bitcast %[[V_699]] : i32 to f32
459      ! CHECK:           %[[V_701:[0-9]+]] = arith.select %[[V_697]], %[[V_575]], %[[V_700]] : f32
460      ! CHECK:           %[[V_702:[0-9]+]] = arith.select %[[V_696]], %[[V_574]], %[[V_701]] : f32
461      ! CHECK-DAG:       %[[V_703:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_575]]) <{bit = 1 : i32}> : (f32) -> i1
462      ! CHECK-DAG:       %[[V_704:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_574]]) <{bit = 1 : i32}> : (f32) -> i1
463      ! CHECK:           %[[V_705:[0-9]+]] = arith.ori %[[V_704]], %[[V_703]] : i1
464      ! CHECK:           fir.if %[[V_705]] {
465      ! CHECK:             %[[V_706:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
466      ! CHECK:             %[[V_707:[0-9]+]] = fir.call @feraiseexcept(%[[V_706]]) fastmath<contract> : (i32) -> i32
467      ! CHECK:           }
468      ! CHECK:           fir.result %[[V_702]] : f32
469      ! CHECK:         }
470      ! CHECK:         fir.result %[[V_695]] : f32
471      ! CHECK:       }
472      ! CHECK:       fir.result %[[V_693]] : f32
473      ! CHECK:     }
474      ! CHECK:     fir.store %[[V_577]] to %[[V_83]] : !fir.ref<f32>
475      ! CHECK:     %[[V_578:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
476      ! CHECK:     %[[V_579:[0-9]+]] = fir.coordinate_of %[[V_578]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
477      ! CHECK:     %[[V_580:[0-9]+]] = fir.load %[[V_579]] : !fir.ref<i8>
478      ! CHECK:     %[[V_581:[0-9]+]] = fir.convert %[[V_580]] : (i8) -> i32
479      ! CHECK:     %[[V_582:[0-9]+]] = fir.call @_FortranAMapException(%[[V_581]]) fastmath<contract> : (i32) -> i32
480      ! CHECK:     %[[V_583:[0-9]+]] = fir.call @fetestexcept(%[[V_582]]) fastmath<contract> : (i32) -> i32
481      ! CHECK:     %[[V_584:[0-9]+]] = arith.cmpi ne, %[[V_583]], %c0{{.*}} : i32
482      ! CHECK:     %[[V_585:[0-9]+]] = fir.convert %[[V_584]] : (i1) -> !fir.logical<4>
483      ! CHECK:     fir.store %[[V_585]] to %[[V_21]] : !fir.ref<!fir.logical<4>>
484      call ieee_set_flag(ieee_invalid, .false.)
485      r = ieee_min_num(a, b)
486      call ieee_get_flag(ieee_invalid, flag_value)
487      write(*, 4) 'min_num', a, a, b, b, r, flag_value, trim(tag(r))
488
489      ! CHECK:     %[[V_628:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
490      ! CHECK:     %[[V_629:[0-9]+]] = fir.coordinate_of %[[V_628]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
491      ! CHECK:     %[[V_630:[0-9]+]] = fir.load %[[V_629]] : !fir.ref<i8>
492      ! CHECK:     %[[V_631:[0-9]+]] = fir.convert %[[V_630]] : (i8) -> i32
493      ! CHECK:     %[[V_632:[0-9]+]] = fir.call @_FortranAMapException(%[[V_631]]) fastmath<contract> : (i32) -> i32
494      ! CHECK:     fir.if %false{{[_0-9]*}} {
495      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feraiseexcept(%[[V_632]]) fastmath<contract> : (i32) -> i32
496      ! CHECK:     } else {
497      ! CHECK:       %[[V_692:[0-9]+]] = fir.call @feclearexcept(%[[V_632]]) fastmath<contract> : (i32) -> i32
498      ! CHECK:     }
499      ! CHECK:     %[[V_633:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
500      ! CHECK:     %[[V_634:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
501      ! CHECK:     %[[V_635:[0-9]+]] = math.copysign %[[V_633]], %cst{{[_0-9]*}} fastmath<contract> : f32
502      ! CHECK:     %[[V_636:[0-9]+]] = math.copysign %[[V_634]], %cst{{[_0-9]*}} fastmath<contract> : f32
503      ! CHECK:     %[[V_637:[0-9]+]] = arith.cmpf olt, %[[V_635]], %[[V_636]] {{.*}} : f32
504      ! CHECK:     %[[V_638:[0-9]+]] = fir.if %[[V_637]] -> (f32) {
505      ! CHECK:       fir.result %[[V_633]] : f32
506      ! CHECK:     } else {
507      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_635]], %[[V_636]] {{.*}} : f32
508      ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
509      ! CHECK:         fir.result %[[V_634]] : f32
510      ! CHECK:       } else {
511      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_635]], %[[V_636]] {{.*}} : f32
512      ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
513      ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_633]]) <{bit = 60 : i32}> : (f32) -> i1
514      ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_633]], %[[V_634]] : f32
515      ! CHECK:           fir.result %[[V_697]] : f32
516      ! CHECK:         } else {
517      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_633]], %[[V_633]] {{.*}} : f32
518      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_634]], %[[V_634]] {{.*}} : f32
519      ! CHECK:           %[[V_698:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
520      ! CHECK:           %[[V_699:[0-9]+]] = fir.load %[[V_698]] : !fir.ref<i32>
521      ! CHECK:           %[[V_700:[0-9]+]] = arith.bitcast %[[V_699]] : i32 to f32
522      ! CHECK:           %[[V_701:[0-9]+]] = arith.select %[[V_697]], %[[V_634]], %[[V_700]] : f32
523      ! CHECK:           %[[V_702:[0-9]+]] = arith.select %[[V_696]], %[[V_633]], %[[V_701]] : f32
524      ! CHECK-DAG:       %[[V_703:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_634]]) <{bit = 1 : i32}> : (f32) -> i1
525      ! CHECK-DAG:       %[[V_704:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_633]]) <{bit = 1 : i32}> : (f32) -> i1
526      ! CHECK:           %[[V_705:[0-9]+]] = arith.ori %[[V_704]], %[[V_703]] : i1
527      ! CHECK:           fir.if %[[V_705]] {
528      ! CHECK:             %[[V_706:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
529      ! CHECK:             %[[V_707:[0-9]+]] = fir.call @feraiseexcept(%[[V_706]]) fastmath<contract> : (i32) -> i32
530      ! CHECK:           }
531      ! CHECK:           fir.result %[[V_702]] : f32
532      ! CHECK:         }
533      ! CHECK:         fir.result %[[V_695]] : f32
534      ! CHECK:       }
535      ! CHECK:       fir.result %[[V_693]] : f32
536      ! CHECK:     }
537      ! CHECK:     fir.store %[[V_638]] to %[[V_83]] : !fir.ref<f32>
538      ! CHECK:     %[[V_639:[0-9]+]] = fir.declare %[[V_201]] {fortran_attrs = #fir.var_attrs<parameter>, uniq_name = "_QQro._QM__fortran_builtinsT__builtin_ieee_flag_type.10"} : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>) -> !fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>
539      ! CHECK:     %[[V_640:[0-9]+]] = fir.coordinate_of %[[V_639]], %[[V_203]] : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_ieee_flag_type{_QM__fortran_builtinsT__builtin_ieee_flag_type.flag:i8}>>, !fir.field) -> !fir.ref<i8>
540      ! CHECK:     %[[V_641:[0-9]+]] = fir.load %[[V_640]] : !fir.ref<i8>
541      ! CHECK:     %[[V_642:[0-9]+]] = fir.convert %[[V_641]] : (i8) -> i32
542      ! CHECK:     %[[V_643:[0-9]+]] = fir.call @_FortranAMapException(%[[V_642]]) fastmath<contract> : (i32) -> i32
543      ! CHECK:     %[[V_644:[0-9]+]] = fir.call @fetestexcept(%[[V_643]]) fastmath<contract> : (i32) -> i32
544      ! CHECK:     %[[V_645:[0-9]+]] = arith.cmpi ne, %[[V_644]], %c0{{.*}} : i32
545      ! CHECK:     %[[V_646:[0-9]+]] = fir.convert %[[V_645]] : (i1) -> !fir.logical<4>
546      ! CHECK:     fir.store %[[V_646]] to %[[V_21]] : !fir.ref<!fir.logical<4>>
547      call ieee_set_flag(ieee_invalid, .false.)
548      r = ieee_min_num_mag(a, b)
549      call ieee_get_flag(ieee_invalid, flag_value)
550      write(*, 4) 'mig_num', a, a, b, b, r, flag_value, trim(tag(r))
551    enddo
552  enddo
553end
554