1 //===- unittest/Format/FormatTestVerilog.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "FormatTestBase.h" 10 11 #define DEBUG_TYPE "format-test" 12 13 namespace clang { 14 namespace format { 15 namespace test { 16 namespace { 17 class FormatTestVerilog : public test::FormatTestBase { 18 protected: 19 FormatStyle getDefaultStyle() const override { 20 return getLLVMStyle(FormatStyle::LK_Verilog); 21 } 22 std::string messUp(llvm::StringRef Code) const override { 23 return test::messUp(Code, /*HandleHash=*/false); 24 } 25 }; 26 27 TEST_F(FormatTestVerilog, Align) { 28 FormatStyle Style = getDefaultStyle(); 29 Style.AlignConsecutiveAssignments.Enabled = true; 30 verifyFormat("x <= x;\n" 31 "sfdbddfbdfbb <= x;\n" 32 "x = x;", 33 Style); 34 verifyFormat("x = x;\n" 35 "sfdbddfbdfbb = x;\n" 36 "x = x;", 37 Style); 38 // Compound assignments are not aligned by default. '<=' is not a compound 39 // assignment. 40 verifyFormat("x <= x;\n" 41 "sfdbddfbdfbb <= x;", 42 Style); 43 verifyFormat("x += x;\n" 44 "sfdbddfbdfbb <= x;", 45 Style); 46 verifyFormat("x <<= x;\n" 47 "sfdbddfbdfbb <= x;", 48 Style); 49 verifyFormat("x <<<= x;\n" 50 "sfdbddfbdfbb <= x;", 51 Style); 52 verifyFormat("x >>= x;\n" 53 "sfdbddfbdfbb <= x;", 54 Style); 55 verifyFormat("x >>>= x;\n" 56 "sfdbddfbdfbb <= x;", 57 Style); 58 Style.AlignConsecutiveAssignments.AlignCompound = true; 59 verifyFormat("x <= x;\n" 60 "sfdbddfbdfbb <= x;", 61 Style); 62 verifyFormat("x += x;\n" 63 "sfdbddfbdfbb <= x;", 64 Style); 65 verifyFormat("x <<= x;\n" 66 "sfdbddfbdfbb <= x;", 67 Style); 68 verifyFormat("x <<<= x;\n" 69 "sfdbddfbdfbb <= x;", 70 Style); 71 verifyFormat("x >>= x;\n" 72 "sfdbddfbdfbb <= x;", 73 Style); 74 verifyFormat("x >>>= x;\n" 75 "sfdbddfbdfbb <= x;", 76 Style); 77 } 78 79 TEST_F(FormatTestVerilog, Assign) { 80 verifyFormat("assign mynet = enable;"); 81 verifyFormat("assign (strong1, pull0) #1 mynet = enable;"); 82 verifyFormat("assign #1 mynet = enable;"); 83 verifyFormat("assign mynet = enable;"); 84 // Test that assignments are on separate lines. 85 verifyFormat("assign mynet = enable,\n" 86 " mynet1 = enable1;"); 87 // Test that `<=` and `,` don't confuse it. 88 verifyFormat("assign mynet = enable1 <= enable2;"); 89 verifyFormat("assign mynet = enable1 <= enable2,\n" 90 " mynet1 = enable3;"); 91 verifyFormat("assign mynet = enable,\n" 92 " mynet1 = enable2 <= enable3;"); 93 verifyFormat("assign mynet = enable(enable1, enable2);"); 94 } 95 96 TEST_F(FormatTestVerilog, BasedLiteral) { 97 verifyFormat("x = '0;"); 98 verifyFormat("x = '1;"); 99 verifyFormat("x = 'X;"); 100 verifyFormat("x = 'x;"); 101 verifyFormat("x = 'Z;"); 102 verifyFormat("x = 'z;"); 103 verifyFormat("x = 659;"); 104 verifyFormat("x = 'h837ff;"); 105 verifyFormat("x = 'o7460;"); 106 verifyFormat("x = 4'b1001;"); 107 verifyFormat("x = 5'D3;"); 108 verifyFormat("x = 3'b01x;"); 109 verifyFormat("x = 12'hx;"); 110 verifyFormat("x = 16'hz;"); 111 verifyFormat("x = -8'd6;"); 112 verifyFormat("x = 4'shf;"); 113 verifyFormat("x = -4'sd15;"); 114 verifyFormat("x = 16'sd?;"); 115 } 116 117 TEST_F(FormatTestVerilog, Block) { 118 verifyFormat("begin\n" 119 " x = x;\n" 120 "end"); 121 verifyFormat("begin : x\n" 122 " x = x;\n" 123 "end : x"); 124 verifyFormat("begin\n" 125 " x = x;\n" 126 " x = x;\n" 127 "end"); 128 verifyFormat("fork\n" 129 " x = x;\n" 130 "join"); 131 verifyFormat("fork\n" 132 " x = x;\n" 133 "join_any"); 134 verifyFormat("fork\n" 135 " x = x;\n" 136 "join_none"); 137 verifyFormat("generate\n" 138 " x = x;\n" 139 "endgenerate"); 140 verifyFormat("generate : x\n" 141 " x = x;\n" 142 "endgenerate : x"); 143 // Nested blocks. 144 verifyFormat("begin\n" 145 " begin\n" 146 " end\n" 147 "end"); 148 verifyFormat("begin : x\n" 149 " begin\n" 150 " end\n" 151 "end : x"); 152 verifyFormat("begin : x\n" 153 " begin : x\n" 154 " end : x\n" 155 "end : x"); 156 verifyFormat("begin\n" 157 " begin : x\n" 158 " end : x\n" 159 "end"); 160 // Test that 'disable fork' and 'rand join' don't get mistaken as blocks. 161 verifyFormat("disable fork;\n" 162 "x = x;"); 163 verifyFormat("rand join x x;\n" 164 "x = x;"); 165 // The begin keyword should not be indented if it is too long to fit on the 166 // same line. 167 verifyFormat("while (true) //\n" 168 "begin\n" 169 " while (true) //\n" 170 " begin\n" 171 " end\n" 172 "end"); 173 verifyFormat("while (true) //\n" 174 "begin : x\n" 175 " while (true) //\n" 176 " begin : x\n" 177 " end : x\n" 178 "end : x"); 179 verifyFormat("while (true) //\n" 180 "fork\n" 181 " while (true) //\n" 182 " fork\n" 183 " join\n" 184 "join"); 185 auto Style = getDefaultStyle(); 186 Style.ColumnLimit = 17; 187 verifyFormat("while (true)\n" 188 "begin\n" 189 " while (true)\n" 190 " begin\n" 191 " end\n" 192 "end", 193 "while (true) begin\n" 194 " while (true) begin" 195 " end\n" 196 "end", 197 Style); 198 } 199 200 TEST_F(FormatTestVerilog, Case) { 201 verifyFormat("case (data)\n" 202 "endcase"); 203 verifyFormat("casex (data)\n" 204 "endcase"); 205 verifyFormat("casez (data)\n" 206 "endcase"); 207 verifyFormat("case (data) inside\n" 208 "endcase"); 209 verifyFormat("case (data)\n" 210 " 16'd0:\n" 211 " result = 10'b0111111111;\n" 212 "endcase"); 213 verifyFormat("case (data)\n" 214 " xxxxxxxx:\n" 215 " result = 10'b0111111111;\n" 216 "endcase"); 217 // Test labels with multiple options. 218 verifyFormat("case (data)\n" 219 " 16'd0, 16'd1:\n" 220 " result = 10'b0111111111;\n" 221 "endcase"); 222 verifyFormat("case (data)\n" 223 " 16'd0, //\n" 224 " 16'd1:\n" 225 " result = 10'b0111111111;\n" 226 "endcase"); 227 // Test that blocks following labels are indented. 228 verifyFormat("case (data)\n" 229 " 16'd1: fork\n" 230 " result = 10'b1011111111;\n" 231 " join\n" 232 "endcase\n"); 233 verifyFormat("case (data)\n" 234 " 16'd1: fork : x\n" 235 " result = 10'b1011111111;\n" 236 " join : x\n" 237 "endcase\n"); 238 // Test default. 239 verifyFormat("case (data)\n" 240 " default\n" 241 " result = 10'b1011111111;\n" 242 "endcase"); 243 verifyFormat("case (data)\n" 244 " default:\n" 245 " result = 10'b1011111111;\n" 246 "endcase"); 247 // Test that question marks and colons don't get mistaken as labels. 248 verifyFormat("case (data)\n" 249 " 8'b1???????:\n" 250 " instruction1(ir);\n" 251 "endcase"); 252 verifyFormat("case (data)\n" 253 " x ? 8'b1??????? : 1:\n" 254 " instruction3(ir);\n" 255 "endcase"); 256 // Test indention options. 257 auto Style = getDefaultStyle(); 258 Style.IndentCaseLabels = false; 259 verifyFormat("case (data)\n" 260 "16'd0:\n" 261 " result = 10'b0111111111;\n" 262 "endcase", 263 Style); 264 verifyFormat("case (data)\n" 265 "16'd0: begin\n" 266 " result = 10'b0111111111;\n" 267 "end\n" 268 "endcase", 269 Style); 270 Style.IndentCaseLabels = true; 271 verifyFormat("case (data)\n" 272 " 16'd0:\n" 273 " result = 10'b0111111111;\n" 274 "endcase", 275 Style); 276 verifyFormat("case (data)\n" 277 " 16'd0: begin\n" 278 " result = 10'b0111111111;\n" 279 " end\n" 280 "endcase", 281 Style); 282 // Other colons should not be mistaken as case colons. 283 Style = getDefaultStyle(); 284 Style.BitFieldColonSpacing = FormatStyle::BFCS_None; 285 verifyFormat("case (x[1:0])\n" 286 "endcase", 287 Style); 288 verifyFormat("default:\n" 289 " x[1:0] = x[1:0];", 290 Style); 291 Style.BitFieldColonSpacing = FormatStyle::BFCS_Both; 292 verifyFormat("case (x[1 : 0])\n" 293 "endcase", 294 Style); 295 verifyFormat("default:\n" 296 " x[1 : 0] = x[1 : 0];", 297 Style); 298 Style = getDefaultStyle(); 299 Style.SpacesInContainerLiterals = true; 300 verifyFormat("case ('{x : x, default : 9})\n" 301 "endcase", 302 Style); 303 verifyFormat("x = '{x : x, default : 9};\n", Style); 304 verifyFormat("default:\n" 305 " x = '{x : x, default : 9};\n", 306 Style); 307 Style.SpacesInContainerLiterals = false; 308 verifyFormat("case ('{x: x, default: 9})\n" 309 "endcase", 310 Style); 311 verifyFormat("x = '{x: x, default: 9};\n", Style); 312 verifyFormat("default:\n" 313 " x = '{x: x, default: 9};\n", 314 Style); 315 } 316 317 TEST_F(FormatTestVerilog, Coverage) { 318 verifyFormat("covergroup x\n" 319 " @@(begin x);\n" 320 "endgroup"); 321 } 322 323 TEST_F(FormatTestVerilog, Declaration) { 324 verifyFormat("wire mynet;"); 325 verifyFormat("wire mynet, mynet1;"); 326 verifyFormat("wire mynet, //\n" 327 " mynet1;"); 328 verifyFormat("wire mynet = enable;"); 329 verifyFormat("wire mynet = enable, mynet1;"); 330 verifyFormat("wire mynet = enable, //\n" 331 " mynet1;"); 332 verifyFormat("wire mynet, mynet1 = enable;"); 333 verifyFormat("wire mynet, //\n" 334 " mynet1 = enable;"); 335 verifyFormat("wire mynet = enable, mynet1 = enable;"); 336 verifyFormat("wire mynet = enable, //\n" 337 " mynet1 = enable;"); 338 verifyFormat("wire (strong1, pull0) mynet;"); 339 verifyFormat("wire (strong1, pull0) mynet, mynet1;"); 340 verifyFormat("wire (strong1, pull0) mynet, //\n" 341 " mynet1;"); 342 verifyFormat("wire (strong1, pull0) mynet = enable;"); 343 verifyFormat("wire (strong1, pull0) mynet = enable, mynet1;"); 344 verifyFormat("wire (strong1, pull0) mynet = enable, //\n" 345 " mynet1;"); 346 verifyFormat("wire (strong1, pull0) mynet, mynet1 = enable;"); 347 verifyFormat("wire (strong1, pull0) mynet, //\n" 348 " mynet1 = enable;"); 349 } 350 351 TEST_F(FormatTestVerilog, Delay) { 352 // Delay by the default unit. 353 verifyFormat("#0;"); 354 verifyFormat("#1;"); 355 verifyFormat("#10;"); 356 verifyFormat("#1.5;"); 357 // Explicit unit. 358 verifyFormat("#1fs;"); 359 verifyFormat("#1.5fs;"); 360 verifyFormat("#1ns;"); 361 verifyFormat("#1.5ns;"); 362 verifyFormat("#1us;"); 363 verifyFormat("#1.5us;"); 364 verifyFormat("#1ms;"); 365 verifyFormat("#1.5ms;"); 366 verifyFormat("#1s;"); 367 verifyFormat("#1.5s;"); 368 // The following expression should be on the same line. 369 verifyFormat("#1 x = x;"); 370 verifyFormat("#1 x = x;", "#1\n" 371 "x = x;"); 372 } 373 374 TEST_F(FormatTestVerilog, Enum) { 375 verifyFormat("enum { x } x;"); 376 verifyFormat("typedef enum { x } x;"); 377 verifyFormat("enum { red, yellow, green } x;"); 378 verifyFormat("typedef enum { red, yellow, green } x;"); 379 verifyFormat("enum integer { x } x;"); 380 verifyFormat("typedef enum { x = 0 } x;"); 381 verifyFormat("typedef enum { red = 0, yellow = 1, green = 2 } x;"); 382 verifyFormat("typedef enum integer { x } x;"); 383 verifyFormat("typedef enum bit [0 : 1] { x } x;"); 384 verifyFormat("typedef enum { add = 10, sub[5], jmp[6 : 8] } E1;"); 385 verifyFormat("typedef enum { add = 10, sub[5] = 0, jmp[6 : 8] = 1 } E1;"); 386 } 387 388 TEST_F(FormatTestVerilog, Headers) { 389 // Test headers with multiple ports. 390 verifyFormat("module mh1\n" 391 " (input var int in1,\n" 392 " input var shortreal in2,\n" 393 " output tagged_st out);\n" 394 "endmodule"); 395 // There should be a space following the type but not the variable name. 396 verifyFormat("module test\n" 397 " (input wire [7 : 0] a,\n" 398 " input wire b[7 : 0],\n" 399 " input wire [7 : 0] c[7 : 0]);\n" 400 "endmodule"); 401 // Ports should be grouped by types. 402 verifyFormat("module test\n" 403 " (input [7 : 0] a,\n" 404 " input signed [7 : 0] b, c, d);\n" 405 "endmodule"); 406 verifyFormat("module test\n" 407 " (input [7 : 0] a,\n" 408 " (* x = x *) input signed [7 : 0] b, c, d);\n" 409 "endmodule"); 410 verifyFormat("module test\n" 411 " (input [7 : 0] a = 0,\n" 412 " input signed [7 : 0] b = 0, c = 0, d = 0);\n" 413 "endmodule"); 414 verifyFormat("module test\n" 415 " #(parameter x)\n" 416 " (input [7 : 0] a,\n" 417 " input signed [7 : 0] b, c, d);\n" 418 "endmodule"); 419 // When a line needs to be broken, ports of the same type should be aligned to 420 // the same column. 421 verifyFormat("module test\n" 422 " (input signed [7 : 0] b, c, //\n" 423 " d);\n" 424 "endmodule"); 425 verifyFormat("module test\n" 426 " ((* x = x *) input signed [7 : 0] b, c, //\n" 427 " d);\n" 428 "endmodule"); 429 verifyFormat("module test\n" 430 " (input signed [7 : 0] b = 0, c, //\n" 431 " d);\n" 432 "endmodule"); 433 verifyFormat("module test\n" 434 " (input signed [7 : 0] b, c = 0, //\n" 435 " d);\n" 436 "endmodule"); 437 verifyFormat("module test\n" 438 " (input signed [7 : 0] b, c, //\n" 439 " d = 0);\n" 440 "endmodule"); 441 verifyFormat("module test\n" 442 " (input wire logic signed [7 : 0][0 : 1] b, c, //\n" 443 " d);\n" 444 "endmodule"); 445 verifyFormat("module test\n" 446 " (input signed [7 : 0] b, //\n" 447 " c, //\n" 448 " d);\n" 449 "endmodule"); 450 verifyFormat("module test\n" 451 " (input [7 : 0] a,\n" 452 " input signed [7 : 0] b, //\n" 453 " c, //\n" 454 " d);\n" 455 "endmodule"); 456 verifyFormat("module test\n" 457 " (input signed [7 : 0] b, //\n" 458 " c, //\n" 459 " d,\n" 460 " output signed [7 : 0] h);\n" 461 "endmodule"); 462 // With a modport. 463 verifyFormat("module m\n" 464 " (i2.master i);\n" 465 "endmodule"); 466 verifyFormat("module m\n" 467 " (i2.master i, ii);\n" 468 "endmodule"); 469 verifyFormat("module m\n" 470 " (i2.master i, //\n" 471 " ii);\n" 472 "endmodule"); 473 verifyFormat("module m\n" 474 " (i2.master i,\n" 475 " input ii);\n" 476 "endmodule"); 477 verifyFormat("module m\n" 478 " (i2::i2.master i);\n" 479 "endmodule"); 480 verifyFormat("module m\n" 481 " (i2::i2.master i, ii);\n" 482 "endmodule"); 483 verifyFormat("module m\n" 484 " (i2::i2.master i, //\n" 485 " ii);\n" 486 "endmodule"); 487 verifyFormat("module m\n" 488 " (i2::i2.master i,\n" 489 " input ii);\n" 490 "endmodule"); 491 verifyFormat("module m\n" 492 " (i2::i2 i);\n" 493 "endmodule"); 494 verifyFormat("module m\n" 495 " (i2::i2 i, ii);\n" 496 "endmodule"); 497 verifyFormat("module m\n" 498 " (i2::i2 i, //\n" 499 " ii);\n" 500 "endmodule"); 501 verifyFormat("module m\n" 502 " (i2::i2 i,\n" 503 " input ii);\n" 504 "endmodule"); 505 // With a macro in the names. 506 verifyFormat("module m\n" 507 " (input var `x a, b);\n" 508 "endmodule"); 509 verifyFormat("module m\n" 510 " (input var `x a, //\n" 511 " b);\n" 512 "endmodule"); 513 verifyFormat("module m\n" 514 " (input var x `a, b);\n" 515 "endmodule"); 516 verifyFormat("module m\n" 517 " (input var x `a, //\n" 518 " b);\n" 519 "endmodule"); 520 // A line comment shouldn't disrupt the indentation of the port list. 521 verifyFormat("extern module x\n" 522 " (//\n" 523 " output y);"); 524 verifyFormat("extern module x\n" 525 " #(//\n" 526 " parameter x)\n" 527 " (//\n" 528 " output y);"); 529 // With a concatenation in the names. 530 auto Style = getDefaultStyle(); 531 Style.ColumnLimit = 40; 532 verifyFormat("`define X(x) \\\n" 533 " module test \\\n" 534 " (input var x``x a, b);", 535 Style); 536 verifyFormat("`define X(x) \\\n" 537 " module test \\\n" 538 " (input var x``x aaaaaaaaaaaaaaa, \\\n" 539 " b);", 540 Style); 541 verifyFormat("`define X(x) \\\n" 542 " module test \\\n" 543 " (input var x a``x, b);", 544 Style); 545 verifyFormat("`define X(x) \\\n" 546 " module test \\\n" 547 " (input var x aaaaaaaaaaaaaaa``x, \\\n" 548 " b);", 549 Style); 550 } 551 552 TEST_F(FormatTestVerilog, Hierarchy) { 553 verifyFormat("module x;\n" 554 "endmodule"); 555 // Test that the end label is on the same line as the end keyword. 556 verifyFormat("module x;\n" 557 "endmodule : x"); 558 // Test that things inside are indented. 559 verifyFormat("module x;\n" 560 " generate\n" 561 " endgenerate\n" 562 "endmodule"); 563 verifyFormat("program x;\n" 564 " generate\n" 565 " endgenerate\n" 566 "endprogram"); 567 verifyFormat("interface x;\n" 568 " generate\n" 569 " endgenerate\n" 570 "endinterface"); 571 verifyFormat("task x;\n" 572 " generate\n" 573 " endgenerate\n" 574 "endtask"); 575 verifyFormat("function x;\n" 576 " generate\n" 577 " endgenerate\n" 578 "endfunction"); 579 verifyFormat("class x;\n" 580 " generate\n" 581 " endgenerate\n" 582 "endclass"); 583 // Test that they nest. 584 verifyFormat("module x;\n" 585 " program x;\n" 586 " program x;\n" 587 " endprogram\n" 588 " endprogram\n" 589 "endmodule"); 590 // Test that an extern declaration doesn't change the indentation. 591 verifyFormat("extern module x;\n" 592 "x = x;"); 593 // Test complex headers 594 verifyFormat("extern module x\n" 595 " import x.x::x::*;\n" 596 " import x;\n" 597 " #(parameter x)\n" 598 " (output x);"); 599 verifyFormat("module x\n" 600 " import x.x::x::*;\n" 601 " import x;\n" 602 " #(parameter x)\n" 603 " (output x);\n" 604 " generate\n" 605 " endgenerate\n" 606 "endmodule : x"); 607 verifyFormat("virtual class x\n" 608 " (x)\n" 609 " extends x(x)\n" 610 " implements x, x, x;\n" 611 " generate\n" 612 " endgenerate\n" 613 "endclass : x\n"); 614 verifyFormat("function automatic logic [1 : 0] x\n" 615 " (input x);\n" 616 " generate\n" 617 " endgenerate\n" 618 "endfunction : x"); 619 } 620 621 TEST_F(FormatTestVerilog, Identifiers) { 622 // Escaped identifiers should not be split. 623 verifyFormat("\\busa+index"); 624 verifyFormat("\\-clock"); 625 verifyFormat("\\***error-condition***"); 626 verifyFormat("\\net1\\/net2"); 627 verifyFormat("\\{a,b}"); 628 verifyFormat("\\a*(b+c)"); 629 // Escaped identifiers can't be joined with the next token. Extra space 630 // should be removed. 631 verifyFormat("\\busa+index ;", "\\busa+index\n" 632 ";"); 633 verifyFormat("\\busa+index ;", "\\busa+index\r\n" 634 ";"); 635 verifyFormat("\\busa+index ;", "\\busa+index ;"); 636 verifyFormat("\\busa+index ;", "\\busa+index\n" 637 " ;"); 638 verifyFormat("\\busa+index ;"); 639 verifyFormat("(\\busa+index );"); 640 verifyFormat("\\busa+index \\busa+index ;"); 641 } 642 643 TEST_F(FormatTestVerilog, If) { 644 verifyFormat("if (x)\n" 645 " x = x;"); 646 verifyFormat("unique if (x)\n" 647 " x = x;"); 648 verifyFormat("unique0 if (x)\n" 649 " x = x;"); 650 verifyFormat("priority if (x)\n" 651 " x = x;"); 652 verifyFormat("if (x)\n" 653 " x = x;\n" 654 "x = x;"); 655 656 // Test else 657 verifyFormat("if (x)\n" 658 " x = x;\n" 659 "else if (x)\n" 660 " x = x;\n" 661 "else\n" 662 " x = x;"); 663 verifyFormat("if (x) begin\n" 664 " x = x;\n" 665 "end else if (x) begin\n" 666 " x = x;\n" 667 "end else begin\n" 668 " x = x;\n" 669 "end"); 670 verifyFormat("if (x) begin : x\n" 671 " x = x;\n" 672 "end : x else if (x) begin : x\n" 673 " x = x;\n" 674 "end : x else begin : x\n" 675 " x = x;\n" 676 "end : x"); 677 678 // Test block keywords. 679 verifyFormat("if (x) begin\n" 680 " x = x;\n" 681 "end"); 682 verifyFormat("if (x) begin : x\n" 683 " x = x;\n" 684 "end : x"); 685 verifyFormat("if (x) begin\n" 686 " x = x;\n" 687 " x = x;\n" 688 "end"); 689 verifyFormat("if (x) fork\n" 690 " x = x;\n" 691 "join"); 692 verifyFormat("if (x) fork\n" 693 " x = x;\n" 694 "join_any"); 695 verifyFormat("if (x) fork\n" 696 " x = x;\n" 697 "join_none"); 698 verifyFormat("if (x) generate\n" 699 " x = x;\n" 700 "endgenerate"); 701 verifyFormat("if (x) generate : x\n" 702 " x = x;\n" 703 "endgenerate : x"); 704 705 // Test that concatenation braces don't get regarded as blocks. 706 verifyFormat("if (x)\n" 707 " {x} = x;"); 708 verifyFormat("if (x)\n" 709 " x = {x};"); 710 verifyFormat("if (x)\n" 711 " x = {x};\n" 712 "else\n" 713 " {x} = {x};"); 714 715 // With attributes. 716 verifyFormat("(* x *) if (x)\n" 717 " x = x;"); 718 verifyFormat("(* x = \"x\" *) if (x)\n" 719 " x = x;"); 720 verifyFormat("(* x, x = \"x\" *) if (x)\n" 721 " x = x;"); 722 723 // Assert are treated similar to if. But the else parts should not be 724 // chained. 725 verifyFormat("assert (x);"); 726 verifyFormat("assert (x)\n" 727 " $info();"); 728 verifyFormat("assert (x)\n" 729 " $info();\n" 730 "else\n" 731 " $error();"); 732 verifyFormat("assert (x)\n" 733 "else\n" 734 " $error();"); 735 verifyFormat("assert (x)\n" 736 "else begin\n" 737 "end"); 738 verifyFormat("assert (x)\n" 739 "else\n" 740 " if (x)\n" 741 " $error();"); 742 verifyFormat("assert (x)\n" 743 " $info();\n" 744 "else\n" 745 " if (x)\n" 746 " $error();"); 747 verifyFormat("assert (x)\n" 748 " $info();\n" 749 "else\n" 750 " if (x)\n" 751 " $error();\n" 752 " else\n" 753 " $error();"); 754 verifyFormat("assert (x)\n" 755 " $info();\n" 756 "else\n" 757 " if (x)\n" 758 " $error();\n" 759 " else if (x)\n" 760 " $error();\n" 761 " else\n" 762 " $error();"); 763 // The body is optional for asserts. The next line should not be indented if 764 // the statement already ended with a semicolon. 765 verifyFormat("assert (x);\n" 766 "x = x;"); 767 verifyFormat("if (x)\n" 768 " assert (x);\n" 769 "else if (x) begin\n" 770 "end else begin\n" 771 "end"); 772 verifyFormat("if (x)\n" 773 " assert (x);\n" 774 "else begin\n" 775 "end"); 776 verifyFormat("if (x)\n" 777 " assert (x)\n" 778 " else begin\n" 779 " end"); 780 // Other keywords. 781 verifyFormat("assume (x)\n" 782 " $info();"); 783 verifyFormat("cover (x)\n" 784 " $info();"); 785 verifyFormat("restrict (x)\n" 786 " $info();"); 787 verifyFormat("assert #0 (x)\n" 788 " $info();"); 789 verifyFormat("assert final (x)\n" 790 " $info();"); 791 verifyFormat("cover #0 (x)\n" 792 " $info();"); 793 verifyFormat("cover final (x)\n" 794 " $info();"); 795 796 // The space around parentheses options should work. 797 auto Style = getDefaultStyle(); 798 verifyFormat("if (x)\n" 799 " x = x;\n" 800 "else if (x)\n" 801 " x = x;", 802 Style); 803 verifyFormat("assert (x);", Style); 804 verifyFormat("assert #0 (x);", Style); 805 verifyFormat("assert (x)\n" 806 "else\n" 807 " if (x)\n" 808 " x = x;", 809 Style); 810 Style.SpacesInParens = FormatStyle::SIPO_Custom; 811 Style.SpacesInParensOptions.InConditionalStatements = true; 812 verifyFormat("if ( x )\n" 813 " x = x;\n" 814 "else if ( x )\n" 815 " x = x;", 816 Style); 817 verifyFormat("assert ( x );", Style); 818 verifyFormat("assert #0 ( x );", Style); 819 verifyFormat("assert ( x )\n" 820 "else\n" 821 " if ( x )\n" 822 " x = x;", 823 Style); 824 } 825 826 TEST_F(FormatTestVerilog, Instantiation) { 827 // Without ports. 828 verifyFormat("ffnand ff1;"); 829 // With named ports. 830 verifyFormat("ffnand ff1(.qbar(out1),\n" 831 " .clear(in1),\n" 832 " .preset(in2));"); 833 // With wildcard. 834 verifyFormat("ffnand ff1(.qbar(out1),\n" 835 " .clear(in1),\n" 836 " .preset(in2),\n" 837 " .*);"); 838 verifyFormat("ffnand ff1(.*,\n" 839 " .qbar(out1),\n" 840 " .clear(in1),\n" 841 " .preset(in2));"); 842 // With unconnected ports. 843 verifyFormat("ffnand ff1(.q(),\n" 844 " .qbar(out1),\n" 845 " .clear(in1),\n" 846 " .preset(in2));"); 847 verifyFormat("ffnand ff1(.q(),\n" 848 " .qbar(),\n" 849 " .clear(),\n" 850 " .preset());"); 851 verifyFormat("ffnand ff1(,\n" 852 " .qbar(out1),\n" 853 " .clear(in1),\n" 854 " .preset(in2));"); 855 // With positional ports. 856 verifyFormat("ffnand ff1(out1,\n" 857 " in1,\n" 858 " in2);"); 859 verifyFormat("ffnand ff1(,\n" 860 " out1,\n" 861 " in1,\n" 862 " in2);"); 863 // Multiple instantiations. 864 verifyFormat("ffnand ff1(.q(),\n" 865 " .qbar(out1),\n" 866 " .clear(in1),\n" 867 " .preset(in2)),\n" 868 " ff1(.q(),\n" 869 " .qbar(out1),\n" 870 " .clear(in1),\n" 871 " .preset(in2));"); 872 verifyFormat("ffnand //\n" 873 " ff1(.q(),\n" 874 " .qbar(out1),\n" 875 " .clear(in1),\n" 876 " .preset(in2)),\n" 877 " ff1(.q(),\n" 878 " .qbar(out1),\n" 879 " .clear(in1),\n" 880 " .preset(in2));"); 881 // With breaking between instance ports disabled. 882 auto Style = getDefaultStyle(); 883 Style.VerilogBreakBetweenInstancePorts = false; 884 verifyFormat("ffnand ff1;", Style); 885 verifyFormat("ffnand ff1(.qbar(out1), .clear(in1), .preset(in2), .*);", 886 Style); 887 verifyFormat("ffnand ff1(out1, in1, in2);", Style); 888 verifyFormat("ffnand ff1(.q(), .qbar(out1), .clear(in1), .preset(in2)),\n" 889 " ff1(.q(), .qbar(out1), .clear(in1), .preset(in2));", 890 Style); 891 verifyFormat("ffnand //\n" 892 " ff1(.q(), .qbar(out1), .clear(in1), .preset(in2)),\n" 893 " ff1(.q(), .qbar(out1), .clear(in1), .preset(in2));", 894 Style); 895 } 896 897 TEST_F(FormatTestVerilog, Loop) { 898 verifyFormat("foreach (x[x])\n" 899 " x = x;"); 900 verifyFormat("repeat (x)\n" 901 " x = x;"); 902 verifyFormat("foreach (x[x]) begin\n" 903 "end"); 904 verifyFormat("repeat (x) begin\n" 905 "end"); 906 auto Style = getDefaultStyle(); 907 Style.SpacesInParens = FormatStyle::SIPO_Custom; 908 Style.SpacesInParensOptions.InConditionalStatements = true; 909 verifyFormat("foreach ( x[x] )\n" 910 " x = x;", 911 Style); 912 verifyFormat("repeat ( x )\n" 913 " x = x;", 914 Style); 915 } 916 917 TEST_F(FormatTestVerilog, Operators) { 918 // Test that unary operators are not followed by space. 919 verifyFormat("x = +x;"); 920 verifyFormat("x = -x;"); 921 verifyFormat("x = !x;"); 922 verifyFormat("x = ~x;"); 923 verifyFormat("x = &x;"); 924 verifyFormat("x = ~&x;"); 925 verifyFormat("x = |x;"); 926 verifyFormat("x = ~|x;"); 927 verifyFormat("x = ^x;"); 928 verifyFormat("x = ~^x;"); 929 verifyFormat("x = ^~x;"); 930 verifyFormat("x = ++x;"); 931 verifyFormat("x = --x;"); 932 933 // Test that `*` and `*>` are binary. 934 verifyFormat("x = x * x;"); 935 verifyFormat("x = (x * x);"); 936 verifyFormat("(opcode *> o1) = 6.1;"); 937 verifyFormat("(C, D *> Q) = 18;"); 938 // The wildcard import is not a binary operator. 939 verifyFormat("import p::*;"); 940 941 // Test that operators don't get split. 942 verifyFormat("x = x++;"); 943 verifyFormat("x = x--;"); 944 verifyFormat("x = x ** x;"); 945 verifyFormat("x = x << x;"); 946 verifyFormat("x = x >> x;"); 947 verifyFormat("x = x <<< x;"); 948 verifyFormat("x = x >>> x;"); 949 verifyFormat("x = x <= x;"); 950 verifyFormat("x = x >= x;"); 951 verifyFormat("x = x == x;"); 952 verifyFormat("x = x != x;"); 953 verifyFormat("x = x === x;"); 954 verifyFormat("x = x !== x;"); 955 verifyFormat("x = x ==? x;"); 956 verifyFormat("x = x !=? x;"); 957 verifyFormat("x = x ~^ x;"); 958 verifyFormat("x = x ^~ x;"); 959 verifyFormat("x = x && x;"); 960 verifyFormat("x = x || x;"); 961 verifyFormat("x = x->x;"); 962 verifyFormat("x = x <-> x;"); 963 verifyFormat("x += x;"); 964 verifyFormat("x -= x;"); 965 verifyFormat("x *= x;"); 966 verifyFormat("x /= x;"); 967 verifyFormat("x %= x;"); 968 verifyFormat("x &= x;"); 969 verifyFormat("x ^= x;"); 970 verifyFormat("x |= x;"); 971 verifyFormat("x <<= x;"); 972 verifyFormat("x >>= x;"); 973 verifyFormat("x <<<= x;"); 974 verifyFormat("x >>>= x;"); 975 verifyFormat("x <= x;"); 976 977 // Test that space is added between operators. 978 verifyFormat("x = x < -x;", "x=x<-x;"); 979 verifyFormat("x = x << -x;", "x=x<<-x;"); 980 verifyFormat("x = x <<< -x;", "x=x<<<-x;"); 981 982 // Test that operators that are C++ identifiers get treated as operators. 983 verifyFormat("solve s before d;"); // before 984 verifyFormat("binsof(i) intersect {0};"); // intersect 985 verifyFormat("req dist {1};"); // dist 986 verifyFormat("a inside {b, c};"); // inside 987 verifyFormat("bus.randomize() with { atype == low; };"); // with 988 } 989 990 TEST_F(FormatTestVerilog, Preprocessor) { 991 auto Style = getDefaultStyle(); 992 Style.ColumnLimit = 20; 993 994 // Macro definitions. 995 verifyFormat("`define X \\\n" 996 " if (x) \\\n" 997 " x = x;", 998 "`define X if(x)x=x;", Style); 999 verifyFormat("`define X(x) \\\n" 1000 " if (x) \\\n" 1001 " x = x;", 1002 "`define X(x) if(x)x=x;", Style); 1003 verifyFormat("`define X \\\n" 1004 " x = x; \\\n" 1005 " x = x;", 1006 "`define X x=x;x=x;", Style); 1007 // Macro definitions with invocations inside. 1008 verifyFormat("`define LIST \\\n" 1009 " `ENTRY \\\n" 1010 " `ENTRY", 1011 "`define LIST \\\n" 1012 "`ENTRY \\\n" 1013 "`ENTRY", 1014 Style); 1015 verifyFormat("`define LIST \\\n" 1016 " `x = `x; \\\n" 1017 " `x = `x;", 1018 "`define LIST \\\n" 1019 "`x = `x; \\\n" 1020 "`x = `x;", 1021 Style); 1022 verifyFormat("`define LIST \\\n" 1023 " `x = `x; \\\n" 1024 " `x = `x;", 1025 "`define LIST `x=`x;`x=`x;", Style); 1026 // Macro invocations. 1027 verifyFormat("`x = (`x1 + `x2 + x);"); 1028 // Lines starting with a preprocessor directive should not be indented. 1029 std::string Directives[] = { 1030 "begin_keywords", 1031 "celldefine", 1032 "default_nettype", 1033 "define", 1034 "else", 1035 "elsif", 1036 "end_keywords", 1037 "endcelldefine", 1038 "endif", 1039 "ifdef", 1040 "ifndef", 1041 "include", 1042 "line", 1043 "nounconnected_drive", 1044 "pragma", 1045 "resetall", 1046 "timescale", 1047 "unconnected_drive", 1048 "undef", 1049 "undefineall", 1050 }; 1051 for (auto &Name : Directives) { 1052 verifyFormat("if (x)\n" 1053 "`" + 1054 Name + 1055 "\n" 1056 " ;", 1057 "if (x)\n" 1058 "`" + 1059 Name + 1060 "\n" 1061 ";", 1062 Style); 1063 } 1064 // Lines starting with a regular macro invocation should be indented as a 1065 // normal line. 1066 verifyFormat("if (x)\n" 1067 " `x = `x;\n" 1068 "`timescale 1ns / 1ps", 1069 "if (x)\n" 1070 "`x = `x;\n" 1071 "`timescale 1ns / 1ps", 1072 Style); 1073 verifyFormat("if (x)\n" 1074 "`timescale 1ns / 1ps\n" 1075 " `x = `x;", 1076 "if (x)\n" 1077 "`timescale 1ns / 1ps\n" 1078 "`x = `x;", 1079 Style); 1080 std::string NonDirectives[] = { 1081 // For `__FILE__` and `__LINE__`, although the standard classifies them as 1082 // preprocessor directives, they are used like regular macros. 1083 "__FILE__", "__LINE__", "elif", "foo", "x", 1084 }; 1085 for (auto &Name : NonDirectives) { 1086 verifyFormat("if (x)\n" 1087 " `" + 1088 Name + ";", 1089 "if (x)\n" 1090 "`" + 1091 Name + 1092 "\n" 1093 ";", 1094 Style); 1095 } 1096 } 1097 1098 TEST_F(FormatTestVerilog, Primitive) { 1099 verifyFormat("primitive multiplexer\n" 1100 " (mux, control, dataA, dataB);\n" 1101 " output mux;\n" 1102 " input control, dataA, dataB;\n" 1103 " table\n" 1104 " 0 1 ? : 1;\n" 1105 " 0 0 ? : 0;\n" 1106 " 1 ? 1 : 1;\n" 1107 " 1 ? 0 : 0;\n" 1108 " x 0 0 : 0;\n" 1109 " x 1 1 : 1;\n" 1110 " endtable\n" 1111 "endprimitive"); 1112 verifyFormat("primitive latch\n" 1113 " (q, ena_, data);\n" 1114 " output q;\n" 1115 " reg q;\n" 1116 " input ena_, data;\n" 1117 " table\n" 1118 " 0 1 : ? : 1;\n" 1119 " 0 0 : ? : 0;\n" 1120 " 1 ? : ? : -;\n" 1121 " ? * : ? : -;\n" 1122 " endtable\n" 1123 "endprimitive"); 1124 verifyFormat("primitive d\n" 1125 " (q, clock, data);\n" 1126 " output q;\n" 1127 " reg q;\n" 1128 " input clock, data;\n" 1129 " table\n" 1130 " (01) 0 : ? : 0;\n" 1131 " (01) 1 : ? : 1;\n" 1132 " (0?) 1 : 1 : 1;\n" 1133 " (0?) 0 : 0 : 0;\n" 1134 " (?0) ? : ? : -;\n" 1135 " (?\?) ? : ? : -;\n" 1136 " endtable\n" 1137 "endprimitive"); 1138 } 1139 1140 TEST_F(FormatTestVerilog, Streaming) { 1141 verifyFormat("x = {>>{j}};"); 1142 verifyFormat("x = {>>byte{j}};"); 1143 verifyFormat("x = {<<{j}};"); 1144 verifyFormat("x = {<<byte{j}};"); 1145 verifyFormat("x = {<<16{j}};"); 1146 verifyFormat("x = {<<{8'b0011_0101}};"); 1147 verifyFormat("x = {<<4{6'b11_0101}};"); 1148 verifyFormat("x = {>>4{6'b11_0101}};"); 1149 verifyFormat("x = {<<2{{<<{4'b1101}}}};"); 1150 verifyFormat("bit [96 : 1] y = {>>{a, b, c}};"); 1151 verifyFormat("int j = {>>{a, b, c}};"); 1152 verifyFormat("{>>{a, b, c}} = 23'b1;"); 1153 verifyFormat("{>>{a, b, c}} = x;"); 1154 verifyFormat("{>>{j}} = x;"); 1155 verifyFormat("{>>byte{j}} = x;"); 1156 verifyFormat("{<<{j}} = x;"); 1157 verifyFormat("{<<byte{j}} = x;"); 1158 } 1159 1160 TEST_F(FormatTestVerilog, StringLiteral) { 1161 // Long strings should be broken. 1162 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ", 1163 "xxxx"});)", 1164 R"(x({"xxxxxxxxxxxxxxxx xxxx"});)", 1165 getStyleWithColumns(getDefaultStyle(), 23)); 1166 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx", 1167 " xxxx"});)", 1168 R"(x({"xxxxxxxxxxxxxxxx xxxx"});)", 1169 getStyleWithColumns(getDefaultStyle(), 22)); 1170 // Braces should be added when they don't already exist. 1171 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ", 1172 "xxxx"});)", 1173 R"(x("xxxxxxxxxxxxxxxx xxxx");)", 1174 getStyleWithColumns(getDefaultStyle(), 23)); 1175 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx", 1176 " xxxx"});)", 1177 R"(x("xxxxxxxxxxxxxxxx xxxx");)", 1178 getStyleWithColumns(getDefaultStyle(), 22)); 1179 verifyFormat(R"(x({{"xxxxxxxxxxxxxxxx ", 1180 "xxxx"} == x});)", 1181 R"(x({"xxxxxxxxxxxxxxxx xxxx" == x});)", 1182 getStyleWithColumns(getDefaultStyle(), 24)); 1183 verifyFormat(R"(string x = {"xxxxxxxxxxxxxxxx ", 1184 "xxxxxxxx"};)", 1185 R"(string x = "xxxxxxxxxxxxxxxx xxxxxxxx";)", 1186 getStyleWithColumns(getDefaultStyle(), 32)); 1187 // Space around braces should be correct. 1188 auto Style = getStyleWithColumns(getDefaultStyle(), 24); 1189 Style.Cpp11BracedListStyle = false; 1190 verifyFormat(R"(x({ "xxxxxxxxxxxxxxxx ", 1191 "xxxx" });)", 1192 R"(x("xxxxxxxxxxxxxxxx xxxx");)", Style); 1193 // Braces should not be added twice. 1194 verifyFormat(R"(x({"xxxxxxxx", 1195 "xxxxxxxx", 1196 "xxxxxx"});)", 1197 R"(x("xxxxxxxxxxxxxxxxxxxxxx");)", 1198 getStyleWithColumns(getDefaultStyle(), 14)); 1199 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ", 1200 "xxxxxxxxxxxxxxxx ", 1201 "xxxx"});)", 1202 R"(x("xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxx");)", 1203 getStyleWithColumns(getDefaultStyle(), 23)); 1204 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ", 1205 "xxxxxxxxxxxxxxxx ", 1206 "xxxx"});)", 1207 R"(x({"xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx ", "xxxx"});)", 1208 getStyleWithColumns(getDefaultStyle(), 23)); 1209 // These kinds of strings don't exist in Verilog. 1210 verifyNoCrash(R"(x(@"xxxxxxxxxxxxxxxx xxxx");)", 1211 getStyleWithColumns(getDefaultStyle(), 23)); 1212 verifyNoCrash(R"(x(u"xxxxxxxxxxxxxxxx xxxx");)", 1213 getStyleWithColumns(getDefaultStyle(), 23)); 1214 verifyNoCrash(R"(x(u8"xxxxxxxxxxxxxxxx xxxx");)", 1215 getStyleWithColumns(getDefaultStyle(), 23)); 1216 verifyNoCrash(R"(x(_T("xxxxxxxxxxxxxxxx xxxx"));)", 1217 getStyleWithColumns(getDefaultStyle(), 23)); 1218 } 1219 1220 TEST_F(FormatTestVerilog, StructLiteral) { 1221 verifyFormat("c = '{0, 0.0};"); 1222 verifyFormat("c = '{'{1, 1.0}, '{2, 2.0}};"); 1223 verifyFormat("c = '{a: 0, b: 0.0};"); 1224 verifyFormat("c = '{a: 0, b: 0.0, default: 0};"); 1225 verifyFormat("c = ab'{a: 0, b: 0.0};"); 1226 verifyFormat("c = ab'{cd: cd'{1, 1.0}, ef: ef'{2, 2.0}};"); 1227 verifyFormat("c = ab'{cd'{1, 1.0}, ef'{2, 2.0}};"); 1228 verifyFormat("d = {int: 1, shortreal: 1.0};"); 1229 verifyFormat("d = ab'{int: 1, shortreal: 1.0};"); 1230 verifyFormat("c = '{default: 0};"); 1231 auto Style = getDefaultStyle(); 1232 Style.SpacesInContainerLiterals = true; 1233 verifyFormat("c = '{a : 0, b : 0.0};", Style); 1234 verifyFormat("c = '{a : 0, b : 0.0, default : 0};", Style); 1235 verifyFormat("c = ab'{a : 0, b : 0.0};", Style); 1236 verifyFormat("c = ab'{cd : cd'{1, 1.0}, ef : ef'{2, 2.0}};", Style); 1237 1238 // It should be indented correctly when the line has to break. 1239 verifyFormat("c = //\n" 1240 " '{default: 0};"); 1241 Style = getDefaultStyle(); 1242 Style.ContinuationIndentWidth = 2; 1243 verifyFormat("c = //\n" 1244 " '{default: 0};", 1245 Style); 1246 } 1247 1248 TEST_F(FormatTestVerilog, StructuredProcedure) { 1249 // Blocks should be indented correctly. 1250 verifyFormat("initial begin\n" 1251 "end"); 1252 verifyFormat("initial begin\n" 1253 " x <= x;\n" 1254 " x <= x;\n" 1255 "end"); 1256 verifyFormat("initial\n" 1257 " x <= x;\n" 1258 "x <= x;"); 1259 verifyFormat("always @(x) begin\n" 1260 "end"); 1261 verifyFormat("always @(x) begin\n" 1262 " x <= x;\n" 1263 " x <= x;\n" 1264 "end"); 1265 verifyFormat("always @(x)\n" 1266 " x <= x;\n" 1267 "x <= x;"); 1268 // Various keywords. 1269 verifyFormat("always @(x)\n" 1270 " x <= x;"); 1271 verifyFormat("always @(posedge x)\n" 1272 " x <= x;"); 1273 verifyFormat("always @(posedge x or posedge y)\n" 1274 " x <= x;"); 1275 verifyFormat("always @(posedge x, posedge y)\n" 1276 " x <= x;"); 1277 verifyFormat("always @(negedge x, negedge y)\n" 1278 " x <= x;"); 1279 verifyFormat("always @(edge x, edge y)\n" 1280 " x <= x;"); 1281 verifyFormat("always\n" 1282 " x <= x;"); 1283 verifyFormat("always @*\n" 1284 " x <= x;"); 1285 verifyFormat("always @(*)\n" 1286 " x <= x;"); 1287 verifyFormat("always_comb\n" 1288 " x <= x;"); 1289 verifyFormat("always_latch @(x)\n" 1290 " x <= x;"); 1291 verifyFormat("always_ff @(posedge x)\n" 1292 " x <= x;"); 1293 verifyFormat("initial\n" 1294 " x <= x;"); 1295 verifyFormat("final\n" 1296 " x <= x;"); 1297 verifyFormat("forever\n" 1298 " x <= x;"); 1299 } 1300 } // namespace 1301 } // namespace test 1302 } // namespace format 1303 } // namespace clang 1304