1 //===- unittest/Format/FormatTestVerilog.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "FormatTestBase.h" 10 11 #define DEBUG_TYPE "format-test" 12 13 namespace clang { 14 namespace format { 15 namespace test { 16 namespace { 17 class FormatTestVerilog : public test::FormatTestBase { 18 protected: 19 FormatStyle getDefaultStyle() const override { 20 return getLLVMStyle(FormatStyle::LK_Verilog); 21 } 22 std::string messUp(StringRef Code) const override { 23 return test::messUp(Code, /*HandleHash=*/false); 24 } 25 }; 26 27 TEST_F(FormatTestVerilog, Align) { 28 FormatStyle Style = getDefaultStyle(); 29 Style.AlignConsecutiveAssignments.Enabled = true; 30 verifyFormat("x <= x;\n" 31 "sfdbddfbdfbb <= x;\n" 32 "x = x;", 33 Style); 34 verifyFormat("x = x;\n" 35 "sfdbddfbdfbb = x;\n" 36 "x = x;", 37 Style); 38 // Compound assignments are not aligned by default. '<=' is not a compound 39 // assignment. 40 verifyFormat("x <= x;\n" 41 "sfdbddfbdfbb <= x;", 42 Style); 43 verifyFormat("x += x;\n" 44 "sfdbddfbdfbb <= x;", 45 Style); 46 verifyFormat("x <<= x;\n" 47 "sfdbddfbdfbb <= x;", 48 Style); 49 verifyFormat("x <<<= x;\n" 50 "sfdbddfbdfbb <= x;", 51 Style); 52 verifyFormat("x >>= x;\n" 53 "sfdbddfbdfbb <= x;", 54 Style); 55 verifyFormat("x >>>= x;\n" 56 "sfdbddfbdfbb <= x;", 57 Style); 58 Style.AlignConsecutiveAssignments.AlignCompound = true; 59 verifyFormat("x <= x;\n" 60 "sfdbddfbdfbb <= x;", 61 Style); 62 verifyFormat("x += x;\n" 63 "sfdbddfbdfbb <= x;", 64 Style); 65 verifyFormat("x <<= x;\n" 66 "sfdbddfbdfbb <= x;", 67 Style); 68 verifyFormat("x <<<= x;\n" 69 "sfdbddfbdfbb <= x;", 70 Style); 71 verifyFormat("x >>= x;\n" 72 "sfdbddfbdfbb <= x;", 73 Style); 74 verifyFormat("x >>>= x;\n" 75 "sfdbddfbdfbb <= x;", 76 Style); 77 } 78 79 TEST_F(FormatTestVerilog, Assign) { 80 verifyFormat("assign mynet = enable;"); 81 verifyFormat("assign (strong1, pull0) #1 mynet = enable;"); 82 verifyFormat("assign #1 mynet = enable;"); 83 verifyFormat("assign mynet = enable;"); 84 // Test that assignments are on separate lines. 85 verifyFormat("assign mynet = enable,\n" 86 " mynet1 = enable1;"); 87 // Test that `<=` and `,` don't confuse it. 88 verifyFormat("assign mynet = enable1 <= enable2;"); 89 verifyFormat("assign mynet = enable1 <= enable2,\n" 90 " mynet1 = enable3;"); 91 verifyFormat("assign mynet = enable,\n" 92 " mynet1 = enable2 <= enable3;"); 93 verifyFormat("assign mynet = enable(enable1, enable2);"); 94 } 95 96 TEST_F(FormatTestVerilog, BasedLiteral) { 97 verifyFormat("x = '0;"); 98 verifyFormat("x = '1;"); 99 verifyFormat("x = 'X;"); 100 verifyFormat("x = 'x;"); 101 verifyFormat("x = 'Z;"); 102 verifyFormat("x = 'z;"); 103 verifyFormat("x = 659;"); 104 verifyFormat("x = 'h837ff;"); 105 verifyFormat("x = 'o7460;"); 106 verifyFormat("x = 4'b1001;"); 107 verifyFormat("x = 5'D3;"); 108 verifyFormat("x = 3'b01x;"); 109 verifyFormat("x = 12'hx;"); 110 verifyFormat("x = 16'hz;"); 111 verifyFormat("x = -8'd6;"); 112 verifyFormat("x = 4'shf;"); 113 verifyFormat("x = -4'sd15;"); 114 verifyFormat("x = 16'sd?;"); 115 } 116 117 TEST_F(FormatTestVerilog, Block) { 118 verifyFormat("begin\n" 119 " x = x;\n" 120 "end"); 121 verifyFormat("begin : x\n" 122 " x = x;\n" 123 "end : x"); 124 verifyFormat("begin\n" 125 " x = x;\n" 126 " x = x;\n" 127 "end"); 128 verifyFormat("fork\n" 129 " x = x;\n" 130 "join"); 131 verifyFormat("fork\n" 132 " x = x;\n" 133 "join_any"); 134 verifyFormat("fork\n" 135 " x = x;\n" 136 "join_none"); 137 verifyFormat("generate\n" 138 " x = x;\n" 139 "endgenerate"); 140 verifyFormat("generate : x\n" 141 " x = x;\n" 142 "endgenerate : x"); 143 // Nested blocks. 144 verifyFormat("begin\n" 145 " begin\n" 146 " end\n" 147 "end"); 148 verifyFormat("begin : x\n" 149 " begin\n" 150 " end\n" 151 "end : x"); 152 verifyFormat("begin : x\n" 153 " begin : x\n" 154 " end : x\n" 155 "end : x"); 156 verifyFormat("begin\n" 157 " begin : x\n" 158 " end : x\n" 159 "end"); 160 // Test that 'disable fork' and 'rand join' don't get mistaken as blocks. 161 verifyFormat("disable fork;\n" 162 "x = x;"); 163 verifyFormat("rand join x x;\n" 164 "x = x;"); 165 // The begin keyword should not be indented if it is too long to fit on the 166 // same line. 167 verifyFormat("while (true) //\n" 168 "begin\n" 169 " while (true) //\n" 170 " begin\n" 171 " end\n" 172 "end"); 173 verifyFormat("while (true) //\n" 174 "begin : x\n" 175 " while (true) //\n" 176 " begin : x\n" 177 " end : x\n" 178 "end : x"); 179 verifyFormat("while (true) //\n" 180 "fork\n" 181 " while (true) //\n" 182 " fork\n" 183 " join\n" 184 "join"); 185 auto Style = getDefaultStyle(); 186 Style.ColumnLimit = 17; 187 verifyFormat("while (true)\n" 188 "begin\n" 189 " while (true)\n" 190 " begin\n" 191 " end\n" 192 "end", 193 "while (true) begin\n" 194 " while (true) begin" 195 " end\n" 196 "end", 197 Style); 198 } 199 200 TEST_F(FormatTestVerilog, Case) { 201 verifyFormat("case (data)\n" 202 "endcase"); 203 verifyFormat("casex (data)\n" 204 "endcase"); 205 verifyFormat("casez (data)\n" 206 "endcase"); 207 verifyFormat("case (data) inside\n" 208 "endcase"); 209 verifyFormat("case (data)\n" 210 " 16'd0:\n" 211 " result = 10'b0111111111;\n" 212 "endcase"); 213 verifyFormat("case (data)\n" 214 " xxxxxxxx:\n" 215 " result = 10'b0111111111;\n" 216 "endcase"); 217 // Test labels with multiple options. 218 verifyFormat("case (data)\n" 219 " 16'd0, 16'd1:\n" 220 " result = 10'b0111111111;\n" 221 "endcase"); 222 verifyFormat("case (data)\n" 223 " 16'd0, //\n" 224 " 16'd1:\n" 225 " result = 10'b0111111111;\n" 226 "endcase"); 227 // Test that blocks following labels are indented. 228 verifyFormat("case (data)\n" 229 " 16'd1: fork\n" 230 " result = 10'b1011111111;\n" 231 " join\n" 232 "endcase"); 233 verifyFormat("case (data)\n" 234 " 16'd1: fork : x\n" 235 " result = 10'b1011111111;\n" 236 " join : x\n" 237 "endcase"); 238 // Test default. 239 verifyFormat("case (data)\n" 240 " default\n" 241 " result = 10'b1011111111;\n" 242 "endcase"); 243 verifyFormat("case (data)\n" 244 " default:\n" 245 " result = 10'b1011111111;\n" 246 "endcase"); 247 // Test that question marks and colons don't get mistaken as labels. 248 verifyFormat("case (data)\n" 249 " 8'b1???????:\n" 250 " instruction1(ir);\n" 251 "endcase"); 252 verifyFormat("case (data)\n" 253 " x ? 8'b1??????? : 1:\n" 254 " instruction3(ir);\n" 255 "endcase"); 256 // Test indention options. 257 auto Style = getDefaultStyle(); 258 Style.IndentCaseLabels = false; 259 verifyFormat("case (data)\n" 260 "16'd0:\n" 261 " result = 10'b0111111111;\n" 262 "endcase", 263 Style); 264 verifyFormat("case (data)\n" 265 "16'd0: begin\n" 266 " result = 10'b0111111111;\n" 267 "end\n" 268 "endcase", 269 Style); 270 Style.IndentCaseLabels = true; 271 verifyFormat("case (data)\n" 272 " 16'd0:\n" 273 " result = 10'b0111111111;\n" 274 "endcase", 275 Style); 276 verifyFormat("case (data)\n" 277 " 16'd0: begin\n" 278 " result = 10'b0111111111;\n" 279 " end\n" 280 "endcase", 281 Style); 282 // Other colons should not be mistaken as case colons. 283 Style = getDefaultStyle(); 284 Style.BitFieldColonSpacing = FormatStyle::BFCS_None; 285 verifyFormat("case (x[1:0])\n" 286 "endcase", 287 Style); 288 verifyFormat("default:\n" 289 " x[1:0] = x[1:0];", 290 Style); 291 Style.BitFieldColonSpacing = FormatStyle::BFCS_Both; 292 verifyFormat("case (x[1 : 0])\n" 293 "endcase", 294 Style); 295 verifyFormat("default:\n" 296 " x[1 : 0] = x[1 : 0];", 297 Style); 298 Style = getDefaultStyle(); 299 Style.SpacesInContainerLiterals = true; 300 verifyFormat("case ('{x : x, default : 9})\n" 301 "endcase", 302 Style); 303 verifyFormat("x = '{x : x, default : 9};", Style); 304 verifyFormat("default:\n" 305 " x = '{x : x, default : 9};", 306 Style); 307 Style.SpacesInContainerLiterals = false; 308 verifyFormat("case ('{x: x, default: 9})\n" 309 "endcase", 310 Style); 311 verifyFormat("x = '{x: x, default: 9};", Style); 312 verifyFormat("default:\n" 313 " x = '{x: x, default: 9};", 314 Style); 315 // When the line following the case label needs to be broken, the continuation 316 // should be indented correctly. 317 verifyFormat("case (data)\n" 318 " 16'd0:\n" 319 " result = //\n" 320 " 10'b0111111111;\n" 321 "endcase"); 322 verifyFormat("case (data)\n" 323 " 16'd0, //\n" 324 " 16'd1:\n" 325 " result = //\n" 326 " 10'b0111111111;\n" 327 "endcase"); 328 verifyFormat("case (data)\n" 329 " 16'd0:\n" 330 " result = (10'b0111111111 + //\n" 331 " 10'b0111111111 + //\n" 332 " 10'b0111111111);\n" 333 "endcase"); 334 verifyFormat("case (data)\n" 335 " 16'd0:\n" 336 " result = //\n" 337 " (10'b0111111111 + //\n" 338 " 10'b0111111111 + //\n" 339 " 10'b0111111111);\n" 340 "endcase"); 341 verifyFormat("case (data)\n" 342 " 16'd0:\n" 343 " result = //\n" 344 " longfunction( //\n" 345 " arg);\n" 346 "endcase"); 347 verifyFormat("case (data)\n" 348 " 16'd0:\n" 349 " //\n" 350 " result = //\n" 351 " 10'b0111111111;\n" 352 "endcase"); 353 verifyFormat("case (data)\n" 354 " 16'd0:\n" 355 " //\n" 356 "\n" 357 " //\n" 358 " result = //\n" 359 " 10'b0111111111;\n" 360 "endcase"); 361 Style = getDefaultStyle(); 362 Style.ContinuationIndentWidth = 1; 363 verifyFormat("case (data)\n" 364 " 16'd0:\n" 365 " result = //\n" 366 " 10'b0111111111;\n" 367 "endcase", 368 Style); 369 verifyFormat("case (data)\n" 370 " 16'd0:\n" 371 " result = //\n" 372 " longfunction( //\n" 373 " arg);\n" 374 "endcase", 375 Style); 376 377 verifyFormat("case (v) matches\n" 378 " tagged Valid .n:\n" 379 " ;\n" 380 "endcase"); 381 } 382 383 TEST_F(FormatTestVerilog, Coverage) { 384 verifyFormat("covergroup x\n" 385 " @@(begin x);\n" 386 "endgroup"); 387 } 388 389 TEST_F(FormatTestVerilog, Declaration) { 390 verifyFormat("wire mynet;"); 391 verifyFormat("wire mynet, mynet1;"); 392 verifyFormat("wire mynet, //\n" 393 " mynet1;"); 394 verifyFormat("wire #0 mynet, mynet1;"); 395 verifyFormat("wire logic #0 mynet, mynet1;"); 396 verifyFormat("wire #(1, 2, 3) mynet, mynet1;"); 397 verifyFormat("wire #0 mynet, //\n" 398 " mynet1;"); 399 verifyFormat("wire logic #0 mynet, //\n" 400 " mynet1;"); 401 verifyFormat("wire #(1, 2, 3) mynet, //\n" 402 " mynet1;"); 403 verifyFormat("wire mynet = enable;"); 404 verifyFormat("wire mynet = enable, mynet1;"); 405 verifyFormat("wire mynet = enable, //\n" 406 " mynet1;"); 407 verifyFormat("wire mynet, mynet1 = enable;"); 408 verifyFormat("wire mynet, //\n" 409 " mynet1 = enable;"); 410 verifyFormat("wire mynet = enable, mynet1 = enable;"); 411 verifyFormat("wire mynet = enable, //\n" 412 " mynet1 = enable;"); 413 verifyFormat("wire (strong1, pull0) mynet;"); 414 verifyFormat("wire (strong1, pull0) mynet, mynet1;"); 415 verifyFormat("wire (strong1, pull0) mynet, //\n" 416 " mynet1;"); 417 verifyFormat("wire (strong1, pull0) mynet = enable;"); 418 verifyFormat("wire (strong1, pull0) mynet = enable, mynet1;"); 419 verifyFormat("wire (strong1, pull0) mynet = enable, //\n" 420 " mynet1;"); 421 verifyFormat("wire (strong1, pull0) mynet, mynet1 = enable;"); 422 verifyFormat("wire (strong1, pull0) mynet, //\n" 423 " mynet1 = enable;"); 424 } 425 426 TEST_F(FormatTestVerilog, Delay) { 427 // Delay by the default unit. 428 verifyFormat("#0;"); 429 verifyFormat("#1;"); 430 verifyFormat("#10;"); 431 verifyFormat("#1.5;"); 432 // Explicit unit. 433 verifyFormat("#1fs;"); 434 verifyFormat("#1.5fs;"); 435 verifyFormat("#1ns;"); 436 verifyFormat("#1.5ns;"); 437 verifyFormat("#1us;"); 438 verifyFormat("#1.5us;"); 439 verifyFormat("#1ms;"); 440 verifyFormat("#1.5ms;"); 441 verifyFormat("#1s;"); 442 verifyFormat("#1.5s;"); 443 // The following expression should be on the same line. 444 verifyFormat("#1 x = x;"); 445 verifyFormat("#1 x = x;", "#1\n" 446 "x = x;"); 447 } 448 449 TEST_F(FormatTestVerilog, Enum) { 450 verifyFormat("enum { x } x;"); 451 verifyFormat("typedef enum { x } x;"); 452 verifyFormat("enum { red, yellow, green } x;"); 453 verifyFormat("typedef enum { red, yellow, green } x;"); 454 verifyFormat("enum integer { x } x;"); 455 verifyFormat("typedef enum { x = 0 } x;"); 456 verifyFormat("typedef enum { red = 0, yellow = 1, green = 2 } x;"); 457 verifyFormat("typedef enum integer { x } x;"); 458 verifyFormat("typedef enum bit [0 : 1] { x } x;"); 459 verifyFormat("typedef enum { add = 10, sub[5], jmp[6 : 8] } E1;"); 460 verifyFormat("typedef enum { add = 10, sub[5] = 0, jmp[6 : 8] = 1 } E1;"); 461 } 462 463 TEST_F(FormatTestVerilog, Headers) { 464 // Test headers with multiple ports. 465 verifyFormat("module mh1\n" 466 " (input var int in1,\n" 467 " input var shortreal in2,\n" 468 " output tagged_st out);\n" 469 "endmodule"); 470 // There should be a space following the type but not the variable name. 471 verifyFormat("module test\n" 472 " (input wire [7 : 0] a,\n" 473 " input wire b[7 : 0],\n" 474 " input wire [7 : 0] c[7 : 0]);\n" 475 "endmodule"); 476 // Ports should be grouped by types. 477 verifyFormat("module test\n" 478 " (input [7 : 0] a,\n" 479 " input signed [7 : 0] b, c, d);\n" 480 "endmodule"); 481 verifyFormat("module test\n" 482 " (input [7 : 0] a,\n" 483 " (* x = x *) input signed [7 : 0] b, c, d);\n" 484 "endmodule"); 485 verifyFormat("module test\n" 486 " (input [7 : 0] a = 0,\n" 487 " input signed [7 : 0] b = 0, c = 0, d = 0);\n" 488 "endmodule"); 489 verifyFormat("module test\n" 490 " #(parameter x)\n" 491 " (input [7 : 0] a,\n" 492 " input signed [7 : 0] b, c, d);\n" 493 "endmodule"); 494 // When a line needs to be broken, ports of the same type should be aligned to 495 // the same column. 496 verifyFormat("module test\n" 497 " (input signed [7 : 0] b, c, //\n" 498 " d);\n" 499 "endmodule"); 500 verifyFormat("module test\n" 501 " ((* x = x *) input signed [7 : 0] b, c, //\n" 502 " d);\n" 503 "endmodule"); 504 verifyFormat("module test\n" 505 " (input signed [7 : 0] b = 0, c, //\n" 506 " d);\n" 507 "endmodule"); 508 verifyFormat("module test\n" 509 " (input signed [7 : 0] b, c = 0, //\n" 510 " d);\n" 511 "endmodule"); 512 verifyFormat("module test\n" 513 " (input signed [7 : 0] b, c, //\n" 514 " d = 0);\n" 515 "endmodule"); 516 verifyFormat("module test\n" 517 " (input wire logic signed [7 : 0][0 : 1] b, c, //\n" 518 " d);\n" 519 "endmodule"); 520 verifyFormat("module test\n" 521 " (input signed [7 : 0] b, //\n" 522 " c, //\n" 523 " d);\n" 524 "endmodule"); 525 verifyFormat("module test\n" 526 " (input [7 : 0] a,\n" 527 " input signed [7 : 0] b, //\n" 528 " c, //\n" 529 " d);\n" 530 "endmodule"); 531 verifyFormat("module test\n" 532 " (input signed [7 : 0] b, //\n" 533 " c, //\n" 534 " d,\n" 535 " output signed [7 : 0] h);\n" 536 "endmodule"); 537 // With a modport. 538 verifyFormat("module m\n" 539 " (i2.master i);\n" 540 "endmodule"); 541 verifyFormat("module m\n" 542 " (i2.master i, ii);\n" 543 "endmodule"); 544 verifyFormat("module m\n" 545 " (i2.master i, //\n" 546 " ii);\n" 547 "endmodule"); 548 verifyFormat("module m\n" 549 " (i2.master i,\n" 550 " input ii);\n" 551 "endmodule"); 552 verifyFormat("module m\n" 553 " (i2::i2.master i);\n" 554 "endmodule"); 555 verifyFormat("module m\n" 556 " (i2::i2.master i, ii);\n" 557 "endmodule"); 558 verifyFormat("module m\n" 559 " (i2::i2.master i, //\n" 560 " ii);\n" 561 "endmodule"); 562 verifyFormat("module m\n" 563 " (i2::i2.master i,\n" 564 " input ii);\n" 565 "endmodule"); 566 verifyFormat("module m\n" 567 " (i2::i2 i);\n" 568 "endmodule"); 569 verifyFormat("module m\n" 570 " (i2::i2 i, ii);\n" 571 "endmodule"); 572 verifyFormat("module m\n" 573 " (i2::i2 i, //\n" 574 " ii);\n" 575 "endmodule"); 576 verifyFormat("module m\n" 577 " (i2::i2 i,\n" 578 " input ii);\n" 579 "endmodule"); 580 // With a macro in the names. 581 verifyFormat("module m\n" 582 " (input var `x a, b);\n" 583 "endmodule"); 584 verifyFormat("module m\n" 585 " (input var `x a, //\n" 586 " b);\n" 587 "endmodule"); 588 verifyFormat("module m\n" 589 " (input var x `a, b);\n" 590 "endmodule"); 591 verifyFormat("module m\n" 592 " (input var x `a, //\n" 593 " b);\n" 594 "endmodule"); 595 // A line comment shouldn't disrupt the indentation of the port list. 596 verifyFormat("extern module x\n" 597 " (//\n" 598 " output y);"); 599 verifyFormat("extern module x\n" 600 " #(//\n" 601 " parameter x)\n" 602 " (//\n" 603 " output y);"); 604 // With a concatenation in the names. 605 auto Style = getDefaultStyle(); 606 Style.ColumnLimit = 40; 607 verifyFormat("`define X(x) \\\n" 608 " module test \\\n" 609 " (input var x``x a, b);", 610 Style); 611 verifyFormat("`define X(x) \\\n" 612 " module test \\\n" 613 " (input var x``x aaaaaaaaaaaaaaa, \\\n" 614 " b);", 615 Style); 616 verifyFormat("`define X(x) \\\n" 617 " module test \\\n" 618 " (input var x a``x, b);", 619 Style); 620 verifyFormat("`define X(x) \\\n" 621 " module test \\\n" 622 " (input var x aaaaaaaaaaaaaaa``x, \\\n" 623 " b);", 624 Style); 625 // When the ports line is not to be formatted, following lines should not take 626 // on its indentation. 627 verifyFormat("module x\n" 628 " (output x);\n" 629 " assign x = 0;\n" 630 "endmodule", 631 "module x\n" 632 " (output x);\n" 633 " assign x = 0;\n" 634 "endmodule", 635 getDefaultStyle(), {tooling::Range(25, 18)}); 636 } 637 638 TEST_F(FormatTestVerilog, Hierarchy) { 639 verifyFormat("module x;\n" 640 "endmodule"); 641 // Test that the end label is on the same line as the end keyword. 642 verifyFormat("module x;\n" 643 "endmodule : x"); 644 // Test that things inside are indented. 645 verifyFormat("module x;\n" 646 " generate\n" 647 " endgenerate\n" 648 "endmodule"); 649 verifyFormat("program x;\n" 650 " generate\n" 651 " endgenerate\n" 652 "endprogram"); 653 verifyFormat("interface x;\n" 654 " generate\n" 655 " endgenerate\n" 656 "endinterface"); 657 verifyFormat("task x;\n" 658 " generate\n" 659 " endgenerate\n" 660 "endtask"); 661 verifyFormat("function x;\n" 662 " generate\n" 663 " endgenerate\n" 664 "endfunction"); 665 verifyFormat("class x;\n" 666 " generate\n" 667 " endgenerate\n" 668 "endclass"); 669 // Test that they nest. 670 verifyFormat("module x;\n" 671 " program x;\n" 672 " program x;\n" 673 " endprogram\n" 674 " endprogram\n" 675 "endmodule"); 676 // Test that an extern declaration doesn't change the indentation. 677 verifyFormat("extern module x;\n" 678 "x = x;"); 679 // Test complex headers 680 verifyFormat("extern module x\n" 681 " import x.x::x::*;\n" 682 " import x;\n" 683 " #(parameter x)\n" 684 " (output x);"); 685 verifyFormat("module x\n" 686 " import x.x::x::*;\n" 687 " import x;\n" 688 " #(parameter x)\n" 689 " (output x);\n" 690 " generate\n" 691 " endgenerate\n" 692 "endmodule : x"); 693 verifyFormat("virtual class x\n" 694 " (x)\n" 695 " extends x(x)\n" 696 " implements x, x, x;\n" 697 " generate\n" 698 " endgenerate\n" 699 "endclass : x"); 700 verifyFormat("function automatic logic [1 : 0] x\n" 701 " (input x);\n" 702 " generate\n" 703 " endgenerate\n" 704 "endfunction : x"); 705 // Type names with '::' should be recognized. 706 verifyFormat("function automatic x::x x\n" 707 " (input x);\n" 708 "endfunction : x"); 709 // Names having to do macros should be recognized. 710 verifyFormat("function automatic x::x x``x\n" 711 " (input x);\n" 712 "endfunction : x"); 713 verifyFormat("function automatic x::x `x\n" 714 " (input x);\n" 715 "endfunction : x"); 716 verifyNoCrash("x x(x x, x x);"); 717 } 718 719 TEST_F(FormatTestVerilog, Identifiers) { 720 // Escaped identifiers should not be split. 721 verifyFormat("\\busa+index"); 722 verifyFormat("\\-clock"); 723 verifyFormat("\\***error-condition***"); 724 verifyFormat("\\net1\\/net2"); 725 verifyFormat("\\{a,b}"); 726 verifyFormat("\\a*(b+c)"); 727 // Escaped identifiers can't be joined with the next token. Extra space 728 // should be removed. 729 verifyFormat("\\busa+index ;", "\\busa+index\n" 730 ";"); 731 verifyFormat("\\busa+index ;", "\\busa+index\r\n" 732 ";"); 733 verifyFormat("\\busa+index ;", "\\busa+index ;"); 734 verifyFormat("\\busa+index ;", "\\busa+index\n" 735 " ;"); 736 verifyFormat("\\busa+index ;"); 737 verifyFormat("(\\busa+index );"); 738 verifyFormat("\\busa+index \\busa+index ;"); 739 } 740 741 TEST_F(FormatTestVerilog, If) { 742 verifyFormat("if (x)\n" 743 " x = x;"); 744 verifyFormat("unique if (x)\n" 745 " x = x;"); 746 verifyFormat("unique0 if (x)\n" 747 " x = x;"); 748 verifyFormat("priority if (x)\n" 749 " x = x;"); 750 verifyFormat("if (x)\n" 751 " x = x;\n" 752 "x = x;"); 753 754 // Test else 755 verifyFormat("if (x)\n" 756 " x = x;\n" 757 "else if (x)\n" 758 " x = x;\n" 759 "else\n" 760 " x = x;"); 761 verifyFormat("if (x) begin\n" 762 " x = x;\n" 763 "end else if (x) begin\n" 764 " x = x;\n" 765 "end else begin\n" 766 " x = x;\n" 767 "end"); 768 verifyFormat("if (x) begin : x\n" 769 " x = x;\n" 770 "end : x else if (x) begin : x\n" 771 " x = x;\n" 772 "end : x else begin : x\n" 773 " x = x;\n" 774 "end : x"); 775 776 // Test block keywords. 777 verifyFormat("if (x) begin\n" 778 " x = x;\n" 779 "end"); 780 verifyFormat("if (x) begin : x\n" 781 " x = x;\n" 782 "end : x"); 783 verifyFormat("if (x) begin\n" 784 " x = x;\n" 785 " x = x;\n" 786 "end"); 787 verifyFormat("if (x) fork\n" 788 " x = x;\n" 789 "join"); 790 verifyFormat("if (x) fork\n" 791 " x = x;\n" 792 "join_any"); 793 verifyFormat("if (x) fork\n" 794 " x = x;\n" 795 "join_none"); 796 verifyFormat("if (x) generate\n" 797 " x = x;\n" 798 "endgenerate"); 799 verifyFormat("if (x) generate : x\n" 800 " x = x;\n" 801 "endgenerate : x"); 802 803 // Test that concatenation braces don't get regarded as blocks. 804 verifyFormat("if (x)\n" 805 " {x} = x;"); 806 verifyFormat("if (x)\n" 807 " x = {x};"); 808 verifyFormat("if (x)\n" 809 " x = {x};\n" 810 "else\n" 811 " {x} = {x};"); 812 813 // With attributes. 814 verifyFormat("(* x *) if (x)\n" 815 " x = x;"); 816 verifyFormat("(* x = \"x\" *) if (x)\n" 817 " x = x;"); 818 verifyFormat("(* x, x = \"x\" *) if (x)\n" 819 " x = x;"); 820 821 // Assert are treated similar to if. But the else parts should not be 822 // chained. 823 verifyFormat("assert (x);"); 824 verifyFormat("assert (x)\n" 825 " $info();"); 826 verifyFormat("assert (x)\n" 827 " $info();\n" 828 "else\n" 829 " $error();"); 830 verifyFormat("assert (x)\n" 831 "else\n" 832 " $error();"); 833 verifyFormat("assert (x)\n" 834 "else begin\n" 835 "end"); 836 verifyFormat("assert (x)\n" 837 "else\n" 838 " if (x)\n" 839 " $error();"); 840 verifyFormat("assert (x)\n" 841 " $info();\n" 842 "else\n" 843 " if (x)\n" 844 " $error();"); 845 verifyFormat("assert (x)\n" 846 " $info();\n" 847 "else\n" 848 " if (x)\n" 849 " $error();\n" 850 " else\n" 851 " $error();"); 852 verifyFormat("assert (x)\n" 853 " $info();\n" 854 "else\n" 855 " if (x)\n" 856 " $error();\n" 857 " else if (x)\n" 858 " $error();\n" 859 " else\n" 860 " $error();"); 861 // The body is optional for asserts. The next line should not be indented if 862 // the statement already ended with a semicolon. 863 verifyFormat("assert (x);\n" 864 "x = x;"); 865 verifyFormat("if (x)\n" 866 " assert (x);\n" 867 "else if (x) begin\n" 868 "end else begin\n" 869 "end"); 870 verifyFormat("if (x)\n" 871 " assert (x);\n" 872 "else begin\n" 873 "end"); 874 verifyFormat("if (x)\n" 875 " assert (x)\n" 876 " else begin\n" 877 " end"); 878 // Other keywords. 879 verifyFormat("assume (x)\n" 880 " $info();"); 881 verifyFormat("cover (x)\n" 882 " $info();"); 883 verifyFormat("restrict (x)\n" 884 " $info();"); 885 verifyFormat("assert #0 (x)\n" 886 " $info();"); 887 verifyFormat("assert final (x)\n" 888 " $info();"); 889 verifyFormat("cover #0 (x)\n" 890 " $info();"); 891 verifyFormat("cover final (x)\n" 892 " $info();"); 893 894 // The space around parentheses options should work. 895 auto Style = getDefaultStyle(); 896 verifyFormat("if (x)\n" 897 " x = x;\n" 898 "else if (x)\n" 899 " x = x;", 900 Style); 901 verifyFormat("assert (x);", Style); 902 verifyFormat("assert #0 (x);", Style); 903 verifyFormat("assert (x)\n" 904 "else\n" 905 " if (x)\n" 906 " x = x;", 907 Style); 908 Style.SpacesInParens = FormatStyle::SIPO_Custom; 909 Style.SpacesInParensOptions.InConditionalStatements = true; 910 verifyFormat("if ( x )\n" 911 " x = x;\n" 912 "else if ( x )\n" 913 " x = x;", 914 Style); 915 verifyFormat("assert ( x );", Style); 916 verifyFormat("assert #0 ( x );", Style); 917 verifyFormat("assert ( x )\n" 918 "else\n" 919 " if ( x )\n" 920 " x = x;", 921 Style); 922 } 923 924 TEST_F(FormatTestVerilog, Instantiation) { 925 // Without ports. 926 verifyFormat("ffnand ff1;"); 927 // With named ports. 928 verifyFormat("ffnand ff1(.qbar(out1),\n" 929 " .clear(in1),\n" 930 " .preset(in2));"); 931 // With wildcard. 932 verifyFormat("ffnand ff1(.qbar(out1),\n" 933 " .clear(in1),\n" 934 " .preset(in2),\n" 935 " .*);"); 936 verifyFormat("ffnand ff1(.*,\n" 937 " .qbar(out1),\n" 938 " .clear(in1),\n" 939 " .preset(in2));"); 940 // With unconnected ports. 941 verifyFormat("ffnand ff1(.q(),\n" 942 " .qbar(out1),\n" 943 " .clear(in1),\n" 944 " .preset(in2));"); 945 verifyFormat("ffnand ff1(.q(),\n" 946 " .qbar(),\n" 947 " .clear(),\n" 948 " .preset());"); 949 verifyFormat("ffnand ff1(,\n" 950 " .qbar(out1),\n" 951 " .clear(in1),\n" 952 " .preset(in2));"); 953 // With positional ports. 954 verifyFormat("ffnand ff1(out1,\n" 955 " in1,\n" 956 " in2);"); 957 verifyFormat("ffnand ff1(,\n" 958 " out1,\n" 959 " in1,\n" 960 " in2);"); 961 // Multiple instantiations. 962 verifyFormat("ffnand ff1(.q(),\n" 963 " .qbar(out1),\n" 964 " .clear(in1),\n" 965 " .preset(in2)),\n" 966 " ff1(.q(),\n" 967 " .qbar(out1),\n" 968 " .clear(in1),\n" 969 " .preset(in2));"); 970 verifyFormat("ffnand //\n" 971 " ff1(.q(),\n" 972 " .qbar(out1),\n" 973 " .clear(in1),\n" 974 " .preset(in2)),\n" 975 " ff1(.q(),\n" 976 " .qbar(out1),\n" 977 " .clear(in1),\n" 978 " .preset(in2));"); 979 verifyNoCrash(", ff1();"); 980 // With breaking between instance ports disabled. 981 auto Style = getDefaultStyle(); 982 Style.VerilogBreakBetweenInstancePorts = false; 983 verifyFormat("ffnand ff1;", Style); 984 verifyFormat("ffnand ff1(.qbar(out1), .clear(in1), .preset(in2), .*);", 985 Style); 986 verifyFormat("ffnand ff1(out1, in1, in2);", Style); 987 verifyFormat("ffnand ff1(.q(), .qbar(out1), .clear(in1), .preset(in2)),\n" 988 " ff1(.q(), .qbar(out1), .clear(in1), .preset(in2));", 989 Style); 990 verifyFormat("ffnand //\n" 991 " ff1(.q(), .qbar(out1), .clear(in1), .preset(in2)),\n" 992 " ff1(.q(), .qbar(out1), .clear(in1), .preset(in2));", 993 Style); 994 } 995 996 TEST_F(FormatTestVerilog, Loop) { 997 verifyFormat("foreach (x[x])\n" 998 " x = x;"); 999 verifyFormat("repeat (x)\n" 1000 " x = x;"); 1001 verifyFormat("foreach (x[x]) begin\n" 1002 "end"); 1003 verifyFormat("repeat (x) begin\n" 1004 "end"); 1005 auto Style = getDefaultStyle(); 1006 Style.SpacesInParens = FormatStyle::SIPO_Custom; 1007 Style.SpacesInParensOptions.InConditionalStatements = true; 1008 verifyFormat("foreach ( x[x] )\n" 1009 " x = x;", 1010 Style); 1011 verifyFormat("repeat ( x )\n" 1012 " x = x;", 1013 Style); 1014 } 1015 1016 TEST_F(FormatTestVerilog, Operators) { 1017 // Test that unary operators are not followed by space. 1018 verifyFormat("x = +x;"); 1019 verifyFormat("x = -x;"); 1020 verifyFormat("x = !x;"); 1021 verifyFormat("x = ~x;"); 1022 verifyFormat("x = &x;"); 1023 verifyFormat("x = ~&x;"); 1024 verifyFormat("x = |x;"); 1025 verifyFormat("x = ~|x;"); 1026 verifyFormat("x = ^x;"); 1027 verifyFormat("x = ~^x;"); 1028 verifyFormat("x = ^~x;"); 1029 verifyFormat("x = ++x;"); 1030 verifyFormat("x = --x;"); 1031 1032 // Test that `*` and `*>` are binary. 1033 verifyFormat("x = x * x;"); 1034 verifyFormat("x = (x * x);"); 1035 verifyFormat("(opcode *> o1) = 6.1;"); 1036 verifyFormat("(C, D *> Q) = 18;"); 1037 // The wildcard import is not a binary operator. 1038 verifyFormat("import p::*;"); 1039 1040 // Test that operators don't get split. 1041 verifyFormat("x = x++;"); 1042 verifyFormat("x = x--;"); 1043 verifyFormat("x = x ** x;"); 1044 verifyFormat("x = x << x;"); 1045 verifyFormat("x = x >> x;"); 1046 verifyFormat("x = x <<< x;"); 1047 verifyFormat("x = x >>> x;"); 1048 verifyFormat("x = x <= x;"); 1049 verifyFormat("x = x >= x;"); 1050 verifyFormat("x = x == x;"); 1051 verifyFormat("x = x != x;"); 1052 verifyFormat("x = x === x;"); 1053 verifyFormat("x = x !== x;"); 1054 verifyFormat("x = x ==? x;"); 1055 verifyFormat("x = x !=? x;"); 1056 verifyFormat("x = x ~^ x;"); 1057 verifyFormat("x = x ^~ x;"); 1058 verifyFormat("x = x && x;"); 1059 verifyFormat("x = x || x;"); 1060 verifyFormat("x = x -> x;"); 1061 verifyFormat("x = x <-> x;"); 1062 verifyFormat("x += x;"); 1063 verifyFormat("x -= x;"); 1064 verifyFormat("x *= x;"); 1065 verifyFormat("x /= x;"); 1066 verifyFormat("x %= x;"); 1067 verifyFormat("x &= x;"); 1068 verifyFormat("x ^= x;"); 1069 verifyFormat("x |= x;"); 1070 verifyFormat("x <<= x;"); 1071 verifyFormat("x >>= x;"); 1072 verifyFormat("x <<<= x;"); 1073 verifyFormat("x >>>= x;"); 1074 verifyFormat("x <= x;"); 1075 1076 // Test that space is added between operators. 1077 verifyFormat("x = x < -x;", "x=x<-x;"); 1078 verifyFormat("x = x << -x;", "x=x<<-x;"); 1079 verifyFormat("x = x <<< -x;", "x=x<<<-x;"); 1080 1081 // Test that operators that are C++ identifiers get treated as operators. 1082 verifyFormat("solve s before d;"); // before 1083 verifyFormat("binsof(i) intersect {0};"); // intersect 1084 verifyFormat("req dist {1};"); // dist 1085 verifyFormat("a inside {b, c};"); // inside 1086 verifyFormat("bus.randomize() with { atype == low; };"); // with 1087 } 1088 1089 TEST_F(FormatTestVerilog, Preprocessor) { 1090 auto Style = getDefaultStyle(); 1091 Style.ColumnLimit = 20; 1092 1093 // Macro definitions. 1094 verifyFormat("`define X \\\n" 1095 " if (x) \\\n" 1096 " x = x;", 1097 "`define X if(x)x=x;", Style); 1098 verifyFormat("`define X(x) \\\n" 1099 " if (x) \\\n" 1100 " x = x;", 1101 "`define X(x) if(x)x=x;", Style); 1102 verifyFormat("`define X \\\n" 1103 " x = x; \\\n" 1104 " x = x;", 1105 "`define X x=x;x=x;", Style); 1106 // Macro definitions with invocations inside. 1107 verifyFormat("`define LIST \\\n" 1108 " `ENTRY \\\n" 1109 " `ENTRY", 1110 "`define LIST \\\n" 1111 "`ENTRY \\\n" 1112 "`ENTRY", 1113 Style); 1114 verifyFormat("`define LIST \\\n" 1115 " `x = `x; \\\n" 1116 " `x = `x;", 1117 "`define LIST \\\n" 1118 "`x = `x; \\\n" 1119 "`x = `x;", 1120 Style); 1121 verifyFormat("`define LIST \\\n" 1122 " `x = `x; \\\n" 1123 " `x = `x;", 1124 "`define LIST `x=`x;`x=`x;", Style); 1125 // Macro invocations. 1126 verifyFormat("`x = (`x1 + `x2 + x);"); 1127 // Lines starting with a preprocessor directive should not be indented. 1128 std::string Directives[] = { 1129 "begin_keywords", 1130 "celldefine", 1131 "default_nettype", 1132 "define", 1133 "else", 1134 "elsif", 1135 "end_keywords", 1136 "endcelldefine", 1137 "endif", 1138 "ifdef", 1139 "ifndef", 1140 "include", 1141 "line", 1142 "nounconnected_drive", 1143 "pragma", 1144 "resetall", 1145 "timescale", 1146 "unconnected_drive", 1147 "undef", 1148 "undefineall", 1149 }; 1150 for (auto &Name : Directives) { 1151 verifyFormat("if (x)\n" 1152 "`" + 1153 Name + 1154 "\n" 1155 " ;", 1156 "if (x)\n" 1157 "`" + 1158 Name + 1159 "\n" 1160 ";", 1161 Style); 1162 } 1163 // Lines starting with a regular macro invocation should be indented as a 1164 // normal line. 1165 verifyFormat("if (x)\n" 1166 " `x = `x;\n" 1167 "`timescale 1ns / 1ps", 1168 "if (x)\n" 1169 "`x = `x;\n" 1170 "`timescale 1ns / 1ps", 1171 Style); 1172 verifyFormat("if (x)\n" 1173 "`timescale 1ns / 1ps\n" 1174 " `x = `x;", 1175 "if (x)\n" 1176 "`timescale 1ns / 1ps\n" 1177 "`x = `x;", 1178 Style); 1179 std::string NonDirectives[] = { 1180 // For `__FILE__` and `__LINE__`, although the standard classifies them as 1181 // preprocessor directives, they are used like regular macros. 1182 "__FILE__", "__LINE__", "elif", "foo", "x", 1183 }; 1184 for (auto &Name : NonDirectives) { 1185 verifyFormat("if (x)\n" 1186 " `" + 1187 Name + ";", 1188 "if (x)\n" 1189 "`" + 1190 Name + 1191 "\n" 1192 ";", 1193 Style); 1194 } 1195 } 1196 1197 TEST_F(FormatTestVerilog, Primitive) { 1198 verifyFormat("primitive multiplexer\n" 1199 " (mux, control, dataA, dataB);\n" 1200 " output mux;\n" 1201 " input control, dataA, dataB;\n" 1202 " table\n" 1203 " 0 1 ? : 1;\n" 1204 " 0 0 ? : 0;\n" 1205 " 1 ? 1 : 1;\n" 1206 " 1 ? 0 : 0;\n" 1207 " x 0 0 : 0;\n" 1208 " x 1 1 : 1;\n" 1209 " endtable\n" 1210 "endprimitive"); 1211 verifyFormat("primitive latch\n" 1212 " (q, ena_, data);\n" 1213 " output q;\n" 1214 " reg q;\n" 1215 " input ena_, data;\n" 1216 " table\n" 1217 " 0 1 : ? : 1;\n" 1218 " 0 0 : ? : 0;\n" 1219 " 1 ? : ? : -;\n" 1220 " ? * : ? : -;\n" 1221 " endtable\n" 1222 "endprimitive"); 1223 verifyFormat("primitive d\n" 1224 " (q, clock, data);\n" 1225 " output q;\n" 1226 " reg q;\n" 1227 " input clock, data;\n" 1228 " table\n" 1229 " (01) 0 : ? : 0;\n" 1230 " (01) 1 : ? : 1;\n" 1231 " (0?) 1 : 1 : 1;\n" 1232 " (0?) 0 : 0 : 0;\n" 1233 " (?0) ? : ? : -;\n" 1234 " (?\?) ? : ? : -;\n" 1235 " endtable\n" 1236 "endprimitive"); 1237 } 1238 1239 TEST_F(FormatTestVerilog, Streaming) { 1240 verifyFormat("x = {>>{j}};"); 1241 verifyFormat("x = {>>byte{j}};"); 1242 verifyFormat("x = {<<{j}};"); 1243 verifyFormat("x = {<<byte{j}};"); 1244 verifyFormat("x = {<<16{j}};"); 1245 verifyFormat("x = {<<{8'b0011_0101}};"); 1246 verifyFormat("x = {<<4{6'b11_0101}};"); 1247 verifyFormat("x = {>>4{6'b11_0101}};"); 1248 verifyFormat("x = {<<2{{<<{4'b1101}}}};"); 1249 verifyFormat("bit [96 : 1] y = {>>{a, b, c}};"); 1250 verifyFormat("int j = {>>{a, b, c}};"); 1251 verifyFormat("{>>{a, b, c}} = 23'b1;"); 1252 verifyFormat("{>>{a, b, c}} = x;"); 1253 verifyFormat("{>>{j}} = x;"); 1254 verifyFormat("{>>byte{j}} = x;"); 1255 verifyFormat("{<<{j}} = x;"); 1256 verifyFormat("{<<byte{j}} = x;"); 1257 } 1258 1259 TEST_F(FormatTestVerilog, StringLiteral) { 1260 // Long strings should be broken. 1261 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ", 1262 "xxxx"});)", 1263 R"(x({"xxxxxxxxxxxxxxxx xxxx"});)", 1264 getStyleWithColumns(getDefaultStyle(), 23)); 1265 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx", 1266 " xxxx"});)", 1267 R"(x({"xxxxxxxxxxxxxxxx xxxx"});)", 1268 getStyleWithColumns(getDefaultStyle(), 22)); 1269 // Braces should be added when they don't already exist. 1270 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ", 1271 "xxxx"});)", 1272 R"(x("xxxxxxxxxxxxxxxx xxxx");)", 1273 getStyleWithColumns(getDefaultStyle(), 23)); 1274 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx", 1275 " xxxx"});)", 1276 R"(x("xxxxxxxxxxxxxxxx xxxx");)", 1277 getStyleWithColumns(getDefaultStyle(), 22)); 1278 verifyFormat(R"(x({{"xxxxxxxxxxxxxxxx ", 1279 "xxxx"} == x});)", 1280 R"(x({"xxxxxxxxxxxxxxxx xxxx" == x});)", 1281 getStyleWithColumns(getDefaultStyle(), 24)); 1282 verifyFormat(R"(string x = {"xxxxxxxxxxxxxxxx ", 1283 "xxxxxxxx"};)", 1284 R"(string x = "xxxxxxxxxxxxxxxx xxxxxxxx";)", 1285 getStyleWithColumns(getDefaultStyle(), 32)); 1286 // Space around braces should be correct. 1287 auto Style = getStyleWithColumns(getDefaultStyle(), 24); 1288 Style.Cpp11BracedListStyle = false; 1289 verifyFormat(R"(x({ "xxxxxxxxxxxxxxxx ", 1290 "xxxx" });)", 1291 R"(x("xxxxxxxxxxxxxxxx xxxx");)", Style); 1292 // Braces should not be added twice. 1293 verifyFormat(R"(x({"xxxxxxxx", 1294 "xxxxxxxx", 1295 "xxxxxx"});)", 1296 R"(x("xxxxxxxxxxxxxxxxxxxxxx");)", 1297 getStyleWithColumns(getDefaultStyle(), 14)); 1298 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ", 1299 "xxxxxxxxxxxxxxxx ", 1300 "xxxx"});)", 1301 R"(x("xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxx");)", 1302 getStyleWithColumns(getDefaultStyle(), 23)); 1303 verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ", 1304 "xxxxxxxxxxxxxxxx ", 1305 "xxxx"});)", 1306 R"(x({"xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx ", "xxxx"});)", 1307 getStyleWithColumns(getDefaultStyle(), 23)); 1308 // import/export "DPI"/"DPI-C" cannot be split. 1309 verifyFormat(R"(import 1310 "DPI-C" function void foo 1311 ();)", 1312 R"(import "DPI-C" function void foo();)", 1313 getStyleWithColumns(getDefaultStyle(), 23)); 1314 verifyFormat(R"(export "DPI-C" function foo;)", 1315 R"(export "DPI-C" function foo;)", 1316 getStyleWithColumns(getDefaultStyle(), 23)); 1317 // These kinds of strings don't exist in Verilog. 1318 verifyNoCrash(R"(x(@"xxxxxxxxxxxxxxxx xxxx");)", 1319 getStyleWithColumns(getDefaultStyle(), 23)); 1320 verifyNoCrash(R"(x(u"xxxxxxxxxxxxxxxx xxxx");)", 1321 getStyleWithColumns(getDefaultStyle(), 23)); 1322 verifyNoCrash(R"(x(u8"xxxxxxxxxxxxxxxx xxxx");)", 1323 getStyleWithColumns(getDefaultStyle(), 23)); 1324 verifyNoCrash(R"(x(_T("xxxxxxxxxxxxxxxx xxxx"));)", 1325 getStyleWithColumns(getDefaultStyle(), 23)); 1326 } 1327 1328 TEST_F(FormatTestVerilog, StructLiteral) { 1329 verifyFormat("c = '{0, 0.0};"); 1330 verifyFormat("c = '{'{1, 1.0}, '{2, 2.0}};"); 1331 verifyFormat("c = '{a: 0, b: 0.0};"); 1332 verifyFormat("c = '{a: 0, b: 0.0, default: 0};"); 1333 verifyFormat("d = {int: 1, shortreal: 1.0};"); 1334 verifyFormat("c = '{default: 0};"); 1335 1336 // The identifier before the quote can be either a tag or a type case. There 1337 // should be a space between the tag and the quote. 1338 verifyFormat("c = ab'{a: 0, b: 0.0};"); 1339 verifyFormat("c = ab'{cd: cd'{1, 1.0}, ef: ef'{2, 2.0}};"); 1340 verifyFormat("c = ab'{cd'{1, 1.0}, ef'{2, 2.0}};"); 1341 verifyFormat("d = ab'{int: 1, shortreal: 1.0};"); 1342 verifyFormat("x = tagged Add '{e1, 4, ed};"); 1343 1344 auto Style = getDefaultStyle(); 1345 Style.SpacesInContainerLiterals = true; 1346 verifyFormat("c = '{a : 0, b : 0.0};", Style); 1347 verifyFormat("c = '{a : 0, b : 0.0, default : 0};", Style); 1348 verifyFormat("c = ab'{a : 0, b : 0.0};", Style); 1349 verifyFormat("c = ab'{cd : cd'{1, 1.0}, ef : ef'{2, 2.0}};", Style); 1350 1351 // It should be indented correctly when the line has to break. 1352 verifyFormat("c = //\n" 1353 " '{default: 0};"); 1354 Style = getDefaultStyle(); 1355 Style.ContinuationIndentWidth = 2; 1356 verifyFormat("c = //\n" 1357 " '{default: 0};", 1358 Style); 1359 } 1360 1361 TEST_F(FormatTestVerilog, StructuredProcedure) { 1362 // Blocks should be indented correctly. 1363 verifyFormat("initial begin\n" 1364 "end"); 1365 verifyFormat("initial begin\n" 1366 " x <= x;\n" 1367 " x <= x;\n" 1368 "end"); 1369 verifyFormat("initial\n" 1370 " x <= x;\n" 1371 "x <= x;"); 1372 verifyFormat("always @(x) begin\n" 1373 "end"); 1374 verifyFormat("always @(x) begin\n" 1375 " x <= x;\n" 1376 " x <= x;\n" 1377 "end"); 1378 verifyFormat("always @(x)\n" 1379 " x <= x;\n" 1380 "x <= x;"); 1381 // Various keywords. 1382 verifyFormat("always @(x)\n" 1383 " x <= x;"); 1384 verifyFormat("always @(posedge x)\n" 1385 " x <= x;"); 1386 verifyFormat("always @(posedge x or posedge y)\n" 1387 " x <= x;"); 1388 verifyFormat("always @(posedge x, posedge y)\n" 1389 " x <= x;"); 1390 verifyFormat("always @(negedge x, negedge y)\n" 1391 " x <= x;"); 1392 verifyFormat("always @(edge x, edge y)\n" 1393 " x <= x;"); 1394 verifyFormat("always\n" 1395 " x <= x;"); 1396 verifyFormat("always @*\n" 1397 " x <= x;"); 1398 verifyFormat("always @(*)\n" 1399 " x <= x;"); 1400 verifyFormat("always_comb\n" 1401 " x <= x;"); 1402 verifyFormat("always_latch @(x)\n" 1403 " x <= x;"); 1404 verifyFormat("always_ff @(posedge x)\n" 1405 " x <= x;"); 1406 verifyFormat("initial\n" 1407 " x <= x;"); 1408 verifyFormat("final\n" 1409 " x <= x;"); 1410 verifyFormat("forever\n" 1411 " x <= x;"); 1412 } 1413 } // namespace 1414 } // namespace test 1415 } // namespace format 1416 } // namespace clang 1417