1 //===- unittest/Format/FormatTestVerilog.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "FormatTestUtils.h" 10 #include "clang/Format/Format.h" 11 #include "llvm/Support/Debug.h" 12 #include "gtest/gtest.h" 13 14 #define DEBUG_TYPE "format-test" 15 16 namespace clang { 17 namespace format { 18 19 class FormatTestVerilog : public ::testing::Test { 20 protected: 21 static std::string format(llvm::StringRef Code, unsigned Offset, 22 unsigned Length, const FormatStyle &Style) { 23 LLVM_DEBUG(llvm::errs() << "---\n"); 24 LLVM_DEBUG(llvm::errs() << Code << "\n\n"); 25 std::vector<tooling::Range> Ranges(1, tooling::Range(Offset, Length)); 26 tooling::Replacements Replaces = reformat(Style, Code, Ranges); 27 auto Result = applyAllReplacements(Code, Replaces); 28 EXPECT_TRUE(static_cast<bool>(Result)); 29 LLVM_DEBUG(llvm::errs() << "\n" << *Result << "\n\n"); 30 return *Result; 31 } 32 33 static std::string 34 format(llvm::StringRef Code, 35 const FormatStyle &Style = getLLVMStyle(FormatStyle::LK_Verilog)) { 36 return format(Code, 0, Code.size(), Style); 37 } 38 39 static void verifyFormat( 40 llvm::StringRef Code, 41 const FormatStyle &Style = getLLVMStyle(FormatStyle::LK_Verilog)) { 42 EXPECT_EQ(Code.str(), format(Code, Style)) << "Expected code is not stable"; 43 EXPECT_EQ(Code.str(), 44 format(test::messUp(Code, /*HandleHash=*/false), Style)); 45 } 46 }; 47 48 TEST_F(FormatTestVerilog, Align) { 49 FormatStyle Style = getLLVMStyle(FormatStyle::LK_Verilog); 50 Style.AlignConsecutiveAssignments.Enabled = true; 51 verifyFormat("x <= x;\n" 52 "sfdbddfbdfbb <= x;\n" 53 "x = x;", 54 Style); 55 verifyFormat("x = x;\n" 56 "sfdbddfbdfbb = x;\n" 57 "x = x;", 58 Style); 59 // Compound assignments are not aligned by default. '<=' is not a compound 60 // assignment. 61 verifyFormat("x <= x;\n" 62 "sfdbddfbdfbb <= x;", 63 Style); 64 verifyFormat("x += x;\n" 65 "sfdbddfbdfbb <= x;", 66 Style); 67 verifyFormat("x <<= x;\n" 68 "sfdbddfbdfbb <= x;", 69 Style); 70 verifyFormat("x <<<= x;\n" 71 "sfdbddfbdfbb <= x;", 72 Style); 73 verifyFormat("x >>= x;\n" 74 "sfdbddfbdfbb <= x;", 75 Style); 76 verifyFormat("x >>>= x;\n" 77 "sfdbddfbdfbb <= x;", 78 Style); 79 Style.AlignConsecutiveAssignments.AlignCompound = true; 80 verifyFormat("x <= x;\n" 81 "sfdbddfbdfbb <= x;", 82 Style); 83 verifyFormat("x += x;\n" 84 "sfdbddfbdfbb <= x;", 85 Style); 86 verifyFormat("x <<= x;\n" 87 "sfdbddfbdfbb <= x;", 88 Style); 89 verifyFormat("x <<<= x;\n" 90 "sfdbddfbdfbb <= x;", 91 Style); 92 verifyFormat("x >>= x;\n" 93 "sfdbddfbdfbb <= x;", 94 Style); 95 verifyFormat("x >>>= x;\n" 96 "sfdbddfbdfbb <= x;", 97 Style); 98 } 99 100 TEST_F(FormatTestVerilog, BasedLiteral) { 101 verifyFormat("x = '0;"); 102 verifyFormat("x = '1;"); 103 verifyFormat("x = 'X;"); 104 verifyFormat("x = 'x;"); 105 verifyFormat("x = 'Z;"); 106 verifyFormat("x = 'z;"); 107 verifyFormat("x = 659;"); 108 verifyFormat("x = 'h837ff;"); 109 verifyFormat("x = 'o7460;"); 110 verifyFormat("x = 4'b1001;"); 111 verifyFormat("x = 5'D3;"); 112 verifyFormat("x = 3'b01x;"); 113 verifyFormat("x = 12'hx;"); 114 verifyFormat("x = 16'hz;"); 115 verifyFormat("x = -8'd6;"); 116 verifyFormat("x = 4'shf;"); 117 verifyFormat("x = -4'sd15;"); 118 verifyFormat("x = 16'sd?;"); 119 } 120 121 TEST_F(FormatTestVerilog, Block) { 122 verifyFormat("begin\n" 123 " x = x;\n" 124 "end"); 125 verifyFormat("begin : x\n" 126 " x = x;\n" 127 "end : x"); 128 verifyFormat("begin\n" 129 " x = x;\n" 130 " x = x;\n" 131 "end"); 132 verifyFormat("fork\n" 133 " x = x;\n" 134 "join"); 135 verifyFormat("fork\n" 136 " x = x;\n" 137 "join_any"); 138 verifyFormat("fork\n" 139 " x = x;\n" 140 "join_none"); 141 verifyFormat("generate\n" 142 " x = x;\n" 143 "endgenerate"); 144 verifyFormat("generate : x\n" 145 " x = x;\n" 146 "endgenerate : x"); 147 // Nested blocks. 148 verifyFormat("begin\n" 149 " begin\n" 150 " end\n" 151 "end"); 152 verifyFormat("begin : x\n" 153 " begin\n" 154 " end\n" 155 "end : x"); 156 verifyFormat("begin : x\n" 157 " begin : x\n" 158 " end : x\n" 159 "end : x"); 160 verifyFormat("begin\n" 161 " begin : x\n" 162 " end : x\n" 163 "end"); 164 // Test that 'disable fork' and 'rand join' don't get mistaken as blocks. 165 verifyFormat("disable fork;\n" 166 "x = x;"); 167 verifyFormat("rand join x x;\n" 168 "x = x;"); 169 } 170 171 TEST_F(FormatTestVerilog, Case) { 172 verifyFormat("case (data)\n" 173 "endcase"); 174 verifyFormat("casex (data)\n" 175 "endcase"); 176 verifyFormat("casez (data)\n" 177 "endcase"); 178 verifyFormat("case (data) inside\n" 179 "endcase"); 180 verifyFormat("case (data)\n" 181 " 16'd0:\n" 182 " result = 10'b0111111111;\n" 183 "endcase"); 184 verifyFormat("case (data)\n" 185 " xxxxxxxx:\n" 186 " result = 10'b0111111111;\n" 187 "endcase"); 188 // Test labels with multiple options. 189 verifyFormat("case (data)\n" 190 " 16'd0, 16'd1:\n" 191 " result = 10'b0111111111;\n" 192 "endcase"); 193 verifyFormat("case (data)\n" 194 " 16'd0, //\n" 195 " 16'd1:\n" 196 " result = 10'b0111111111;\n" 197 "endcase"); 198 // Test that blocks following labels are indented. 199 verifyFormat("case (data)\n" 200 " 16'd1: fork\n" 201 " result = 10'b1011111111;\n" 202 " join\n" 203 "endcase\n"); 204 verifyFormat("case (data)\n" 205 " 16'd1: fork : x\n" 206 " result = 10'b1011111111;\n" 207 " join : x\n" 208 "endcase\n"); 209 // Test default. 210 verifyFormat("case (data)\n" 211 " default\n" 212 " result = 10'b1011111111;\n" 213 "endcase"); 214 verifyFormat("case (data)\n" 215 " default:\n" 216 " result = 10'b1011111111;\n" 217 "endcase"); 218 // Test that question marks and colons don't get mistaken as labels. 219 verifyFormat("case (data)\n" 220 " 8'b1???????:\n" 221 " instruction1(ir);\n" 222 "endcase"); 223 verifyFormat("case (data)\n" 224 " x ? 8'b1??????? : 1:\n" 225 " instruction3(ir);\n" 226 "endcase"); 227 // Test indention options. 228 auto Style = getLLVMStyle(FormatStyle::LK_Verilog); 229 Style.IndentCaseLabels = false; 230 verifyFormat("case (data)\n" 231 "16'd0:\n" 232 " result = 10'b0111111111;\n" 233 "endcase", 234 Style); 235 verifyFormat("case (data)\n" 236 "16'd0: begin\n" 237 " result = 10'b0111111111;\n" 238 "end\n" 239 "endcase", 240 Style); 241 Style.IndentCaseLabels = true; 242 verifyFormat("case (data)\n" 243 " 16'd0:\n" 244 " result = 10'b0111111111;\n" 245 "endcase", 246 Style); 247 verifyFormat("case (data)\n" 248 " 16'd0: begin\n" 249 " result = 10'b0111111111;\n" 250 " end\n" 251 "endcase", 252 Style); 253 } 254 255 TEST_F(FormatTestVerilog, Delay) { 256 // Delay by the default unit. 257 verifyFormat("#0;"); 258 verifyFormat("#1;"); 259 verifyFormat("#10;"); 260 verifyFormat("#1.5;"); 261 // Explicit unit. 262 verifyFormat("#1fs;"); 263 verifyFormat("#1.5fs;"); 264 verifyFormat("#1ns;"); 265 verifyFormat("#1.5ns;"); 266 verifyFormat("#1us;"); 267 verifyFormat("#1.5us;"); 268 verifyFormat("#1ms;"); 269 verifyFormat("#1.5ms;"); 270 verifyFormat("#1s;"); 271 verifyFormat("#1.5s;"); 272 // The following expression should be on the same line. 273 verifyFormat("#1 x = x;"); 274 EXPECT_EQ("#1 x = x;", format("#1\n" 275 "x = x;")); 276 } 277 278 TEST_F(FormatTestVerilog, Hierarchy) { 279 verifyFormat("module x;\n" 280 "endmodule"); 281 // Test that the end label is on the same line as the end keyword. 282 verifyFormat("module x;\n" 283 "endmodule : x"); 284 // Test that things inside are indented. 285 verifyFormat("module x;\n" 286 " generate\n" 287 " endgenerate\n" 288 "endmodule"); 289 verifyFormat("program x;\n" 290 " generate\n" 291 " endgenerate\n" 292 "endprogram"); 293 verifyFormat("interface x;\n" 294 " generate\n" 295 " endgenerate\n" 296 "endinterface"); 297 verifyFormat("task x;\n" 298 " generate\n" 299 " endgenerate\n" 300 "endtask"); 301 verifyFormat("function x;\n" 302 " generate\n" 303 " endgenerate\n" 304 "endfunction"); 305 verifyFormat("class x;\n" 306 " generate\n" 307 " endgenerate\n" 308 "endclass"); 309 // Test that they nest. 310 verifyFormat("module x;\n" 311 " program x;\n" 312 " program x;\n" 313 " endprogram\n" 314 " endprogram\n" 315 "endmodule"); 316 // Test that an extern declaration doesn't change the indentation. 317 verifyFormat("extern module x;\n" 318 "x = x;"); 319 // Test complex headers 320 verifyFormat("extern module x\n" 321 " import x.x::x::*;\n" 322 " import x;\n" 323 " #(parameter x)\n" 324 " (output x);"); 325 verifyFormat("module x\n" 326 " import x.x::x::*;\n" 327 " import x;\n" 328 " #(parameter x)\n" 329 " (output x);\n" 330 " generate\n" 331 " endgenerate\n" 332 "endmodule : x"); 333 verifyFormat("virtual class x\n" 334 " (x)\n" 335 " extends x(x)\n" 336 " implements x, x, x;\n" 337 " generate\n" 338 " endgenerate\n" 339 "endclass : x\n"); 340 verifyFormat("function automatic logic [1 : 0] x\n" 341 " (input x);\n" 342 " generate\n" 343 " endgenerate\n" 344 "endfunction : x"); 345 } 346 347 TEST_F(FormatTestVerilog, If) { 348 verifyFormat("if (x)\n" 349 " x = x;"); 350 verifyFormat("unique if (x)\n" 351 " x = x;"); 352 verifyFormat("unique0 if (x)\n" 353 " x = x;"); 354 verifyFormat("priority if (x)\n" 355 " x = x;"); 356 verifyFormat("if (x)\n" 357 " x = x;\n" 358 "x = x;"); 359 360 // Test else 361 verifyFormat("if (x)\n" 362 " x = x;\n" 363 "else if (x)\n" 364 " x = x;\n" 365 "else\n" 366 " x = x;"); 367 verifyFormat("if (x) begin\n" 368 " x = x;\n" 369 "end else if (x) begin\n" 370 " x = x;\n" 371 "end else begin\n" 372 " x = x;\n" 373 "end"); 374 verifyFormat("if (x) begin : x\n" 375 " x = x;\n" 376 "end : x else if (x) begin : x\n" 377 " x = x;\n" 378 "end : x else begin : x\n" 379 " x = x;\n" 380 "end : x"); 381 382 // Test block keywords. 383 verifyFormat("if (x) begin\n" 384 " x = x;\n" 385 "end"); 386 verifyFormat("if (x) begin : x\n" 387 " x = x;\n" 388 "end : x"); 389 verifyFormat("if (x) begin\n" 390 " x = x;\n" 391 " x = x;\n" 392 "end"); 393 verifyFormat("if (x) fork\n" 394 " x = x;\n" 395 "join"); 396 verifyFormat("if (x) fork\n" 397 " x = x;\n" 398 "join_any"); 399 verifyFormat("if (x) fork\n" 400 " x = x;\n" 401 "join_none"); 402 verifyFormat("if (x) generate\n" 403 " x = x;\n" 404 "endgenerate"); 405 verifyFormat("if (x) generate : x\n" 406 " x = x;\n" 407 "endgenerate : x"); 408 409 // Test that concatenation braces don't get regarded as blocks. 410 verifyFormat("if (x)\n" 411 " {x} = x;"); 412 verifyFormat("if (x)\n" 413 " x = {x};"); 414 verifyFormat("if (x)\n" 415 " x = {x};\n" 416 "else\n" 417 " {x} = {x};"); 418 419 // With attributes. 420 verifyFormat("(* x *) if (x)\n" 421 " x = x;"); 422 verifyFormat("(* x = \"x\" *) if (x)\n" 423 " x = x;"); 424 verifyFormat("(* x, x = \"x\" *) if (x)\n" 425 " x = x;"); 426 } 427 428 TEST_F(FormatTestVerilog, Operators) { 429 // Test that unary operators are not followed by space. 430 verifyFormat("x = +x;"); 431 verifyFormat("x = -x;"); 432 verifyFormat("x = !x;"); 433 verifyFormat("x = ~x;"); 434 verifyFormat("x = &x;"); 435 verifyFormat("x = ~&x;"); 436 verifyFormat("x = |x;"); 437 verifyFormat("x = ~|x;"); 438 verifyFormat("x = ^x;"); 439 verifyFormat("x = ~^x;"); 440 verifyFormat("x = ^~x;"); 441 verifyFormat("x = ++x;"); 442 verifyFormat("x = --x;"); 443 444 // Test that operators don't get split. 445 verifyFormat("x = x++;"); 446 verifyFormat("x = x--;"); 447 verifyFormat("x = x ** x;"); 448 verifyFormat("x = x << x;"); 449 verifyFormat("x = x >> x;"); 450 verifyFormat("x = x <<< x;"); 451 verifyFormat("x = x >>> x;"); 452 verifyFormat("x = x <= x;"); 453 verifyFormat("x = x >= x;"); 454 verifyFormat("x = x == x;"); 455 verifyFormat("x = x != x;"); 456 verifyFormat("x = x === x;"); 457 verifyFormat("x = x !== x;"); 458 verifyFormat("x = x ==? x;"); 459 verifyFormat("x = x !=? x;"); 460 verifyFormat("x = x ~^ x;"); 461 verifyFormat("x = x ^~ x;"); 462 verifyFormat("x = x && x;"); 463 verifyFormat("x = x || x;"); 464 verifyFormat("x = x->x;"); 465 verifyFormat("x = x <-> x;"); 466 verifyFormat("x += x;"); 467 verifyFormat("x -= x;"); 468 verifyFormat("x *= x;"); 469 verifyFormat("x /= x;"); 470 verifyFormat("x %= x;"); 471 verifyFormat("x &= x;"); 472 verifyFormat("x ^= x;"); 473 verifyFormat("x |= x;"); 474 verifyFormat("x <<= x;"); 475 verifyFormat("x >>= x;"); 476 verifyFormat("x <<<= x;"); 477 verifyFormat("x >>>= x;"); 478 verifyFormat("x <= x;"); 479 480 // Test that space is added between operators. 481 EXPECT_EQ("x = x < -x;", format("x=x<-x;")); 482 EXPECT_EQ("x = x << -x;", format("x=x<<-x;")); 483 EXPECT_EQ("x = x <<< -x;", format("x=x<<<-x;")); 484 } 485 486 TEST_F(FormatTestVerilog, Preprocessor) { 487 auto Style = getLLVMStyle(FormatStyle::LK_Verilog); 488 Style.ColumnLimit = 20; 489 490 // Macro definitions. 491 EXPECT_EQ("`define X \\\n" 492 " if (x) \\\n" 493 " x = x;", 494 format("`define X if(x)x=x;", Style)); 495 EXPECT_EQ("`define X(x) \\\n" 496 " if (x) \\\n" 497 " x = x;", 498 format("`define X(x) if(x)x=x;", Style)); 499 EXPECT_EQ("`define X \\\n" 500 " x = x; \\\n" 501 " x = x;", 502 format("`define X x=x;x=x;", Style)); 503 // Macro definitions with invocations inside. 504 EXPECT_EQ("`define LIST \\\n" 505 " `ENTRY \\\n" 506 " `ENTRY", 507 format("`define LIST \\\n" 508 "`ENTRY \\\n" 509 "`ENTRY", 510 Style)); 511 EXPECT_EQ("`define LIST \\\n" 512 " `x = `x; \\\n" 513 " `x = `x;", 514 format("`define LIST \\\n" 515 "`x = `x; \\\n" 516 "`x = `x;", 517 Style)); 518 EXPECT_EQ("`define LIST \\\n" 519 " `x = `x; \\\n" 520 " `x = `x;", 521 format("`define LIST `x=`x;`x=`x;", Style)); 522 // Macro invocations. 523 verifyFormat("`x = (`x1 + `x2 + x);"); 524 // Lines starting with a preprocessor directive should not be indented. 525 std::string Directives[] = { 526 "begin_keywords", 527 "celldefine", 528 "default_nettype", 529 "define", 530 "else", 531 "elsif", 532 "end_keywords", 533 "endcelldefine", 534 "endif", 535 "ifdef", 536 "ifndef", 537 "include", 538 "line", 539 "nounconnected_drive", 540 "pragma", 541 "resetall", 542 "timescale", 543 "unconnected_drive", 544 "undef", 545 "undefineall", 546 }; 547 for (auto &Name : Directives) { 548 EXPECT_EQ("if (x)\n" 549 "`" + 550 Name + 551 "\n" 552 " ;", 553 format("if (x)\n" 554 "`" + 555 Name + 556 "\n" 557 ";", 558 Style)); 559 } 560 // Lines starting with a regular macro invocation should be indented as a 561 // normal line. 562 EXPECT_EQ("if (x)\n" 563 " `x = `x;\n" 564 "`timescale 1ns / 1ps", 565 format("if (x)\n" 566 "`x = `x;\n" 567 "`timescale 1ns / 1ps", 568 Style)); 569 EXPECT_EQ("if (x)\n" 570 "`timescale 1ns / 1ps\n" 571 " `x = `x;", 572 format("if (x)\n" 573 "`timescale 1ns / 1ps\n" 574 "`x = `x;", 575 Style)); 576 std::string NonDirectives[] = { 577 // For `__FILE__` and `__LINE__`, although the standard classifies them as 578 // preprocessor directives, they are used like regular macros. 579 "__FILE__", "__LINE__", "elif", "foo", "x", 580 }; 581 for (auto &Name : NonDirectives) { 582 EXPECT_EQ("if (x)\n" 583 " `" + 584 Name + ";", 585 format("if (x)\n" 586 "`" + 587 Name + 588 "\n" 589 ";", 590 Style)); 591 } 592 } 593 594 TEST_F(FormatTestVerilog, Primitive) { 595 verifyFormat("primitive multiplexer\n" 596 " (mux, control, dataA, dataB);\n" 597 " output mux;\n" 598 " input control, dataA, dataB;\n" 599 " table\n" 600 " 0 1 ? : 1;\n" 601 " 0 0 ? : 0;\n" 602 " 1 ? 1 : 1;\n" 603 " 1 ? 0 : 0;\n" 604 " x 0 0 : 0;\n" 605 " x 1 1 : 1;\n" 606 " endtable\n" 607 "endprimitive"); 608 verifyFormat("primitive latch\n" 609 " (q, ena_, data);\n" 610 " output q;\n" 611 " reg q;\n" 612 " input ena_, data;\n" 613 " table\n" 614 " 0 1 : ? : 1;\n" 615 " 0 0 : ? : 0;\n" 616 " 1 ? : ? : -;\n" 617 " ? * : ? : -;\n" 618 " endtable\n" 619 "endprimitive"); 620 verifyFormat("primitive d\n" 621 " (q, clock, data);\n" 622 " output q;\n" 623 " reg q;\n" 624 " input clock, data;\n" 625 " table\n" 626 " (01) 0 : ? : 0;\n" 627 " (01) 1 : ? : 1;\n" 628 " (0?) 1 : 1 : 1;\n" 629 " (0?) 0 : 0 : 0;\n" 630 " (?0) ? : ? : -;\n" 631 " (?\?) ? : ? : -;\n" 632 " endtable\n" 633 "endprimitive"); 634 } 635 } // namespace format 636 } // end namespace clang 637